1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
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2 | |
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3 | /* |
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4 | * Copyright (C) 2022 On-Line Applications Research Corporation (OAR) |
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5 | * |
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6 | * Redistribution and use in source and binary forms, with or without |
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7 | * modification, are permitted provided that the following conditions |
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8 | * are met: |
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9 | * 1. Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * 2. Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * |
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15 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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16 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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17 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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18 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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19 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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20 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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21 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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22 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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23 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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24 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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25 | * POSSIBILITY OF SUCH DAMAGE. |
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26 | */ |
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27 | |
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28 | #include <string.h> |
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29 | |
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30 | #include <bsp/irq.h> |
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31 | #include <bsp/jffs2_xqspipsu.h> |
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32 | #include <rtems/jffs2.h> |
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33 | #include <rtems/libio.h> |
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34 | #include <xqspipsu-flash-helper.h> |
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35 | |
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36 | typedef struct { |
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37 | rtems_jffs2_flash_control super; |
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38 | XQspiPsu *qspipsu; |
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39 | } flash_control; |
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40 | |
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41 | #define FLASH_DEVICE_ID 0xbb20 /* Type: 0xbb, Capacity: 0x20 */ |
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42 | |
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43 | static flash_control *get_flash_control( rtems_jffs2_flash_control *super ) |
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44 | { |
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45 | return (flash_control *) super; |
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46 | } |
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47 | |
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48 | static int do_read( |
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49 | rtems_jffs2_flash_control *super, |
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50 | uint32_t offset, |
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51 | unsigned char *buffer, |
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52 | size_t size_of_buffer |
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53 | ) |
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54 | { |
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55 | int Status; |
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56 | |
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57 | flash_control *self = get_flash_control( super ); |
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58 | XQspiPsu *QspiPsuPtr = self->qspipsu; |
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59 | u8* ReadBuffer = NULL; |
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60 | |
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61 | Status = QspiPsu_NOR_Read( |
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62 | QspiPsuPtr, |
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63 | offset, |
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64 | size_of_buffer, |
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65 | &ReadBuffer |
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66 | ); |
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67 | if ( Status != XST_SUCCESS ) { |
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68 | return Status; |
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69 | } |
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70 | |
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71 | /* |
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72 | * We have to copy since we can't be sure that buffer is properly aligned. |
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73 | */ |
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74 | memcpy( buffer, ReadBuffer, size_of_buffer ); |
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75 | |
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76 | return 0; |
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77 | } |
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78 | |
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79 | static int do_write( |
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80 | rtems_jffs2_flash_control *super, |
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81 | uint32_t offset, |
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82 | const unsigned char *buffer, |
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83 | size_t size_of_buffer |
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84 | ) |
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85 | { |
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86 | int Status; |
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87 | |
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88 | flash_control *self = get_flash_control( super ); |
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89 | XQspiPsu *QspiPsuPtr = self->qspipsu; |
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90 | |
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91 | Status = QspiPsu_NOR_Write( |
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92 | QspiPsuPtr, |
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93 | offset, |
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94 | size_of_buffer, |
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95 | (unsigned char *) buffer |
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96 | ); |
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97 | if ( Status != XST_SUCCESS ) { |
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98 | return Status; |
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99 | } |
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100 | |
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101 | return 0; |
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102 | } |
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103 | |
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104 | static int do_erase( |
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105 | rtems_jffs2_flash_control *super, |
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106 | uint32_t offset |
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107 | ) |
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108 | { |
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109 | int Status; |
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110 | |
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111 | flash_control *self = get_flash_control( super ); |
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112 | XQspiPsu *QspiPsuPtr = self->qspipsu; |
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113 | |
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114 | Status = QspiPsu_NOR_Erase( |
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115 | QspiPsuPtr, |
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116 | offset, |
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117 | super->block_size |
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118 | ); |
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119 | if ( Status != XST_SUCCESS ) { |
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120 | return Status; |
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121 | } |
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122 | |
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123 | return 0; |
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124 | } |
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125 | |
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126 | static void do_destroy( rtems_jffs2_flash_control *super ) |
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127 | { |
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128 | flash_control *self = get_flash_control( super ); |
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129 | |
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130 | rtems_interrupt_handler_remove( |
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131 | ZYNQMP_IRQ_QSPI, |
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132 | (rtems_interrupt_handler) XQspiPsu_InterruptHandler, |
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133 | self->qspipsu |
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134 | ); |
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135 | } |
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136 | |
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137 | static flash_control flash_instance = { |
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138 | .super = { |
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139 | .read = do_read, |
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140 | .write = do_write, |
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141 | .erase = do_erase, |
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142 | .destroy = do_destroy, |
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143 | .device_identifier = FLASH_DEVICE_ID |
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144 | } |
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145 | }; |
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146 | |
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147 | static rtems_jffs2_mount_data mount_data = { |
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148 | .flash_control = &flash_instance.super, |
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149 | .compressor_control = NULL |
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150 | }; |
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151 | |
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152 | int xilinx_zynqmp_nor_jffs2_initialize( |
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153 | const char *mount_dir, |
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154 | XQspiPsu *qspipsu_ptr |
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155 | ) |
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156 | { |
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157 | int rv = 0; |
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158 | |
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159 | flash_instance.qspipsu = qspipsu_ptr; |
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160 | |
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161 | rv = QspiPsu_NOR_Initialize( |
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162 | flash_instance.qspipsu, |
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163 | ZYNQMP_IRQ_QSPI |
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164 | ); |
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165 | if ( rv != 0 ) { |
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166 | return rv; |
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167 | } |
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168 | |
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169 | uint32_t sect_size = QspiPsu_NOR_Get_Sector_Size(qspipsu_ptr); |
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170 | uint32_t flash_size = QspiPsu_NOR_Get_Device_Size(qspipsu_ptr); |
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171 | flash_instance.super.flash_size = flash_size; |
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172 | flash_instance.super.block_size = sect_size; |
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173 | |
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174 | rv = mount( |
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175 | NULL, |
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176 | mount_dir, |
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177 | RTEMS_FILESYSTEM_TYPE_JFFS2, |
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178 | RTEMS_FILESYSTEM_READ_WRITE, |
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179 | &mount_data |
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180 | ); |
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181 | if ( rv != 0 ) { |
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182 | return rv; |
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183 | } |
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184 | |
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185 | return 0; |
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186 | } |
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