1 | /* SPDX-License-Identifier: BSD-2-Clause */ |
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2 | |
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3 | /** |
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4 | * @file |
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5 | * |
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6 | * @ingroup RTEMSBSPsAArch64XilinxZynqMP |
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7 | * |
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8 | * @brief This source file contains this BSP's console configuration. |
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9 | */ |
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10 | |
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11 | /* |
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12 | * Copyright (C) 2022 On-Line Applications Research Corporation (OAR) |
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13 | * Written by Kinsey Moore <kinsey.moore@oarcorp.com> |
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14 | * |
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15 | * Redistribution and use in source and binary forms, with or without |
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16 | * modification, are permitted provided that the following conditions |
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17 | * are met: |
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18 | * 1. Redistributions of source code must retain the above copyright |
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19 | * notice, this list of conditions and the following disclaimer. |
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20 | * 2. Redistributions in binary form must reproduce the above copyright |
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21 | * notice, this list of conditions and the following disclaimer in the |
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22 | * documentation and/or other materials provided with the distribution. |
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23 | * |
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24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE |
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28 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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34 | * POSSIBILITY OF SUCH DAMAGE. |
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35 | */ |
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36 | |
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37 | #include <rtems/console.h> |
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38 | #include <rtems/bspIo.h> |
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39 | #include <rtems/endian.h> |
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40 | #include <rtems/sysinit.h> |
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41 | #include <rtems/libio.h> /* for rtems_termios_initialize */ |
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42 | |
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43 | #include <bsp/aarch64-mmu.h> |
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44 | #include <bsp/fdt.h> |
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45 | #include <bsp/irq.h> |
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46 | |
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47 | #include <dev/serial/zynq-uart.h> |
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48 | |
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49 | #include <bspopts.h> |
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50 | #include <libfdt.h> |
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51 | |
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52 | #include <libchip/ns16550.h> |
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53 | |
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54 | uint32_t mgmt_uart_reg_shift = 0; |
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55 | static uint8_t get_register(uintptr_t addr, uint8_t i) |
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56 | { |
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57 | volatile uint8_t *reg = (uint8_t *) addr; |
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58 | |
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59 | i <<= mgmt_uart_reg_shift; |
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60 | return reg [i]; |
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61 | } |
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62 | |
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63 | static void set_register(uintptr_t addr, uint8_t i, uint8_t val) |
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64 | { |
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65 | volatile uint8_t *reg = (uint8_t *) addr; |
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66 | |
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67 | i <<= mgmt_uart_reg_shift; |
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68 | reg [i] = val; |
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69 | } |
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70 | |
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71 | static ns16550_context zynqmp_mgmt_uart_context = { |
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72 | .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER("Management UART 0"), |
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73 | .get_reg = get_register, |
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74 | .set_reg = set_register, |
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75 | .port = 0, |
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76 | .irq = 0, |
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77 | .clock = 0, |
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78 | .initial_baud = 0, |
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79 | }; |
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80 | |
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81 | __attribute__ ((weak)) void zynqmp_configure_management_console(rtems_termios_device_context *base) |
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82 | { |
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83 | /* This SLIP-encoded watchdog command sets timeouts to 0xFFFFFFFF seconds. */ |
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84 | const char mgmt_watchdog_cmd[] = |
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85 | "\xc0\xda\x00\x00\xff\xff\xff\xff\xff\x00\xff\xff\xff\xffM#\xc0"; |
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86 | |
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87 | /* Send the system watchdog configuration command */ |
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88 | for (int i = 0; i < sizeof(mgmt_watchdog_cmd); i++) { |
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89 | ns16550_polled_putchar(base, mgmt_watchdog_cmd[i]); |
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90 | } |
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91 | } |
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92 | |
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93 | static void zynqmp_management_console_init(void) |
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94 | { |
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95 | /* Find the management console in the device tree */ |
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96 | const void *fdt = bsp_fdt_get(); |
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97 | const uint32_t *prop; |
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98 | uint32_t outprop[4]; |
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99 | int proplen; |
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100 | int node; |
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101 | |
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102 | const char *alias = fdt_get_alias(fdt, "mgmtport"); |
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103 | if (alias == NULL) { |
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104 | return; |
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105 | } |
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106 | node = fdt_path_offset(fdt, alias); |
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107 | |
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108 | prop = fdt_getprop(fdt, node, "clock-frequency", &proplen); |
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109 | if ( prop == NULL || proplen != 4 ) { |
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110 | zynqmp_mgmt_uart_context.port = 0; |
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111 | return; |
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112 | } |
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113 | outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]); |
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114 | zynqmp_mgmt_uart_context.clock = outprop[0]; |
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115 | |
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116 | prop = fdt_getprop(fdt, node, "current-speed", &proplen); |
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117 | if ( prop == NULL || proplen != 4 ) { |
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118 | zynqmp_mgmt_uart_context.port = 0; |
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119 | return; |
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120 | } |
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121 | outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]); |
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122 | zynqmp_mgmt_uart_context.initial_baud = outprop[0]; |
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123 | |
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124 | prop = fdt_getprop(fdt, node, "interrupts", &proplen); |
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125 | if ( prop == NULL || proplen != 12 ) { |
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126 | zynqmp_mgmt_uart_context.port = 0; |
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127 | return; |
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128 | } |
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129 | outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]); |
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130 | outprop[1] = rtems_uint32_from_big_endian((const uint8_t *) &prop[1]); |
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131 | outprop[2] = rtems_uint32_from_big_endian((const uint8_t *) &prop[2]); |
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132 | /* proplen is in bytes, interrupt mapping expects a length in 32-bit cells */ |
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133 | zynqmp_mgmt_uart_context.irq = bsp_fdt_map_intr(outprop, proplen / 4); |
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134 | if ( zynqmp_mgmt_uart_context.irq == 0 ) { |
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135 | zynqmp_mgmt_uart_context.port = 0; |
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136 | return; |
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137 | } |
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138 | |
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139 | prop = fdt_getprop(fdt, node, "reg", &proplen); |
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140 | if ( prop == NULL || proplen != 16 ) { |
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141 | zynqmp_mgmt_uart_context.port = 0; |
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142 | return; |
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143 | } |
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144 | outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]); |
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145 | outprop[1] = rtems_uint32_from_big_endian((const uint8_t *) &prop[1]); |
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146 | outprop[2] = rtems_uint32_from_big_endian((const uint8_t *) &prop[2]); |
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147 | outprop[3] = rtems_uint32_from_big_endian((const uint8_t *) &prop[3]); |
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148 | zynqmp_mgmt_uart_context.port = ( ( (uint64_t) outprop[0] ) << 32 ) | outprop[1]; |
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149 | uintptr_t uart_base = zynqmp_mgmt_uart_context.port; |
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150 | size_t uart_size = ( ( (uint64_t) outprop[2] ) << 32 ) | outprop[3]; |
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151 | |
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152 | rtems_status_code sc = aarch64_mmu_map( uart_base, |
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153 | uart_size, |
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154 | AARCH64_MMU_DEVICE); |
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155 | if ( sc != RTEMS_SUCCESSFUL ) { |
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156 | zynqmp_mgmt_uart_context.port = 0; |
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157 | return; |
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158 | } |
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159 | |
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160 | prop = fdt_getprop(fdt, node, "reg-offset", &proplen); |
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161 | if ( prop == NULL || proplen != 4 ) { |
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162 | zynqmp_mgmt_uart_context.port = 0; |
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163 | return; |
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164 | } |
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165 | outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]); |
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166 | zynqmp_mgmt_uart_context.port += outprop[0]; |
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167 | |
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168 | prop = fdt_getprop(fdt, node, "reg-shift", &proplen); |
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169 | if ( prop == NULL || proplen != 4 ) { |
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170 | zynqmp_mgmt_uart_context.port = 0; |
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171 | return; |
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172 | } |
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173 | outprop[0] = rtems_uint32_from_big_endian((const uint8_t *) &prop[0]); |
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174 | mgmt_uart_reg_shift = outprop[0]; |
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175 | |
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176 | ns16550_probe(&zynqmp_mgmt_uart_context.base); |
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177 | |
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178 | zynqmp_configure_management_console(&zynqmp_mgmt_uart_context.base); |
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179 | } |
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180 | |
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181 | RTEMS_SYSINIT_ITEM( |
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182 | zynqmp_management_console_init, |
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183 | RTEMS_SYSINIT_BSP_START, |
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184 | RTEMS_SYSINIT_ORDER_FIRST |
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185 | ); |
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186 | |
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187 | static zynq_uart_context zynqmp_uart_instances[2] = { |
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188 | { |
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189 | .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 0" ), |
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190 | .regs = (volatile struct zynq_uart *) 0xff010000, |
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191 | .irq = ZYNQMP_IRQ_UART_0 |
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192 | }, { |
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193 | .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Zynq UART 1" ), |
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194 | .regs = (volatile struct zynq_uart *) 0xff000000, |
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195 | .irq = ZYNQMP_IRQ_UART_1 |
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196 | } |
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197 | }; |
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198 | |
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199 | rtems_status_code console_initialize( |
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200 | rtems_device_major_number major, |
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201 | rtems_device_minor_number minor, |
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202 | void *arg |
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203 | ) |
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204 | { |
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205 | size_t i; |
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206 | |
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207 | rtems_termios_initialize(); |
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208 | |
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209 | for (i = 0; i < RTEMS_ARRAY_SIZE(zynqmp_uart_instances); ++i) { |
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210 | char uart[] = "/dev/ttySX"; |
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211 | |
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212 | uart[sizeof(uart) - 2] = (char) ('0' + i); |
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213 | rtems_termios_device_install( |
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214 | &uart[0], |
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215 | &zynq_uart_handler, |
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216 | NULL, |
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217 | &zynqmp_uart_instances[i].base |
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218 | ); |
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219 | |
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220 | if (i == BSP_CONSOLE_MINOR) { |
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221 | link(&uart[0], CONSOLE_DEVICE_NAME); |
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222 | } |
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223 | } |
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224 | |
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225 | if ( zynqmp_mgmt_uart_context.port != 0 ) { |
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226 | rtems_termios_device_install( |
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227 | "/dev/ttyMGMT0", |
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228 | &ns16550_handler_polled, |
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229 | NULL, |
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230 | &zynqmp_mgmt_uart_context.base |
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231 | ); |
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232 | } |
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233 | |
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234 | return RTEMS_SUCCESSFUL; |
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235 | } |
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236 | |
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237 | void zynqmp_debug_console_flush(void) |
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238 | { |
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239 | zynq_uart_reset_tx_flush(&zynqmp_uart_instances[BSP_CONSOLE_MINOR]); |
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240 | } |
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241 | |
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242 | static void zynqmp_debug_console_out(char c) |
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243 | { |
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244 | rtems_termios_device_context *base = |
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245 | &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base; |
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246 | |
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247 | zynq_uart_write_polled(base, c); |
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248 | } |
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249 | |
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250 | static void zynqmp_debug_console_init(void) |
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251 | { |
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252 | rtems_termios_device_context *base = |
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253 | &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base; |
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254 | |
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255 | zynq_uart_initialize(base); |
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256 | BSP_output_char = zynqmp_debug_console_out; |
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257 | } |
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258 | |
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259 | static void zynqmp_debug_console_early_init(char c) |
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260 | { |
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261 | rtems_termios_device_context *base = |
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262 | &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base; |
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263 | |
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264 | zynq_uart_initialize(base); |
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265 | BSP_output_char = zynqmp_debug_console_out; |
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266 | zynqmp_debug_console_out(c); |
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267 | } |
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268 | |
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269 | static int zynqmp_debug_console_in(void) |
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270 | { |
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271 | rtems_termios_device_context *base = |
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272 | &zynqmp_uart_instances[BSP_CONSOLE_MINOR].base; |
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273 | |
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274 | return zynq_uart_read_polled(base); |
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275 | } |
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276 | |
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277 | BSP_output_char_function_type BSP_output_char = zynqmp_debug_console_early_init; |
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278 | |
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279 | BSP_polling_getchar_function_type BSP_poll_char = zynqmp_debug_console_in; |
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280 | |
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281 | RTEMS_SYSINIT_ITEM( |
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282 | zynqmp_debug_console_init, |
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283 | RTEMS_SYSINIT_BSP_START, |
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284 | RTEMS_SYSINIT_ORDER_LAST_BUT_5 |
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285 | ); |
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