source: rtems/bsps/aarch64/raspberrypi/start/bspstartmmu.c @ b57c6541

Last change on this file since b57c6541 was b57c6541, checked in by Mohd Noor Aman <nooraman5718@…>, on 10/04/22 at 21:38:48

bsp/aarch64: Add new Raspberry Pi 4B BSP

This patch adds new Raspberry pi 4B AArch64 BSP to the RTEMS Family. Currently
only LP64 ABI is supported. ILP32 is not supported. RAM starts from 0x80000 in
64Bit kernel mode and MMU from 0x0. All Raspberrypi Pi 4B models and Raspberry
Pi 400 are supported. All the IRQs are similiar to the older Raspberry pi 2 ARM
BSP.

Raspberry Pi 4B has 2 types of UARTs. Only PL011 serial is supported currently.
Mini-UART is not supported. Mini-UART is default UART on the board so it needs
to be disabled by adding "dtoverlay=disable-bt" to the config.txt. No support
for additional 4 PL011-UARTs on the board.

The raspberrypi.h includes many of the address required for the future
development of the RPi 4B BSP. This includes peripherals, ARM Timer, VideoCore?
Timer, Watchdog, Mailbox, AUX, FIQs and IRQs.

  • Property mode set to 100644
File size: 2.7 KB
Line 
1/* SPDX-License-Identifier: BSD-2-Clause */
2
3/**
4 * @file
5 *
6 * @ingroup RTEMSBSPsAArch64Raspberrypi4
7 *
8 * @brief This source file contains the default MMU tables and setup.
9 */
10
11/*
12 * Copyright (C) 2022 Mohd Noor Aman
13 *
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 *    notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 *    notice, this list of conditions and the following disclaimer in the
22 *    documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <bsp.h>
38#include <bsp/start.h>
39#include <bsp/aarch64-mmu.h>
40#include <bsp/raspberrypi.h>
41#include <libcpu/mmu-vmsav8-64.h>
42
43
44BSP_START_DATA_SECTION static const aarch64_mmu_config_entry
45raspberrypi_4_mmu_config_table[] = {
46  AARCH64_MMU_DEFAULT_SECTIONS,
47
48  { /* RPI peripheral address */
49    .begin = (unsigned)RPI_PERIPHERAL_BASE,
50    .end = (unsigned)RPI_PERIPHERAL_BASE + (unsigned)RPI_PERIPHERAL_SIZE,
51    .flags = AARCH64_MMU_DEVICE
52  },
53
54  { /* RPI ARM local registers */
55    .begin = (unsigned)BCM2711_LOCAL_REGS_BASE,
56    .end = (unsigned)BCM2711_LOCAL_REGS_BASE + (unsigned)BCM2711_LOCAL_REGS_SIZE,
57    .flags = AARCH64_MMU_DEVICE
58  },
59
60  { /* RPI GIC Interface address */
61    .begin = 0xFF800000U,
62    .end = 0xFFA00000U,
63    .flags = AARCH64_MMU_DEVICE
64  }
65
66};
67/*
68 * Make weak and let the user override.
69 */
70BSP_START_TEXT_SECTION void
71raspberrypi_4_setup_mmu_and_cache( void ) __attribute__ ((weak));
72
73BSP_START_TEXT_SECTION void
74raspberrypi_4_setup_mmu_and_cache( void )
75{
76  aarch64_mmu_setup();
77
78  aarch64_mmu_setup_translation_table(
79    &raspberrypi_4_mmu_config_table[ 0 ],
80    RTEMS_ARRAY_SIZE( raspberrypi_4_mmu_config_table )
81  );
82
83  aarch64_mmu_enable();
84}
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