1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup raspberrypi_interrupt |
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5 | * |
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6 | * @brief Interrupt definitions. |
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7 | */ |
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8 | |
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9 | /** |
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10 | * Copyright (c) 2013 Alan Cudmore |
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11 | * Copyright (c) 2022 Mohd Noor Aman |
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12 | * |
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13 | * The license and distribution terms for this file may be |
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14 | * found in the file LICENSE in this distribution or at |
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15 | * |
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16 | * http://www.rtems.org/license/LICENSE |
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17 | * |
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18 | */ |
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19 | |
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20 | #ifndef LIBBSP_ARM_RASPBERRYPI_IRQ_H |
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21 | #define LIBBSP_ARM_RASPBERRYPI_IRQ_H |
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22 | |
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23 | #ifndef ASM |
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24 | |
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25 | #include <rtems.h> |
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26 | #include <rtems/irq.h> |
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27 | #include <rtems/irq-extension.h> |
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28 | #include <dev/irq/arm-gic-irq.h> |
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29 | |
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30 | #if defined(RTEMS_SMP) |
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31 | #include <rtems/score/processormask.h> |
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32 | #endif |
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33 | |
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34 | /** |
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35 | * @defgroup raspberrypi_interrupt Interrrupt Support |
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36 | * |
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37 | * @ingroup RTEMSBSPsARMRaspberryPi |
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38 | * |
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39 | * @brief Interrupt support. |
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40 | */ |
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41 | |
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42 | #define BCM2835_INTC_TOTAL_IRQ (64 + 8) |
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43 | |
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44 | #define BCM2835_IRQ_SET1_MIN 0 |
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45 | #define BCM2835_IRQ_SET2_MIN 32 |
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46 | |
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47 | #define BCM2835_IRQ_ID_GPU_TIMER_M0 0 |
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48 | #define BCM2835_IRQ_ID_GPU_TIMER_M1 1 |
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49 | #define BCM2835_IRQ_ID_GPU_TIMER_M2 2 |
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50 | #define BCM2835_IRQ_ID_GPU_TIMER_M3 3 |
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51 | |
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52 | #define BCM2835_IRQ_ID_USB 9 |
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53 | #define BCM2835_IRQ_ID_AUX 29 |
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54 | #define BCM2835_IRQ_ID_SPI_SLAVE 43 |
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55 | #define BCM2835_IRQ_ID_PWA0 45 |
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56 | #define BCM2835_IRQ_ID_PWA1 46 |
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57 | #define BCM2835_IRQ_ID_SMI 48 |
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58 | #define BCM2835_IRQ_ID_GPIO_0 49 |
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59 | #define BCM2835_IRQ_ID_GPIO_1 50 |
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60 | #define BCM2835_IRQ_ID_GPIO_2 51 |
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61 | #define BCM2835_IRQ_ID_GPIO_3 52 |
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62 | #define BCM2835_IRQ_ID_I2C 53 |
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63 | #define BCM2835_IRQ_ID_SPI 54 |
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64 | #define BCM2835_IRQ_ID_PCM 55 |
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65 | #define BCM2835_IRQ_ID_UART 57 |
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66 | #define BCM2835_IRQ_ID_SD 62 |
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67 | |
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68 | #define BCM2835_IRQ_ID_BASIC_BASE_ID 64 |
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69 | #define BCM2835_IRQ_ID_TIMER_0 64 |
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70 | #define BCM2835_IRQ_ID_MAILBOX_0 65 |
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71 | #define BCM2835_IRQ_ID_DOORBELL_0 66 |
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72 | #define BCM2835_IRQ_ID_DOORBELL_1 67 |
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73 | #define BCM2835_IRQ_ID_GPU0_HALTED 68 |
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74 | #define BCM2835_IRQ_ID_GPU1_HALTED 69 |
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75 | #define BCM2835_IRQ_ID_ILL_ACCESS_1 70 |
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76 | #define BCM2835_IRQ_ID_ILL_ACCESS_0 71 |
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77 | #define BSP_TIMER_VIRT_PPI 27 |
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78 | #define BSP_TIMER_PHYS_NS_PPI 30 |
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79 | #define BSP_VPL011_SPI 32 |
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80 | |
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81 | #define BSP_INTERRUPT_VECTOR_COUNT BCM2835_INTC_TOTAL_IRQ |
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82 | #define BSP_INTERRUPT_VECTOR_INVALID (UINT32_MAX) |
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83 | |
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84 | #define BSP_IRQ_COUNT (BCM2835_INTC_TOTAL_IRQ) |
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85 | |
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86 | #if defined(RTEMS_SMP) |
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87 | static inline rtems_status_code bsp_interrupt_set_affinity( |
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88 | rtems_vector_number vector, |
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89 | const Processor_mask *affinity |
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90 | ) |
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91 | { |
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92 | (void) vector; |
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93 | (void) affinity; |
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94 | return RTEMS_UNSATISFIED; |
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95 | } |
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96 | |
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97 | static inline rtems_status_code bsp_interrupt_get_affinity( |
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98 | rtems_vector_number vector, |
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99 | Processor_mask *affinity |
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100 | ) |
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101 | { |
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102 | (void) vector; |
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103 | _Processor_mask_From_index( affinity, 0 ); |
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104 | return RTEMS_UNSATISFIED; |
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105 | } |
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106 | #endif |
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107 | |
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108 | #endif /* ASM */ |
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109 | #endif /* LIBBSP_ARM_RASPBERRYPI_IRQ_H */ |
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