source:
rtems-tools/tools/4.11/gdb/sparc/gdb-7.7-sis-output-nouartrx.diff
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5cdcde1
Last change on this file since 5cdcde1 was 5cdcde1, checked in by Chris Johns <chrisj@…>, on 05/19/14 at 02:49:52 | |
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sim/erc32/erc32.c
diff -ur gdb-7.7.orig/sim/erc32/erc32.c gdb-7.7/sim/erc32/erc32.c
old new 22 22 /* The control space devices */ 23 23 24 24 #include "config.h" 25 #include <errno.h> 25 26 #include <sys/types.h> 26 27 #include <stdio.h> 27 28 #include <string.h> … … 40 41 extern char uart_dev1[], uart_dev2[]; 41 42 42 43 int dumbio = 0; /* normal, smart, terminal oriented IO by default */ 44 int tty_setup = 1; /* default setup if not a tty */ 45 int disable_uartrx = 0; /* default is to poll for received data */ 43 46 44 47 /* MEC registers */ 45 48 #define MEC_START 0x01f80000 … … 305 308 306 309 extern int ext_irl; 307 310 311 static host_callback *callback; 312 308 313 309 314 /* One-time init */ 310 315 311 316 void 312 init_sim( )317 init_sim(host_callback* cb, int nouartrx) 313 318 { 319 callback = cb; 320 disable_uartrx = nouartrx; 314 321 port_init(); 315 322 } 316 323 … … 940 947 { 941 948 if (dumbio) 942 949 return; /* do nothing */ 943 if ( !ifd1)950 if (ifd1 == 0 && f1open) { 944 951 tcsetattr(0, TCSANOW, &ioc1); 945 if (!ifd2) 952 tcflush(ifd1, TCIFLUSH); 953 } 954 if (ifd2 == 0 && f1open) { 946 955 tcsetattr(0, TCSANOW, &ioc2); 956 tcflush(ifd2, TCIFLUSH); 957 } 947 958 } 948 959 949 960 void … … 951 962 { 952 963 if (dumbio) 953 964 return; /* do nothing */ 954 if ( !ifd1)965 if (ifd1 == 0 && f1open && tty_setup) 955 966 tcsetattr(0, TCSANOW, &iocold1); 956 if ( !ifd2)967 if (ifd2 == 0 && f2open && tty_setup) 957 968 tcsetattr(0, TCSANOW, &iocold2); 958 969 } 959 970 960 971 #define DO_STDIO_READ( _fd_, _buf_, _len_ ) \ 961 ( dumbio 972 ( dumbio || disable_uartrx \ 962 973 ? (0) /* no bytes read, no delay */ \ 963 : read( _fd_, _buf_, _len_ ) ) 974 : (_fd_) == 1 && callback ? \ 975 callback->read_stdin (callback, _buf_, _len_) : \ 976 read( _fd_, _buf_, _len_ ) ) 964 977 965 978 966 979 static void … … 990 1003 } 991 1004 if (f1in) ifd1 = fileno(f1in); 992 1005 if (ifd1 == 0) { 1006 if (callback && !callback->isatty(callback, ifd1)) { 1007 tty_setup = 0; 1008 } 993 1009 if (sis_verbose) 994 1010 printf("serial port A on stdin/stdout\n"); 995 1011 if (!dumbio) { 996 1012 tcgetattr(ifd1, &ioc1); 1013 if (tty_setup) { 997 1014 iocold1 = ioc1; 998 1015 ioc1.c_lflag &= ~(ICANON | ECHO); 999 1016 ioc1.c_cc[VMIN] = 0; 1000 1017 ioc1.c_cc[VTIME] = 0; 1001 1018 } 1019 } 1002 1020 f1open = 1; 1003 1021 } 1004 1022 1005 1023 if (f1out) { 1006 1024 ofd1 = fileno(f1out); 1007 if (!dumbio && ofd1 == 1) setbuf(f1out, NULL);1025 if (!dumbio && tty_setup && ofd1 == 1) setbuf(f1out, NULL); 1008 1026 } 1009 1027 1010 1028 if (uart_dev2[0] != 0) … … 1023 1041 printf("serial port B on stdin/stdout\n"); 1024 1042 if (!dumbio) { 1025 1043 tcgetattr(ifd2, &ioc2); 1044 if (tty_setup) { 1026 1045 iocold2 = ioc2; 1027 1046 ioc2.c_lflag &= ~(ICANON | ECHO); 1028 1047 ioc2.c_cc[VMIN] = 0; 1029 1048 ioc2.c_cc[VTIME] = 0; 1030 1049 } 1050 } 1031 1051 f2open = 1; 1032 1052 } 1033 1053 1034 1054 if (f2out) { 1035 1055 ofd2 = fileno(f2out); 1036 if (!dumbio && ofd2 == 1) setbuf(f2out, NULL);1056 if (!dumbio && tty_setup && ofd2 == 1) setbuf(f2out, NULL); 1037 1057 } 1038 1058 1039 1059 wnuma = wnumb = 0; … … 1062 1082 if (f1open) { 1063 1083 anum = DO_STDIO_READ(ifd1, aq, UARTBUF); 1064 1084 } 1085 else { 1086 anum = 0; 1087 } 1065 1088 if (anum > 0) { 1066 1089 aind = 0; 1067 1090 if ((aind + 1) < anum) … … 1094 1117 if (f2open) { 1095 1118 bnum = DO_STDIO_READ(ifd2, bq, UARTBUF); 1096 1119 } 1120 else { 1121 bnum = 0; 1122 } 1097 1123 if (bnum > 0) { 1098 1124 bind = 0; 1099 1125 if ((bind + 1) < bnum) … … 1126 1152 if (f1open) { 1127 1153 anum = DO_STDIO_READ(ifd1, aq, UARTBUF); 1128 1154 } 1155 else { 1156 anum = 0; 1157 } 1129 1158 if (anum > 0) { 1130 1159 Ucontrol |= 0x00000001; 1131 1160 aind = 0; … … 1138 1167 if (f2open) { 1139 1168 bnum = DO_STDIO_READ(ifd2, bq, UARTBUF); 1140 1169 } 1170 else { 1171 bnum = 0; 1172 } 1141 1173 if (bnum > 0) { 1142 1174 Ucontrol |= 0x00010000; 1143 1175 bind = 0; … … 1178 1210 if (wnuma < UARTBUF) 1179 1211 wbufa[wnuma++] = c; 1180 1212 else { 1181 while (wnuma) 1213 while (wnuma) { 1214 if (ofd1 == 1 && callback) 1215 wnuma -= callback->write_stdout(callback, wbufa, wnuma); 1216 else 1182 1217 wnuma -= fwrite(wbufa, 1, wnuma, f1out); 1218 } 1183 1219 wbufa[wnuma++] = c; 1184 1220 } 1185 1221 } … … 1202 1238 if (wnumb < UARTBUF) 1203 1239 wbufb[wnumb++] = c; 1204 1240 else { 1205 while (wnumb) 1241 while (wnumb) { 1242 if (ofd1 == 1 && callback) 1243 wnumb -= callback->write_stdout(callback, wbufb, wnumb); 1244 else 1206 1245 wnumb -= fwrite(wbufb, 1, wnumb, f2out); 1246 } 1207 1247 wbufb[wnumb++] = c; 1208 1248 } 1209 1249 } … … 1241 1281 static void 1242 1282 flush_uart() 1243 1283 { 1244 while (wnuma && f1open) 1284 while (wnuma && f1open) { 1285 if (ofd1 == 1 && callback) { 1286 wnuma -= callback->write_stdout(callback, wbufa, wnuma); 1287 callback->flush_stdout(callback); 1288 } 1289 else 1245 1290 wnuma -= fwrite(wbufa, 1, wnuma, f1out); 1246 while (wnumb && f2open) 1291 } 1292 while (wnumb && f2open) { 1293 if (ofd2 == 1 && callback) { 1294 wnuma -= callback->write_stdout(callback, wbufb, wnuma); 1295 callback->flush_stdout(callback); 1296 } 1297 else 1247 1298 wnumb -= fwrite(wbufb, 1, wnumb, f2out); 1248 1299 } 1300 } 1249 1301 1250 1302 1251 1303 1252 1304 static void 1253 1305 uarta_tx() 1254 1306 { 1255 1256 while (f1open && fwrite(&uarta_sreg, 1, 1, f1out) != 1); 1307 while (f1open) { 1308 if (ofd1 == 1 && callback) { 1309 while (callback->write_stdout(callback, &uarta_sreg, 1) != 1); 1310 } 1311 else { 1312 while (fwrite(&uarta_sreg, 1, 1, f1out) != 1); 1313 } 1314 } 1257 1315 if (uart_stat_reg & UARTA_HRE) { 1258 1316 uart_stat_reg |= UARTA_SRE; 1259 1317 } else { … … 1267 1325 static void 1268 1326 uartb_tx() 1269 1327 { 1270 while (f2open && fwrite(&uartb_sreg, 1, 1, f2out) != 1); 1328 while (f2open) { 1329 if (ofd2 == 1 && callback) { 1330 while (callback->write_stdout(callback, &uarta_sreg, 1) != 1); 1331 } 1332 else { 1333 while (fwrite(&uartb_sreg, 1, 1, f2out) != 1); 1334 } 1335 } 1271 1336 if (uart_stat_reg & UARTB_HRE) { 1272 1337 uart_stat_reg |= UARTB_SRE; 1273 1338 } else { … … 1289 1354 rsize = 0; 1290 1355 if (f1open) 1291 1356 rsize = DO_STDIO_READ(ifd1, &rxd, 1); 1357 else 1358 rsize = 0; 1292 1359 if (rsize > 0) { 1293 1360 uarta_data = UART_DR | rxd; 1294 1361 if (uart_stat_reg & UARTA_HRE) … … 1305 1372 rsize = 0; 1306 1373 if (f2open) 1307 1374 rsize = DO_STDIO_READ(ifd2, &rxd, 1); 1375 else 1376 rsize = 0; 1308 1377 if (rsize) { 1309 1378 uartb_data = UART_DR | rxd; 1310 1379 if (uart_stat_reg & UARTB_HRE) -
sim/erc32/interf.c
diff -ur gdb-7.7.orig/sim/erc32/interf.c gdb-7.7/sim/erc32/interf.c
old new 185 185 int argc = 0; 186 186 int stat = 1; 187 187 int freq = 0; 188 int nouartrx = 0; 188 189 189 190 sim_callback = callback; 190 191 … … 210 211 if (strcmp(argv[stat], "-dumbio") == 0) { 211 212 dumbio = 1; 212 213 } else 214 if (strcmp(argv[stat], "-nouartrx") == 0) { 215 nouartrx = 1; 216 } else 213 217 if (strcmp(argv[stat], "-wrp") == 0) { 214 218 wrp = 1; 215 219 } else … … 268 272 dinfo.endian = BFD_ENDIAN_BIG; 269 273 reset_all(); 270 274 ebase.simtime = 0; 271 init_sim( );275 init_sim(callback, nouartrx); 272 276 init_bpt(&sregs); 273 277 reset_stat(&sregs); 274 278 -
sim/erc32/sis.c
diff -ur gdb-7.7.orig/sim/erc32/sis.c gdb-7.7/sim/erc32/sis.c
old new 166 166 int cont = 1; 167 167 int stat = 1; 168 168 int freq = 14; 169 int nouartrx = 0; 169 170 int copt = 0; 170 171 171 172 char *cfile, *bacmd; … … 214 215 #endif 215 216 } else if (strcmp(argv[stat], "-dumbio") == 0) { 216 217 dumbio = 1; 218 } else if (strcmp(argv[stat], "-nouartrx") == 0) { 219 nouartrx = 1; 217 220 } else { 218 221 printf("unknown option %s\n", argv[stat]); 219 222 usage(); … … 241 244 ebase.simtime = 0; 242 245 reset_all(); 243 246 init_bpt(&sregs); 244 init_sim( );247 init_sim(NULL, nouartrx); 245 248 #ifdef STAT 246 249 reset_stat(&sregs); 247 250 #endif -
sim/erc32/sis.h
diff -ur gdb-7.7.orig/sim/erc32/sis.h gdb-7.7/sim/erc32/sis.h
old new 159 159 /* Prototypes */ 160 160 161 161 /* erc32.c */ 162 extern void init_sim ( void);162 extern void init_sim (host_callback* sb, int nouartrx); 163 163 extern void reset (void); 164 164 extern void error_mode (uint32 pc); 165 165 extern void sim_halt (void);
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