source: rtems-tools/tools/4.11/gdb/sparc/7.9/0003-sim-erc32-Perform-pseudo-init-if-binary-linked-to-no.patch @ bfd2b7d

4.104.115
Last change on this file since bfd2b7d was bfd2b7d, checked in by Joel Sherrill <joel.sherrill@…>, on 03/26/15 at 18:20:45

Add Jiri Gaisler SIS patch set for gdb 7.9

This patch set adds a lot of new capability including support for
the leon2 and leon3. It also eliminates the difference between
the initial state of the simulated erc32 and the real hardware.

  • Property mode set to 100644
File size: 2.6 KB
  • sim/erc32/erc32.c

    From 78a59b9928b59065cbffca153db9620c0ff80036 Mon Sep 17 00:00:00 2001
    From: Jiri Gaisler <jiri@gaisler.se>
    Date: Sat, 30 Aug 2014 22:53:56 +0200
    Subject: [PATCH 03/23] sim/erc32: Perform pseudo-init if binary linked to
     non-zero address.
    
    Binaries produced by most erc32 tool-chains do not include
    system initialization. sis will detect this and initialize
    necessary registers for memory and timer control.
    
    	* erc32.c (mec_read) allow simulator memory size to be read
    	by application. (boot_init) initialize memory and timers if
    	start address is not 0.
    
    	* erc32,c (exe_cmd) call boot_init if start address not 0
    	* interf.c (run_sim) Likewise
    ---
     sim/erc32/erc32.c  | 24 ++++++++++++++++++++++++
     sim/erc32/func.c   |  2 ++
     sim/erc32/interf.c |  1 +
     3 files changed, 27 insertions(+)
    
    diff --git a/sim/erc32/erc32.c b/sim/erc32/erc32.c
    index 4d4177e..0f3e870 100644
    a b mec_read(addr, asi, data) 
    743743        *data = read_uart(addr);
    744744        break;
    745745
     746    case 0xF4:          /* simulator RAM size in bytes */
     747        *data = 4096*1024;
     748        break;
     749
     750    case 0xF8:          /* simulator ROM size in bytes */
     751        *data = 1024*1024;
     752        break;
     753
    746754    default:
    747755        set_sfsr(MEC_ACC, addr, asi, 1);
    748756        return (1);
    sis_memory_read(addr, data, length) 
    18871895    memcpy(data, mem, length);
    18881896    return (length);
    18891897}
     1898
     1899extern struct pstate sregs;
     1900
     1901void
     1902boot_init (void)
     1903{
     1904    mec_write(MEC_WCR, 0);      /* zero waitstates */
     1905    mec_write(MEC_TRAPD, 0);    /* turn off watch-dog */
     1906    mec_write(MEC_RTC_SCALER, sregs.freq-1); /* generate 1 MHz RTC tick */
     1907    mec_write(MEC_MEMCFG, (3 << 18) | (4 << 10)); /* 1 MB ROM, 4 MB RAM */
     1908    sregs.wim = 2;
     1909    sregs.psr = 0x110010e0;
     1910    sregs.r[30] = RAM_END;
     1911    sregs.r[14] = sregs.r[30] - 96*4;
     1912    mec_mcr |= 1;               /* power-down enabled */
     1913}
  • sim/erc32/func.c

    diff --git a/sim/erc32/func.c b/sim/erc32/func.c
    index e6744ee..6526085 100644
    a b exec_cmd(sregs, cmd) 
    468468            }
    469469            sregs->pc = len & ~3;
    470470            sregs->npc = sregs->pc + 4;
     471            if ((sregs->pc != 0) && (ebase.simtime == 0))
     472                boot_init();
    471473            printf("resuming at 0x%08x\n",sregs->pc);
    472474            if ((cmd2 = strtok(NULL, " \t\n\r")) != NULL) {
    473475                stat = run_sim(sregs, VAL(cmd2), 0);
  • sim/erc32/interf.c

    diff --git a/sim/erc32/interf.c b/sim/erc32/interf.c
    index 63b3f38..9ac455f 100644
    a b run_sim(sregs, icount, dis) 
    7878   init_stdio();
    7979   sregs->starttime = time(NULL);
    8080   irq = 0;
     81   if ((sregs->pc != 0) && (ebase.simtime == 0)) boot_init();
    8182   while (!sregs->err_mode & (icount > 0)) {
    8283
    8384        sregs->fhold = 0;
Note: See TracBrowser for help on using the repository browser.