source: rtems-tools/tester/rtems/rtems-bsps-riscv.ini @ d343f83

Last change on this file since d343f83 was d343f83, checked in by Sebastian Huber <sebastian.huber@…>, on Aug 7, 2018 at 4:58:34 AM

tester: Exclude SMP build of some RISC-V BSPs

It makes no sense to build BSPs without support for atomic instructions
with SMP enabled.

Update #3433.

  • Property mode set to 100644
File size: 1.1 KB
Line 
1#
2# RTEMS Tools Project (http://www.rtems.org/)
3# Copyright 2018 embedded brains GmbH
4# All rights reserved.
5#
6# This file is part of the RTEMS Tools package in 'rtems-bsp-builder'.
7#
8# Permission to use, copy, modify, and/or distribute this software for any
9# purpose with or without fee is hereby granted, provided that the above
10# copyright notice and this permission notice appear in all copies.
11#
12# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19
20#
21# RISC-V Architecture
22#
23[riscv]
24bsps = rv32iac, rv32i, rv32imac, rv32imafc, rv32imafdc, rv32imafd, rv32im,
25       rv64imac, rv64imac_medany, rv64imafdc, rv64imafd, rv64imafdc_medany,
26       rv64imafd_medany
27exclude-smp = rv32i, rv32im
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