source: rtems-tools/tester/covoar/Target_aarch64.cc @ 0c4884a

Last change on this file since 0c4884a was 0c4884a, checked in by Alex White <alex.white@…>, on Apr 16, 2021 at 6:24:15 PM

covoar/Target_aarch64: Swap QEMU taken/not taken bits

This overrides the TargetBase behavior to allow branches to be marked
correctly as either taken or not taken.

Closes #4387

  • Property mode set to 100644
File size: 2.7 KB
Line 
1/*! @file Target_aarch64.cc
2 *  @brief Target_aarch64 Implementation
3 *
4 *  This file contains the implementation of the base class for
5 *  functions supporting target unique functionallity.
6 */
7
8#include <stdio.h>
9#include <stdlib.h>
10#include <string.h>
11#include <unistd.h>
12
13#include <rld.h>
14
15#include "qemu-traces.h"
16#include "Target_aarch64.h"
17
18namespace Target {
19
20  Target_aarch64::Target_aarch64( std::string targetName ):
21    TargetBase( targetName )
22  {
23    conditionalBranchInstructions.push_back("cbnz");
24    conditionalBranchInstructions.push_back("cbz");
25    conditionalBranchInstructions.push_back("tbnz");
26    conditionalBranchInstructions.push_back("tbz");
27    conditionalBranchInstructions.push_back("b.eq");
28    conditionalBranchInstructions.push_back("b.ne");
29    conditionalBranchInstructions.push_back("b.cs");
30    conditionalBranchInstructions.push_back("b.hs");
31    conditionalBranchInstructions.push_back("b.cc");
32    conditionalBranchInstructions.push_back("b.lo");
33    conditionalBranchInstructions.push_back("b.mi");
34    conditionalBranchInstructions.push_back("b.pl");
35    conditionalBranchInstructions.push_back("b.vs");
36    conditionalBranchInstructions.push_back("b.vc");
37    conditionalBranchInstructions.push_back("b.hi");
38    conditionalBranchInstructions.push_back("b.ls");
39    conditionalBranchInstructions.push_back("b.ge");
40    conditionalBranchInstructions.push_back("b.lt");
41    conditionalBranchInstructions.push_back("b.gt");
42    conditionalBranchInstructions.push_back("b.le");
43
44    conditionalBranchInstructions.sort();
45  }
46
47  Target_aarch64::~Target_aarch64()
48  {
49  }
50
51  bool Target_aarch64::isNopLine(
52    const char* const line,
53    int&              size
54  )
55  {
56    if (!strcmp( &line[strlen(line)-3], "nop")) {
57      size = 4;
58      return true;
59    }
60
61    if (!strncmp( &line[strlen(line)-6], "udf", 3)) {
62      size = 4;
63      return true;
64    }
65
66    // On ARM, there are literal tables at the end of methods.
67    // We need to avoid them.
68    if (!strncmp( &line[strlen(line)-10], ".byte", 5)) {
69      size = 1;
70      return true;
71    }
72    if (!strncmp( &line[strlen(line)-13], ".short", 6)) {
73      size = 2;
74      return true;
75    }
76    if (!strncmp( &line[strlen(line)-16], ".word", 5)) {
77      size = 4;
78      return true;
79    }
80
81    return false;
82  }
83
84  bool Target_aarch64::isBranch(
85      const char* instruction
86  )
87  {
88    throw rld::error(
89      "DETERMINE BRANCH INSTRUCTIONS FOR THIS ARCHITECTURE! -- fix me",
90      "Target_aarch64::isBranch"
91    );
92  }
93
94  uint8_t Target_aarch64::qemuTakenBit()
95  {
96    return TRACE_OP_BR1;
97  }
98
99  uint8_t Target_aarch64::qemuNotTakenBit()
100  {
101    return TRACE_OP_BR0;
102  }
103
104  TargetBase *Target_aarch64_Constructor(
105    std::string          targetName
106  )
107  {
108    return new Target_aarch64( targetName );
109  }
110
111}
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