source: rtems-schedsim/schedsim/rtems/sched_cpu/rtems/score/types.h @ a2aad55

Last change on this file since a2aad55 was a2aad55, checked in by Joel Sherrill <joel.sherrill@…>, on 05/01/13 at 00:41:56

Remove CVS $

  • Property mode set to 100644
File size: 1022 bytes
Line 
1/**
2 * @file rtems/score/types.h
3 */
4
5/*
6 *  BASED UPON SOURCE IN RTEMS, MODIFIED FOR SIMULATOR
7 *
8 *  This include file contains type definitions pertaining to the Intel
9 *  no_cpu processor family.
10 *
11 *  COPYRIGHT (c) 1989-2013.
12 *  On-Line Applications Research Corporation (OAR).
13 *
14 *  The license and distribution terms for this file may be
15 *  found in the file LICENSE in this distribution or at
16 *  http://www.rtems.com/license/LICENSE.
17 */
18
19#ifndef _RTEMS_SCORE_TYPES_H
20#define _RTEMS_SCORE_TYPES_H
21
22#include <rtems/score/basedefs.h>
23
24#ifndef ASM
25
26#ifdef __cplusplus
27extern "C" {
28#endif
29
30/*
31 *  This section defines the basic types for this processor.
32 */
33
34/** This defines the type for a priority bit map entry. */
35typedef uint16_t Priority_bit_map_Control;
36
37/** This defines the return type for an ISR entry point. */
38typedef void no_cpu_isr;
39
40/** This defines the prototype for an ISR entry point. */
41typedef no_cpu_isr ( *no_cpu_isr_entry )( void );
42
43#ifdef __cplusplus
44}
45#endif
46
47#endif  /* !ASM */
48
49#endif
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