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source: rtems-libbsd/rtemsbsd/include/machine/rtems-bsd-nexus-bus.h @ 25a8832

6-freebsd-12

Last change on this file since 25a8832 was 25a8832, checked in by Chris Johns <chrisj@…>, on 10/20/21 at 03:15:28
Add support for Xilinx Versal APAC
Property mode set to `100644`
File size: 28.8 KB

Line
1	/*
2	* Copyright (c) 2013-2015 embedded brains GmbH. All rights reserved.
3	*
4	* embedded brains GmbH
5	* Dornierstr. 4
6	* 82178 Puchheim
7	* Germany
8	* <rtems@embedded-brains.de>
9	*
10	* Copyright (c) 2016 Chris Johns <chrisj@rtems.org> All rights reserved.
11
12	* Redistribution and use in source and binary forms, with or without
13	* modification, are permitted provided that the following conditions
14	* are met:
15	* 1. Redistributions of source code must retain the above copyright
16	* notice, this list of conditions and the following disclaimer.
17	* 2. Redistributions in binary form must reproduce the above copyright
18	* notice, this list of conditions and the following disclaimer in the
19	* documentation and/or other materials provided with the distribution.
20	*
21	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22	* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24	* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
25	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27	* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28	* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29	* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30	* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31	* SUCH DAMAGE.
32	*/
33
34	/*
35	* The Nexus bus devices.
36	*
37	* Driver Summary is:
38	*
39	* Devices:
40	* RTEMS_BSD_DRIVER_XILINX_ZYNQ_SLCR
41	* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SLCR
42	* RTEMS_BSD_DRIVER_LPC32XX_PWR
43	* RTEMS_BSD_DRIVER_LPC32XX_TSC
44	*
45	* Buses:
46	* RTEMS_BSD_DRIVER_PC_LEGACY
47	*
48	* USB:
49	* RTEMS_BSD_DRIVER_DW_OTG
50	* RTEMS_BSD_DRIVER_LPC32XX_OHCI
51	* RTEMS_BSD_DRIVER_MMC
52	* RTEMS_BSD_DRIVER_USB
53	* RTEMS_BSD_DRIVER_USB_MASS
54	*
55	* Networking:
56	* RTEMS_BSD_DRIVER_SMC0
57	* RTEMS_BSD_DRIVER_SMC0_BASE_ADDR
58	* RTEMS_BSD_DRIVER_SMC0_IRQ
59	* RTEMS_BSD_DRIVER_LPC32XX_LPE
60	* RTEMS_BSD_DRIVER_FEC
61	* RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM0
62	* RTEMS_BSD_DRIVER_CGEM0_IRQ
63	* RTEMS_BSD_DRIVER_DWC0
64	* RTEMS_BSD_DRIVER_DWC0_BASE_ADDR
65	* RTEMS_BSD_DRIVER_DWC0_IRQ
66	* RTEMS_BSD_DRIVER_TSEC
67	* RTEMS_BSD_DRIVER_TSEC_BASE_ADDR
68	* RTEMS_BSD_DRIVER_TSEC_TX_IRQ
69	* RTEMS_BSD_DRIVER_TSEC_RX_IRQ
70	* RTEMS_BSD_DRIVER_TSEC_ER_IRQ
71	* RTEMS_BSD_DRIVER_PCI_LEM
72	* RTEMS_BSD_DRIVER_PCI_IGB
73	* RTEMS_BSD_DRIVER_PCI_EM
74	* RTEMS_BSD_DRIVER_PCI_RE
75	*
76	* MMI PHY:
77	* RTEMS_BSD_DRIVER_E1000PHY
78	* RTEMS_BSD_DRIVER_ICSPHY
79	* RTEMS_BSD_DRIVER_REPHY
80	* RTEMS_BSD_DRIVER_PHY_MIC
81	* RTEMS_BSD_DRIVER_UKPHY
82	*/
83
84	#if !defined(RTEMS_BSD_NEXUS_BUS_h)
85	#define RTEMS_BSD_NEXUS_BUS_h
86
87	#include <rtems/bsd/bsd.h>
88
89	#ifdef __cplusplus
90	extern "C" {
91	#endif /* __cplusplus */
92
93	/**
94	* Keep the order of the groups.
95	**/
96
97	/**
98	** Devices
99	**
100	**/
101
102	/*
103	* Xilinx Zynq System Level Control Registers (SLCR).
104	*/
105	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQ_SLCR)
106	/*
107	* Hard IP part of the Zynq so a fixed address.
108	*/
109	#define RTEMS_BSD_DRIVER_XILINX_ZYNQ_SLCR \
110	static const rtems_bsd_device_resource zy7_slcr_res[] = { \
111	{ \
112	.type = RTEMS_BSD_RES_MEMORY, \
113	.start_request = 0, \
114	.start_actual = 0xf8000000 \
115	} \
116	}; \
117	RTEMS_BSD_DEFINE_NEXUS_DEVICE(zy7_slcr, 0, \
118	RTEMS_ARRAY_SIZE(zy7_slcr_res), \
119	&zy7_slcr_res[0])
120	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQ_SLCR */
121
122	/*
123	* Xilinx ZynqMP System Level Control Registers (SLCR).
124	*/
125	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SLCR)
126	/*
127	* Hard IP part of the ZynqMP so a fixed address.
128	*/
129	#define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SLCR \
130	static const rtems_bsd_device_resource zynqmp_slcr_res[] = { \
131	{ \
132	.type = RTEMS_BSD_RES_MEMORY, \
133	.start_request = 0, \
134	.start_actual = 0xf0000000 \
135	} \
136	}; \
137	RTEMS_BSD_DEFINE_NEXUS_DEVICE(zynqmp_slcr, 0, \
138	RTEMS_ARRAY_SIZE(zynqmp_slcr_res), \
139	&zynqmp_slcr_res[0])
140	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SLCR */
141
142	/*
143	* Xilinx Versal System Level Control Registers (SLCR).
144	*/
145	#if !defined(RTEMS_BSD_DRIVER_XILINX_VERSAL_SLCR)
146	/*
147	* Hard IP part of the Versal so a fixed address.
148	*/
149	#define RTEMS_BSD_DRIVER_XILINX_VERSAL_SLCR \
150	static const rtems_bsd_device_resource versal_slcr_res[] = { \
151	{ \
152	.type = RTEMS_BSD_RES_MEMORY, \
153	.start_request = 0, \
154	.start_actual = 0xf0000000 \
155	} \
156	}; \
157	RTEMS_BSD_DEFINE_NEXUS_DEVICE(versal_slcr, 0, \
158	RTEMS_ARRAY_SIZE(versal_slcr_res), \
159	&versal_slcr_res[0])
160	#endif /* RTEMS_BSD_DRIVER_XILINX_VERSAL_SLCR */
161
162	/*
163	* Xilinx ZynqMP Arasan SDIO Driver.
164	*/
165	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI)
166	#define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI(_num, _base, _irq) \
167	static const rtems_bsd_device_resource arasan_sdhci ## _num ## _res[] = { \
168	{ \
169	.type = RTEMS_BSD_RES_MEMORY, \
170	.start_request = 0, \
171	.start_actual = (_base) \
172	}, { \
173	.type = RTEMS_BSD_RES_IRQ, \
174	.start_request = 0, \
175	.start_actual = (_irq) \
176	} \
177	}; \
178	RTEMS_BSD_DEFINE_NEXUS_DEVICE(arasan_sdhci, _num, \
179	RTEMS_ARRAY_SIZE(arasan_sdhci ## _num ## _res), \
180	&arasan_sdhci ## _num ## _res[0])
181	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI */
182	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI0)
183	#define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI0 \
184	RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI(0, 0xFF160000, 80)
185	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI0 */
186	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI1)
187	#define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI1 \
188	RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI(1, 0xFF170000, 81)
189	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_SDHCI1 */
190
191	/*
192	* Xilinx Zynq Arasan SDIO Driver.
193	*/
194	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI)
195	#define RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI(_num, _base, _irq) \
196	static const rtems_bsd_device_resource arasan_sdhci ## _num ## _res[] = { \
197	{ \
198	.type = RTEMS_BSD_RES_MEMORY, \
199	.start_request = 0, \
200	.start_actual = (_base) \
201	}, { \
202	.type = RTEMS_BSD_RES_IRQ, \
203	.start_request = 0, \
204	.start_actual = (_irq) \
205	} \
206	}; \
207	RTEMS_BSD_DEFINE_NEXUS_DEVICE(arasan_sdhci, _num, \
208	RTEMS_ARRAY_SIZE(arasan_sdhci ## _num ## _res), \
209	&arasan_sdhci ## _num ## _res[0])
210	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI */
211	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI0)
212	#define RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI0 \
213	RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI(0, 0xE0100000, 56)
214	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI0 */
215	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI1)
216	#define RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI1 \
217	RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI(1, 0xE0101000, 79)
218	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQ_SDHCI1 */
219
220	/*
221	* LPC32XX Power Control (PWR).
222	*/
223	#if !defined(RTEMS_BSD_DRIVER_LPC32XX_PWR)
224	#define RTEMS_BSD_DRIVER_LPC32XX_PWR \
225	static const rtems_bsd_device_resource lpc_pwr0_res[] = { \
226	{ \
227	.type = RTEMS_BSD_RES_MEMORY, \
228	.start_request = 0, \
229	.start_actual = LPC32XX_BASE_SYSCON \
230	} \
231	}; \
232	RTEMS_BSD_DEFINE_NEXUS_DEVICE_ORDERED(pwr, 0, RTEMS_SYSINIT_ORDER_FIRST, \
233	RTEMS_ARRAY_SIZE(lpc_pwr0_res), \
234	&lpc_pwr0_res[0])
235	#endif /* RTEMS_BSD_DRIVER_LPC32XX_PWR */
236
237	/*
238	* LPC32XX TSC.
239	*/
240	#if !defined(RTEMS_BSD_DRIVER_LPC32XX_TSC)
241	#define RTEMS_BSD_DRIVER_LPC32XX_TSC \
242	static const rtems_bsd_device_resource lpc_tsc0_res[] = { \
243	{ \
244	.type = RTEMS_BSD_RES_MEMORY, \
245	.start_request = 0, \
246	.start_actual = LPC32XX_BASE_ADC \
247	}, { \
248	.type = RTEMS_BSD_RES_IRQ, \
249	.start_request = 0, \
250	.start_actual = LPC32XX_IRQ_TS_IRQ_OR_ADC \
251	} \
252	}; \
253	RTEMS_BSD_DEFINE_NEXUS_DEVICE(lpctsc, 0, \
254	RTEMS_ARRAY_SIZE(lpc_tsc0_res), \
255	&lpc_tsc0_res[0])
256	#endif /* RTEMS_BSD_DRIVER_LPC32XX_TSC */
257
258	/**
259	** Physical Buses
260	**/
261
262	/*
263	* PC legacy bus.
264	*/
265	#if !defined(RTEMS_BSD_DRIVER_PC_LEGACY)
266	#define RTEMS_BSD_DRIVER_PC_LEGACY \
267	RTEMS_BSD_DEFINE_NEXUS_DEVICE(legacy, 0, 0, NULL); \
268	SYSINIT_DRIVER_REFERENCE(pcib, legacy); \
269	SYSINIT_DRIVER_REFERENCE(pci, pcib)
270	#endif /* RTEMS_BSD_DRIVER_PC_LEGACY */
271
272	/**
273	** USB
274	**/
275
276	/*
277	* Designware/Synopsys OTG USB Controller.
278	*/
279	#if !defined(RTEMS_BSD_DRIVER_DW_OTG)
280	#define RTEMS_BSD_DRIVER_DW_OTG \
281	SYSINIT_DRIVER_REFERENCE(dwcotg, simplebus)
282	#endif /* RTEMS_BSD_DRIVER_DW_OTG */
283
284	/*
285	* LPC32XX OHCI.
286	*/
287	#if !defined(RTEMS_BSD_DRIVER_LPC32XX_OHCI)
288	#define RTEMS_BSD_DRIVER_LPC32XX_OHCI \
289	static const rtems_bsd_device_resource lpc_ohci0_res[] = { \
290	{ \
291	.type = RTEMS_BSD_RES_MEMORY, \
292	.start_request = 0, \
293	.start_actual = LPC32XX_BASE_USB \
294	}, { \
295	.type = RTEMS_BSD_RES_MEMORY, \
296	.start_request = 0, \
297	.start_actual = (unsigned long)(&LPC32XX_I2C_RX) \
298	}, { \
299	.type = RTEMS_BSD_RES_IRQ, \
300	.start_request = 0, \
301	.start_actual = LPC32XX_IRQ_USB_HOST \
302	} \
303	}; \
304	RTEMS_BSD_DEFINE_NEXUS_DEVICE(ohci, 0, \
305	RTEMS_ARRAY_SIZE(lpc_ohci0_res), \
306	&lpc_ohci0_res[0])
307	#endif /* RTEMS_BSD_DRIVER_LPC32XX_OHCI */
308
309	/*
310	* Designware/Synopsys MMC.
311	*/
312	#if !defined(RTEMS_BSD_DRIVER_DW_MMC)
313	#define RTEMS_BSD_DRIVER_DW_MMC \
314	SYSINIT_DRIVER_REFERENCE(dw_mmc, simplebus)
315	#endif /* RTEMS_BSD_DRIVER_DW_MMC */
316
317	/*
318	* Atmel Media Card Interface (MCI).
319	*/
320	#if !defined(RTEMS_BSD_DRIVER_AT91_MCI0)
321	#define RTEMS_BSD_DRIVER_AT91_MCI0(_base, _irq) \
322	static const rtems_bsd_device_resource at91_mci0_res[] = { \
323	{ \
324	.type = RTEMS_BSD_RES_MEMORY, \
325	.start_request = 0, \
326	.start_actual = (_base) \
327	}, { \
328	.type = RTEMS_BSD_RES_IRQ, \
329	.start_request = 0, \
330	.start_actual = (_irq) \
331	} \
332	}; \
333	RTEMS_BSD_DEFINE_NEXUS_DEVICE(at91_mci, 0, \
334	RTEMS_ARRAY_SIZE(at91_mci0_res), \
335	&at91_mci0_res[0])
336	#endif /* RTEMS_BSD_DRIVER_AT91_MCI0 */
337
338	/*
339	* MMC Driver.
340	*/
341	#if !defined(RTEMS_BSD_DRIVER_MMC)
342	#define RTEMS_BSD_DRIVER_MMC \
343	SYSINIT_DRIVER_REFERENCE(mmcsd, mmc)
344	#endif /* RTEMS_BSD_DRIVER_MMC */
345
346	#if !defined(RTEMS_BSD_DRIVER_ST_SDMMC)
347	#define RTEMS_BSD_DRIVER_ST_SDMMC(_num, _base, _dlyb, _irq) \
348	static const rtems_bsd_device_resource st_sdmmc ## _num ## _res[] = { \
349	{ \
350	.type = RTEMS_BSD_RES_MEMORY, \
351	.start_request = 0, \
352	.start_actual = (_base) \
353	}, { \
354	.type = RTEMS_BSD_RES_MEMORY, \
355	.start_request = 1, \
356	.start_actual = (_dlyb) \
357	}, { \
358	.type = RTEMS_BSD_RES_IRQ, \
359	.start_request = 0, \
360	.start_actual = (_irq) \
361	} \
362	}; \
363	RTEMS_BSD_DEFINE_NEXUS_DEVICE(st_sdmmc, 0, \
364	RTEMS_ARRAY_SIZE(st_sdmmc ## _num ## _res), \
365	&st_sdmmc ## _num ## _res[0])
366	#endif /* RTEMS_BSD_DRIVER_ST_SDMMC */
367
368	/*
369	* USB Drivers.
370	*/
371	#if !defined(RTEMS_BSD_DRIVER_USB)
372	#define RTEMS_BSD_DRIVER_USB \
373	SYSINIT_REFERENCE(usb_quirk_init); \
374	SYSINIT_DRIVER_REFERENCE(uhub, usbus)
375	#endif /* RTEMS_BSD_DRIVER_USB */
376
377	/*
378	* USB Mass Storage Class driver.
379	*/
380	#if !defined(RTEMS_BSD_DRIVER_USB_MASS)
381	#define RTEMS_BSD_DRIVER_USB_MASS \
382	SYSINIT_DRIVER_REFERENCE(umass, uhub)
383	#endif /* RTEMS_BSD_DRIVER_USB_MASS */
384
385	/*
386	* USB SAF1761 host controller driver.
387	*/
388	#if !defined(RTEMS_BSD_DRIVER_USB_SAF1761_OTG)
389	#define RTEMS_BSD_DRIVER_USB_SAF1761_OTG(_base, _irq) \
390	static const rtems_bsd_device_resource usb_saf1761_otg_res[] = { \
391	{ \
392	.type = RTEMS_BSD_RES_MEMORY, \
393	.start_request = 0, \
394	.start_actual = (_base) \
395	}, { \
396	.type = RTEMS_BSD_RES_IRQ, \
397	.start_request = 0, \
398	.start_actual = (_irq) \
399	} \
400	}; \
401	RTEMS_BSD_DEFINE_NEXUS_DEVICE(saf1761otg, 0, \
402	RTEMS_ARRAY_SIZE(usb_saf1761_otg_res), \
403	&usb_saf1761_otg_res[0])
404	#endif /* RTEMS_BSD_DRIVER_USB_SAF1761_OTG */
405
406	/**
407	** Networking
408	**/
409
410	/*
411	* SMC0 driver
412	*/
413	#if !defined(RTEMS_BSD_DRIVER_SMC0)
414	#define RTEMS_BSD_DRIVER_SMC0(_base, _irq) \
415	static const rtems_bsd_device_resource smc0_res[] = { \
416	{ \
417	.type = RTEMS_BSD_RES_MEMORY, \
418	.start_request = 0, \
419	.start_actual = (_base) \
420	}, { \
421	.type = RTEMS_BSD_RES_IRQ, \
422	.start_request = 0, \
423	.start_actual = (_irq) \
424	} \
425	}; \
426	RTEMS_BSD_DEFINE_NEXUS_DEVICE(smc, 0, \
427	RTEMS_ARRAY_SIZE(smc0_res), \
428	&smc0_res[0])
429	#endif /* RTEMS_BSD_DRIVER_SMC */
430
431	/*
432	* LPC32XX LPE driver
433	*/
434	#if !defined(RTEMS_BSD_DRIVER_LPC32XX_LPE)
435	#define RTEMS_BSD_DRIVER_LPC32XX_LPE \
436	static const rtems_bsd_device_resource lpc_lpe0_res[] = { \
437	{ \
438	.type = RTEMS_BSD_RES_MEMORY, \
439	.start_request = 0, \
440	.start_actual = LPC32XX_BASE_ETHERNET \
441	}, { \
442	.type = RTEMS_BSD_RES_IRQ, \
443	.start_request = 0, \
444	.start_actual = LPC32XX_IRQ_ETHERNET \
445	} \
446	}; \
447	RTEMS_BSD_DEFINE_NEXUS_DEVICE(lpe, 0, \
448	RTEMS_ARRAY_SIZE(lpc_lpe0_res), \
449	&lpc_lpe0_res[0])
450	#endif /* RTEMS_BSD_DRIVER_LPC32XX_LPE */
451
452	/*
453	* Coldfire Fast Ethernet Controller (FEC) driver.
454	*/
455	#if !defined(RTEMS_BSD_DRIVER_FEC)
456	#define RTEMS_BSD_DRIVER_FEC \
457	RTEMS_BSD_DEFINE_NEXUS_DEVICE(fec, 0, 0, NULL);
458	#endif /* RTEMS_BSD_DRIVER_FEC */
459
460	/*
461	* Atmel SAMv71 Ethernet Controller (sam) driver.
462	*/
463	#if !defined(RTEMS_BSD_DRIVER_IF_ATSAM)
464	#define RTEMS_BSD_DRIVER_IF_ATSAM \
465	RTEMS_BSD_DEFINE_NEXUS_DEVICE(if_atsam, 0, 0, NULL);
466	#endif /* RTEMS_BSD_DRIVER_IF_ATSAM */
467
468	/*
469	* Xilinx Zynq Cadence Gigbit Ethernet MAC (CGEM).
470	*/
471	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM)
472	#define RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM(_num, _base, _irq) \
473	static const rtems_bsd_device_resource cgem ## _num ## _res[] = { \
474	{ \
475	.type = RTEMS_BSD_RES_MEMORY, \
476	.start_request = 0, \
477	.start_actual = (_base) \
478	}, { \
479	.type = RTEMS_BSD_RES_IRQ, \
480	.start_request = 0, \
481	.start_actual = (_irq) \
482	} \
483	}; \
484	RTEMS_BSD_DEFINE_NEXUS_DEVICE(cgem, _num, \
485	RTEMS_ARRAY_SIZE(cgem ## _num ## _res), \
486	&cgem ## _num ## _res[0])
487	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM */
488	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM0)
489	#define RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM0(_irq) \
490	RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM(0, 0xe000b000, _irq)
491	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM0 */
492	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM1)
493	#define RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM1(_irq) \
494	RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM(1, 0xe000c000, _irq)
495	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM1 */
496	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM0)
497	#define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM0(_irq) \
498	RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM(0, 0xff0b0000, _irq)
499	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM0 */
500	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM1)
501	#define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM1(_irq) \
502	RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM(1, 0xff0c0000, _irq)
503	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM1 */
504	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM2)
505	#define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM2(_irq) \
506	RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM(2, 0xff0d0000, _irq)
507	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM2 */
508	#if !defined(RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM3)
509	#define RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM3(_irq) \
510	RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM(3, 0xff0e0000, _irq)
511	#endif /* RTEMS_BSD_DRIVER_XILINX_ZYNQMP_CGEM3 */
512	#if !defined(RTEMS_BSD_DRIVER_XILINX_VERSAL_CGEM0)
513	#define RTEMS_BSD_DRIVER_XILINX_VERSAL_CGEM0(_irq) \
514	RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM(0, 0xff0c0000, _irq)
515	#endif /* RTEMS_BSD_DRIVER_XILINX_VERSAL_CGEM0 */
516	#if !defined(RTEMS_BSD_DRIVER_XILINX_VERSAL_CGEM1)
517	#define RTEMS_BSD_DRIVER_XILINX_VERSAL_CGEM1(_irq) \
518	RTEMS_BSD_DRIVER_XILINX_ZYNQ_CGEM(1, 0xff0d0000, _irq)
519	#endif /* RTEMS_BSD_DRIVER_XILINX_VERSAL_CGEM1 */
520
521	/*
522	* Designware/Synopsys Ethernet MAC Controller.
523	*/
524	#if !defined(RTEMS_BSD_DRIVER_DW_ETH)
525	#define RTEMS_BSD_DRIVER_DW_ETH \
526	SYSINIT_DRIVER_REFERENCE(dwc, simplebus);
527	#endif /* RTEMS_BSD_DRIVER_DW_ETH */
528
529	/*
530	* NXP QorIQ Network Driver.
531	*/
532	#if !defined(RTEMS_BSD_DRIVER_TSEC)
533	#define RTEMS_BSD_DRIVER_TSEC(_base, _tx_irq, _rx_irq, _er_irq) \
534	static const rtems_bsd_device_resource tsec0_res[] = { \
535	{ \
536	.type = RTEMS_BSD_RES_MEMORY, \
537	.start_request = 0, \
538	.start_actual = (_base) \
539	}, { \
540	.type = RTEMS_BSD_RES_IRQ, \
541	.start_request = 0, \
542	.start_actual = (_tx_irq) \
543	}, { \
544	.type = RTEMS_BSD_RES_IRQ, \
545	.start_request = 1, \
546	.start_actual = (_rx_irq) \
547	}, { \
548	.type = RTEMS_BSD_RES_IRQ, \
549	.start_request = 2, \
550	.start_actual = (_er_irq) \
551	} \
552	}; \
553	RTEMS_BSD_DEFINE_NEXUS_DEVICE(tsec, 0, \
554	RTEMS_ARRAY_SIZE(tsec0_res), \
555	&tsec0_res[0])
556	#endif /* RTEMS_BSD_DRIVER_TSEC */
557
558	/*
559	* Intel's Legacy EM driver.
560	*/
561	#if !defined(RTEMS_BSD_DRIVER_PCI_LEM)
562	#define RTEMS_BSD_DRIVER_PCI_LEM \
563	SYSINIT_DRIVER_REFERENCE(lem, pci);
564	#endif /* RTEMS_BSD_DRIVER_PCI_LEM */
565
566	/*
567	* Intel's Gigabit Driver.
568	*/
569	#if !defined(RTEMS_BSD_DRIVER_PCI_IGB)
570	#define RTEMS_BSD_DRIVER_PCI_IGB \
571	SYSINIT_DRIVER_REFERENCE(igb, pci);
572	#endif /* RTEMS_BSD_DRIVER_PCI_IGB */
573
574	/*
575	* Intel's EM Driver.
576	*/
577	#if !defined(RTEMS_BSD_DRIVER_PCI_EM)
578	#define RTEMS_BSD_DRIVER_PCI_EM \
579	SYSINIT_DRIVER_REFERENCE(em, pci);
580	#endif /* RTEMS_BSD_DRIVER_PCI_EM */
581
582	/*
583	* Realtek Driver
584	*/
585	#if !defined(RTEMS_BSD_DRIVER_PCI_RE)
586	#define RTEMS_BSD_DRIVER_PCI_RE \
587	SYSINIT_DRIVER_REFERENCE(re, pci);
588	#endif /* RTEMS_BSD_DRIVER_PCI_RE */
589
590	/*
591	* DEC Tulip Driver
592	*/
593	#if !defined(RTEMS_BSD_DRIVER_PCI_DC)
594	#define RTEMS_BSD_DRIVER_PCI_DC \
595	SYSINIT_DRIVER_REFERENCE(dc, pci);
596	#endif /* RTEMS_BSD_DRIVER_PCI_DC */
597
598	/**
599	** MMI Physical Layer Support.
600	**/
601
602	/*
603	* UK PHY (for unknown PHY devices)
604	*/
605	#if !defined(RTEMS_BSD_DRIVER_UKPHY)
606	#define RTEMS_BSD_DRIVER_UKPHY \
607	SYSINIT_DRIVER_REFERENCE(ukphy, miibus);
608	#endif /* RTEMS_BSD_DRIVER_UKPHY */
609
610	/*
611	* E1000 PHY
612	*/
613	#if !defined(RTEMS_BSD_DRIVER_E1000PHY)
614	#define RTEMS_BSD_DRIVER_E1000PHY \
615	SYSINIT_DRIVER_REFERENCE(e1000phy, miibus);
616	#endif /* RTEMS_BSD_DRIVER_E1000PHY */
617
618	/*
619	* ICS PHY
620	*/
621	#if !defined(RTEMS_BSD_DRIVER_ICSPHY)
622	#define RTEMS_BSD_DRIVER_ICSPHY \
623	SYSINIT_DRIVER_REFERENCE(icsphy, miibus);
624	#endif /* RTEMS_BSD_DRIVER_ICSPHY */
625
626	/*
627	* Reltek PHY
628	*/
629	#if !defined(RTEMS_BSD_DRIVER_REPHY)
630	#define RTEMS_BSD_DRIVER_REPHY \
631	SYSINIT_DRIVER_REFERENCE(rgephy, miibus);
632	#endif /* RTEMS_BSD_DRIVER_REPHY */
633
634	/*
635	* MI PHY.
636	*/
637	#if !defined(RTEMS_BSD_DRIVER_PHY_MIC)
638	#define RTEMS_BSD_DRIVER_PHY_MIC \
639	SYSINIT_DRIVER_REFERENCE(micphy, miibus);
640	#endif /* RTEMS_BSD_DRIVER_PHY_MIC */
641
642	/*
643	* UK PHY.
644	*/
645	#if !defined(RTEMS_BSD_DRIVER_UKPHY)
646	#define RTEMS_BSD_DRIVER_UKPHY \
647	SYSINIT_DRIVER_REFERENCE(ukphy, miibus);
648	#endif /* RTEMS_BSD_DRIVER_UKPHY */
649
650	/*
651	* DC PHY.
652	*/
653	#if !defined(RTEMS_BSD_DRIVER_DCPHY)
654	#define RTEMS_BSD_DRIVER_DCPHY \
655	SYSINIT_DRIVER_REFERENCE(dcphy, miibus);
656	#endif /* RTEMS_BSD_DRIVER_DCPHY */
657
658	/*
659	* PN PHY.
660	*/
661	#if !defined(RTEMS_BSD_DRIVER_PNPHY)
662	#define RTEMS_BSD_DRIVER_PNPHY \
663	SYSINIT_DRIVER_REFERENCE(pnphy, miibus);
664	#endif /* RTEMS_BSD_DRIVER_PNPHY */
665
666	#ifdef __cplusplus
667	}
668	#endif /* __cplusplus */
669
670	#endif

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