1 | /** |
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2 | * @file |
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3 | * |
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4 | * @ingroup rtems_bsd_machine |
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5 | * |
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6 | * @brief TODO. |
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7 | */ |
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8 | |
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9 | /* |
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10 | * Copyright (c) 2009, 2010 embedded brains GmbH. All rights reserved. |
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11 | * |
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12 | * embedded brains GmbH |
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13 | * Dornierstr. 4 |
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14 | * 82178 Puchheim |
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15 | * Germany |
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16 | * <rtems@embedded-brains.de> |
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17 | * |
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18 | * Redistribution and use in source and binary forms, with or without |
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19 | * modification, are permitted provided that the following conditions |
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20 | * are met: |
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21 | * 1. Redistributions of source code must retain the above copyright |
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22 | * notice, this list of conditions and the following disclaimer. |
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23 | * 2. Redistributions in binary form must reproduce the above copyright |
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24 | * notice, this list of conditions and the following disclaimer in the |
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25 | * documentation and/or other materials provided with the distribution. |
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26 | * |
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27 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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28 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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29 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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30 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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31 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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32 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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33 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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34 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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35 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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36 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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37 | * SUCH DAMAGE. |
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38 | */ |
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39 | |
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40 | #ifndef _RTEMS_BSD_MACHINE_ATOMIC_H_ |
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41 | #define _RTEMS_BSD_MACHINE_ATOMIC_H_ |
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42 | |
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43 | #ifndef _RTEMS_BSD_MACHINE_RTEMS_BSD_KERNEL_SPACE_H_ |
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44 | #error "the header file <machine/rtems-bsd-kernel-space.h> must be included first" |
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45 | #endif |
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46 | |
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47 | #include <rtems.h> |
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48 | |
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49 | #define mb() RTEMS_COMPILER_MEMORY_BARRIER() |
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50 | #define wmb() RTEMS_COMPILER_MEMORY_BARRIER() |
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51 | #define rmb() RTEMS_COMPILER_MEMORY_BARRIER() |
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52 | |
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53 | static inline void |
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54 | atomic_add_int(volatile int *p, int v) |
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55 | { |
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56 | rtems_interrupt_level level; |
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57 | |
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58 | rtems_interrupt_disable(level); |
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59 | *p += v; |
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60 | rtems_interrupt_enable(level); |
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61 | } |
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62 | |
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63 | #define atomic_add_acq_int atomic_add_int |
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64 | #define atomic_add_rel_int atomic_add_int |
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65 | |
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66 | static inline void |
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67 | atomic_subtract_int(volatile int *p, int v) |
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68 | { |
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69 | rtems_interrupt_level level; |
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70 | |
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71 | rtems_interrupt_disable(level); |
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72 | *p -= v; |
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73 | rtems_interrupt_enable(level); |
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74 | } |
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75 | |
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76 | #define atomic_subtract_acq_int atomic_subtract_int |
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77 | #define atomic_subtract_rel_int atomic_subtract_int |
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78 | |
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79 | static inline void |
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80 | atomic_set_int(volatile int *p, int v) |
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81 | { |
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82 | rtems_interrupt_level level; |
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83 | |
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84 | rtems_interrupt_disable(level); |
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85 | *p |= v; |
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86 | rtems_interrupt_enable(level); |
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87 | } |
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88 | |
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89 | #define atomic_set_acq_int atomic_set_int |
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90 | #define atomic_set_rel_int atomic_set_int |
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91 | |
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92 | static inline void |
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93 | atomic_clear_int(volatile int *p, int v) |
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94 | { |
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95 | rtems_interrupt_level level; |
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96 | |
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97 | rtems_interrupt_disable(level); |
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98 | *p &= ~v; |
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99 | rtems_interrupt_enable(level); |
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100 | } |
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101 | |
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102 | #define atomic_clear_acq_int atomic_clear_int |
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103 | #define atomic_clear_rel_int atomic_clear_int |
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104 | |
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105 | static inline int |
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106 | atomic_cmpset_int(volatile int *p, int cmp, int set) |
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107 | { |
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108 | rtems_interrupt_level level; |
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109 | int rv; |
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110 | |
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111 | rtems_interrupt_disable(level); |
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112 | rv = *p == cmp; |
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113 | if (rv) { |
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114 | *p = set; |
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115 | } |
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116 | rtems_interrupt_enable(level); |
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117 | |
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118 | return rv; |
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119 | } |
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120 | |
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121 | #define atomic_cmpset_acq_int atomic_cmpset_int |
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122 | #define atomic_cmpset_rel_int atomic_cmpset_int |
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123 | |
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124 | static inline int |
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125 | atomic_fetchadd_int(volatile int *p, int v) |
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126 | { |
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127 | rtems_interrupt_level level; |
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128 | int tmp; |
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129 | |
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130 | rtems_interrupt_disable(level); |
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131 | tmp = *p; |
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132 | *p += v; |
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133 | rtems_interrupt_enable(level); |
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134 | |
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135 | return tmp; |
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136 | } |
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137 | |
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138 | static inline int |
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139 | atomic_readandclear_int(volatile int *p) |
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140 | { |
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141 | rtems_interrupt_level level; |
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142 | int tmp; |
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143 | |
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144 | rtems_interrupt_disable(level); |
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145 | tmp = *p; |
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146 | *p = 0; |
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147 | rtems_interrupt_enable(level); |
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148 | |
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149 | return tmp; |
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150 | } |
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151 | |
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152 | static inline int |
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153 | atomic_load_acq_int(volatile int *p) |
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154 | { |
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155 | return *p; |
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156 | } |
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157 | |
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158 | static inline void |
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159 | atomic_store_rel_int(volatile int *p, int v) |
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160 | { |
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161 | *p = v; |
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162 | } |
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163 | |
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164 | static inline void |
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165 | atomic_add_32(volatile uint32_t *p, uint32_t v) |
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166 | { |
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167 | rtems_interrupt_level level; |
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168 | |
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169 | rtems_interrupt_disable(level); |
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170 | *p += v; |
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171 | rtems_interrupt_enable(level); |
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172 | } |
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173 | |
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174 | #define atomic_add_acq_32 atomic_add_32 |
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175 | #define atomic_add_rel_32 atomic_add_32 |
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176 | |
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177 | static inline void |
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178 | atomic_subtract_32(volatile uint32_t *p, uint32_t v) |
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179 | { |
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180 | rtems_interrupt_level level; |
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181 | |
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182 | rtems_interrupt_disable(level); |
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183 | *p -= v; |
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184 | rtems_interrupt_enable(level); |
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185 | } |
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186 | |
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187 | #define atomic_subtract_acq_32 atomic_subtract_32 |
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188 | #define atomic_subtract_rel_32 atomic_subtract_32 |
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189 | |
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190 | static inline void |
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191 | atomic_set_32(volatile uint32_t *p, uint32_t v) |
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192 | { |
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193 | rtems_interrupt_level level; |
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194 | |
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195 | rtems_interrupt_disable(level); |
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196 | *p |= v; |
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197 | rtems_interrupt_enable(level); |
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198 | } |
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199 | |
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200 | #define atomic_set_acq_32 atomic_set_32 |
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201 | #define atomic_set_rel_32 atomic_set_32 |
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202 | |
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203 | static inline void |
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204 | atomic_clear_32(volatile uint32_t *p, uint32_t v) |
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205 | { |
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206 | rtems_interrupt_level level; |
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207 | |
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208 | rtems_interrupt_disable(level); |
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209 | *p &= ~v; |
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210 | rtems_interrupt_enable(level); |
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211 | } |
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212 | |
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213 | #define atomic_clear_acq_32 atomic_clear_32 |
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214 | #define atomic_clear_rel_32 atomic_clear_32 |
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215 | |
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216 | static inline int |
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217 | atomic_cmpset_32(volatile uint32_t *p, uint32_t cmp, uint32_t set) |
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218 | { |
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219 | rtems_interrupt_level level; |
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220 | int rv; |
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221 | |
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222 | rtems_interrupt_disable(level); |
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223 | rv = *p == cmp; |
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224 | if (rv) { |
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225 | *p = set; |
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226 | } |
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227 | rtems_interrupt_enable(level); |
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228 | |
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229 | return rv; |
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230 | } |
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231 | |
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232 | #define atomic_cmpset_acq_32 atomic_cmpset_32 |
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233 | #define atomic_cmpset_rel_32 atomic_cmpset_32 |
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234 | |
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235 | static inline uint32_t |
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236 | atomic_fetchadd_32(volatile uint32_t *p, uint32_t v) |
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237 | { |
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238 | rtems_interrupt_level level; |
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239 | uint32_t tmp; |
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240 | |
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241 | rtems_interrupt_disable(level); |
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242 | tmp = *p; |
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243 | *p += v; |
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244 | rtems_interrupt_enable(level); |
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245 | |
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246 | return tmp; |
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247 | } |
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248 | |
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249 | static inline uint32_t |
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250 | atomic_readandclear_32(volatile uint32_t *p) |
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251 | { |
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252 | rtems_interrupt_level level; |
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253 | uint32_t tmp; |
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254 | |
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255 | rtems_interrupt_disable(level); |
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256 | tmp = *p; |
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257 | *p = 0; |
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258 | rtems_interrupt_enable(level); |
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259 | |
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260 | return tmp; |
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261 | } |
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262 | |
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263 | static inline uint32_t |
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264 | atomic_load_acq_32(volatile uint32_t *p) |
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265 | { |
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266 | return *p; |
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267 | } |
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268 | |
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269 | static inline void |
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270 | atomic_store_rel_32(volatile uint32_t *p, uint32_t v) |
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271 | { |
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272 | *p = v; |
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273 | } |
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274 | |
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275 | static inline void |
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276 | atomic_add_long(volatile long *p, long v) |
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277 | { |
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278 | rtems_interrupt_level level; |
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279 | |
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280 | rtems_interrupt_disable(level); |
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281 | *p += v; |
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282 | rtems_interrupt_enable(level); |
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283 | } |
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284 | |
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285 | #define atomic_add_acq_long atomic_add_long |
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286 | #define atomic_add_rel_long atomic_add_long |
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287 | |
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288 | static inline void |
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289 | atomic_subtract_long(volatile long *p, long v) |
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290 | { |
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291 | rtems_interrupt_level level; |
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292 | |
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293 | rtems_interrupt_disable(level); |
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294 | *p -= v; |
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295 | rtems_interrupt_enable(level); |
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296 | } |
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297 | |
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298 | #define atomic_subtract_acq_long atomic_subtract_long |
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299 | #define atomic_subtract_rel_long atomic_subtract_long |
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300 | |
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301 | static inline void |
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302 | atomic_set_long(volatile long *p, long v) |
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303 | { |
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304 | rtems_interrupt_level level; |
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305 | |
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306 | rtems_interrupt_disable(level); |
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307 | *p |= v; |
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308 | rtems_interrupt_enable(level); |
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309 | } |
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310 | |
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311 | #define atomic_set_acq_long atomic_set_long |
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312 | #define atomic_set_rel_long atomic_set_long |
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313 | |
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314 | static inline void |
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315 | atomic_clear_long(volatile long *p, long v) |
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316 | { |
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317 | rtems_interrupt_level level; |
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318 | |
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319 | rtems_interrupt_disable(level); |
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320 | *p &= ~v; |
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321 | rtems_interrupt_enable(level); |
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322 | } |
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323 | |
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324 | #define atomic_clear_acq_long atomic_clear_long |
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325 | #define atomic_clear_rel_long atomic_clear_long |
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326 | |
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327 | static inline int |
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328 | atomic_cmpset_long(volatile long *p, long cmp, long set) |
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329 | { |
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330 | rtems_interrupt_level level; |
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331 | int rv; |
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332 | |
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333 | rtems_interrupt_disable(level); |
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334 | rv = *p == cmp; |
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335 | if (rv) { |
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336 | *p = set; |
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337 | } |
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338 | rtems_interrupt_enable(level); |
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339 | |
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340 | return rv; |
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341 | } |
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342 | |
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343 | #define atomic_cmpset_acq_long atomic_cmpset_long |
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344 | #define atomic_cmpset_rel_long atomic_cmpset_long |
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345 | |
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346 | static inline long |
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347 | atomic_fetchadd_long(volatile long *p, long v) |
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348 | { |
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349 | rtems_interrupt_level level; |
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350 | long tmp; |
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351 | |
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352 | rtems_interrupt_disable(level); |
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353 | tmp = *p; |
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354 | *p += v; |
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355 | rtems_interrupt_enable(level); |
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356 | |
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357 | return tmp; |
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358 | } |
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359 | |
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360 | static inline long |
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361 | atomic_readandclear_long(volatile long *p) |
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362 | { |
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363 | rtems_interrupt_level level; |
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364 | long tmp; |
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365 | |
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366 | rtems_interrupt_disable(level); |
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367 | tmp = *p; |
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368 | *p = 0; |
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369 | rtems_interrupt_enable(level); |
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370 | |
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371 | return tmp; |
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372 | } |
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373 | |
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374 | static inline long |
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375 | atomic_load_acq_long(volatile long *p) |
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376 | { |
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377 | return *p; |
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378 | } |
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379 | |
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380 | static inline void |
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381 | atomic_store_rel_long(volatile long *p, long v) |
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382 | { |
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383 | *p = v; |
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384 | } |
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385 | |
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386 | #endif /* _RTEMS_BSD_MACHINE_ATOMIC_H_ */ |
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