1 | #include <machine/rtems-bsd-kernel-space.h> |
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2 | |
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3 | #include <rtems/bsd/local/opt_dpaa.h> |
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4 | |
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5 | /* Copyright 2008 - 2016 Freescale Semiconductor, Inc. |
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6 | * |
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7 | * Redistribution and use in source and binary forms, with or without |
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8 | * modification, are permitted provided that the following conditions are met: |
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9 | * * Redistributions of source code must retain the above copyright |
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10 | * notice, this list of conditions and the following disclaimer. |
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11 | * * Redistributions in binary form must reproduce the above copyright |
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12 | * notice, this list of conditions and the following disclaimer in the |
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13 | * documentation and/or other materials provided with the distribution. |
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14 | * * Neither the name of Freescale Semiconductor nor the |
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15 | * names of its contributors may be used to endorse or promote products |
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16 | * derived from this software without specific prior written permission. |
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17 | * |
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18 | * ALTERNATIVELY, this software may be distributed under the terms of the |
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19 | * GNU General Public License ("GPL") as published by the Free Software |
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20 | * Foundation, either version 2 of that License or (at your option) any |
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21 | * later version. |
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22 | * |
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23 | * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY |
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24 | * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
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25 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
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26 | * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY |
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27 | * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
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28 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
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29 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND |
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30 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
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31 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
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32 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
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33 | */ |
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34 | |
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35 | #include "qman_priv.h" |
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36 | #ifdef __rtems__ |
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37 | #include <bsp/qoriq.h> |
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38 | #undef dev_crit |
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39 | #undef dev_info |
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40 | #define dev_crit(dev, fmt, ...) printf(fmt, ##__VA_ARGS__) |
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41 | #define dev_info dev_crit |
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42 | #endif /* __rtems__ */ |
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43 | |
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44 | #ifndef __rtems__ |
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45 | struct qman_portal *qman_dma_portal; |
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46 | EXPORT_SYMBOL(qman_dma_portal); |
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47 | #endif /* __rtems__ */ |
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48 | |
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49 | /* Enable portal interupts (as opposed to polling mode) */ |
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50 | #define CONFIG_FSL_DPA_PIRQ_SLOW 1 |
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51 | #define CONFIG_FSL_DPA_PIRQ_FAST 1 |
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52 | |
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53 | #ifndef __rtems__ |
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54 | static struct cpumask portal_cpus; |
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55 | /* protect qman global registers and global data shared among portals */ |
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56 | static DEFINE_SPINLOCK(qman_lock); |
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57 | #endif /* __rtems__ */ |
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58 | |
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59 | static void portal_set_cpu(struct qm_portal_config *pcfg, int cpu) |
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60 | { |
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61 | #ifdef CONFIG_FSL_PAMU |
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62 | struct device *dev = pcfg->dev; |
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63 | int window_count = 1; |
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64 | struct iommu_domain_geometry geom_attr; |
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65 | struct pamu_stash_attribute stash_attr; |
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66 | int ret; |
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67 | |
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68 | pcfg->iommu_domain = iommu_domain_alloc(&platform_bus_type); |
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69 | if (!pcfg->iommu_domain) { |
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70 | dev_err(dev, "%s(): iommu_domain_alloc() failed", __func__); |
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71 | goto no_iommu; |
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72 | } |
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73 | geom_attr.aperture_start = 0; |
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74 | geom_attr.aperture_end = |
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75 | ((dma_addr_t)1 << min(8 * sizeof(dma_addr_t), (size_t)36)) - 1; |
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76 | geom_attr.force_aperture = true; |
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77 | ret = iommu_domain_set_attr(pcfg->iommu_domain, DOMAIN_ATTR_GEOMETRY, |
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78 | &geom_attr); |
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79 | if (ret < 0) { |
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80 | dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__, |
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81 | ret); |
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82 | goto out_domain_free; |
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83 | } |
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84 | ret = iommu_domain_set_attr(pcfg->iommu_domain, DOMAIN_ATTR_WINDOWS, |
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85 | &window_count); |
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86 | if (ret < 0) { |
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87 | dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__, |
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88 | ret); |
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89 | goto out_domain_free; |
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90 | } |
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91 | stash_attr.cpu = cpu; |
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92 | stash_attr.cache = PAMU_ATTR_CACHE_L1; |
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93 | ret = iommu_domain_set_attr(pcfg->iommu_domain, |
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94 | DOMAIN_ATTR_FSL_PAMU_STASH, |
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95 | &stash_attr); |
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96 | if (ret < 0) { |
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97 | dev_err(dev, "%s(): iommu_domain_set_attr() = %d", |
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98 | __func__, ret); |
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99 | goto out_domain_free; |
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100 | } |
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101 | ret = iommu_domain_window_enable(pcfg->iommu_domain, 0, 0, 1ULL << 36, |
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102 | IOMMU_READ | IOMMU_WRITE); |
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103 | if (ret < 0) { |
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104 | dev_err(dev, "%s(): iommu_domain_window_enable() = %d", |
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105 | __func__, ret); |
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106 | goto out_domain_free; |
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107 | } |
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108 | ret = iommu_attach_device(pcfg->iommu_domain, dev); |
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109 | if (ret < 0) { |
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110 | dev_err(dev, "%s(): iommu_device_attach() = %d", __func__, |
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111 | ret); |
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112 | goto out_domain_free; |
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113 | } |
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114 | ret = iommu_domain_set_attr(pcfg->iommu_domain, |
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115 | DOMAIN_ATTR_FSL_PAMU_ENABLE, |
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116 | &window_count); |
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117 | if (ret < 0) { |
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118 | dev_err(dev, "%s(): iommu_domain_set_attr() = %d", __func__, |
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119 | ret); |
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120 | goto out_detach_device; |
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121 | } |
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122 | |
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123 | no_iommu: |
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124 | #endif |
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125 | qman_set_sdest(pcfg->channel, cpu); |
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126 | |
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127 | return; |
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128 | |
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129 | #ifdef CONFIG_FSL_PAMU |
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130 | out_detach_device: |
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131 | iommu_detach_device(pcfg->iommu_domain, NULL); |
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132 | out_domain_free: |
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133 | iommu_domain_free(pcfg->iommu_domain); |
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134 | pcfg->iommu_domain = NULL; |
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135 | #endif |
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136 | } |
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137 | |
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138 | static struct qman_portal *init_pcfg(struct qm_portal_config *pcfg) |
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139 | { |
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140 | struct qman_portal *p; |
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141 | u32 irq_sources = 0; |
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142 | |
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143 | /* We need the same LIODN offset for all portals */ |
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144 | qman_liodn_fixup(pcfg->channel); |
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145 | |
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146 | #ifndef __rtems__ |
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147 | pcfg->iommu_domain = NULL; |
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148 | #endif /* __rtems__ */ |
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149 | portal_set_cpu(pcfg, pcfg->cpu); |
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150 | p = qman_create_affine_portal(pcfg, NULL); |
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151 | if (!p) { |
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152 | dev_crit(pcfg->dev, "%s: Portal failure on cpu %d\n", |
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153 | __func__, pcfg->cpu); |
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154 | return NULL; |
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155 | } |
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156 | |
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157 | /* Determine what should be interrupt-vs-poll driven */ |
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158 | #ifdef CONFIG_FSL_DPA_PIRQ_SLOW |
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159 | irq_sources |= QM_PIRQ_EQCI | QM_PIRQ_EQRI | QM_PIRQ_MRI | |
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160 | QM_PIRQ_CSCI; |
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161 | #endif |
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162 | #ifdef CONFIG_FSL_DPA_PIRQ_FAST |
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163 | irq_sources |= QM_PIRQ_DQRI; |
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164 | #endif |
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165 | qman_p_irqsource_add(p, irq_sources); |
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166 | |
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167 | #ifndef __rtems__ |
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168 | spin_lock(&qman_lock); |
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169 | if (cpumask_equal(&portal_cpus, cpu_possible_mask)) { |
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170 | /* all assigned portals are initialized now */ |
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171 | qman_init_cgr_all(); |
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172 | } |
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173 | |
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174 | if (!qman_dma_portal) |
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175 | qman_dma_portal = p; |
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176 | |
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177 | spin_unlock(&qman_lock); |
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178 | #endif /* __rtems__ */ |
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179 | |
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180 | dev_info(pcfg->dev, "Portal initialised, cpu %d\n", pcfg->cpu); |
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181 | |
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182 | return p; |
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183 | } |
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184 | |
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185 | static void qman_portal_update_sdest(const struct qm_portal_config *pcfg, |
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186 | unsigned int cpu) |
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187 | { |
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188 | #ifdef CONFIG_FSL_PAMU /* TODO */ |
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189 | struct pamu_stash_attribute stash_attr; |
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190 | int ret; |
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191 | |
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192 | if (pcfg->iommu_domain) { |
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193 | stash_attr.cpu = cpu; |
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194 | stash_attr.cache = PAMU_ATTR_CACHE_L1; |
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195 | ret = iommu_domain_set_attr(pcfg->iommu_domain, |
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196 | DOMAIN_ATTR_FSL_PAMU_STASH, &stash_attr); |
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197 | if (ret < 0) { |
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198 | dev_err(pcfg->dev, |
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199 | "Failed to update pamu stash setting\n"); |
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200 | return; |
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201 | } |
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202 | } |
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203 | #endif |
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204 | qman_set_sdest(pcfg->channel, cpu); |
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205 | } |
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206 | |
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207 | #ifndef __rtems__ |
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208 | static int qman_offline_cpu(unsigned int cpu) |
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209 | { |
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210 | struct qman_portal *p; |
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211 | const struct qm_portal_config *pcfg; |
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212 | |
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213 | p = affine_portals[cpu]; |
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214 | if (p) { |
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215 | pcfg = qman_get_qm_portal_config(p); |
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216 | if (pcfg) { |
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217 | irq_set_affinity(pcfg->irq, cpumask_of(0)); |
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218 | qman_portal_update_sdest(pcfg, 0); |
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219 | } |
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220 | } |
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221 | return 0; |
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222 | } |
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223 | |
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224 | static int qman_online_cpu(unsigned int cpu) |
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225 | { |
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226 | struct qman_portal *p; |
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227 | const struct qm_portal_config *pcfg; |
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228 | |
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229 | p = affine_portals[cpu]; |
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230 | if (p) { |
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231 | pcfg = qman_get_qm_portal_config(p); |
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232 | if (pcfg) { |
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233 | irq_set_affinity(pcfg->irq, cpumask_of(cpu)); |
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234 | qman_portal_update_sdest(pcfg, cpu); |
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235 | } |
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236 | } |
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237 | return 0; |
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238 | } |
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239 | |
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240 | static int qman_portal_probe(struct platform_device *pdev) |
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241 | { |
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242 | struct device *dev = &pdev->dev; |
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243 | struct device_node *node = dev->of_node; |
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244 | struct qm_portal_config *pcfg; |
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245 | struct resource *addr_phys[2]; |
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246 | void __iomem *va; |
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247 | int irq, cpu, err; |
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248 | u32 val; |
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249 | |
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250 | pcfg = devm_kmalloc(dev, sizeof(*pcfg), GFP_KERNEL); |
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251 | if (!pcfg) |
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252 | return -ENOMEM; |
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253 | |
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254 | pcfg->dev = dev; |
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255 | |
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256 | addr_phys[0] = platform_get_resource(pdev, IORESOURCE_MEM, |
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257 | DPAA_PORTAL_CE); |
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258 | if (!addr_phys[0]) { |
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259 | dev_err(dev, "Can't get %s property 'reg::CE'\n", |
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260 | node->full_name); |
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261 | return -ENXIO; |
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262 | } |
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263 | |
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264 | addr_phys[1] = platform_get_resource(pdev, IORESOURCE_MEM, |
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265 | DPAA_PORTAL_CI); |
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266 | if (!addr_phys[1]) { |
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267 | dev_err(dev, "Can't get %s property 'reg::CI'\n", |
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268 | node->full_name); |
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269 | return -ENXIO; |
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270 | } |
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271 | |
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272 | err = of_property_read_u32(node, "cell-index", &val); |
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273 | if (err) { |
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274 | dev_err(dev, "Can't get %s property 'cell-index'\n", |
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275 | node->full_name); |
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276 | return err; |
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277 | } |
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278 | pcfg->channel = val; |
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279 | pcfg->cpu = -1; |
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280 | irq = platform_get_irq(pdev, 0); |
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281 | if (irq < 0) { |
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282 | dev_err(dev, "Can't get %s IRQ\n", node->full_name); |
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283 | return -ENXIO; |
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284 | } |
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285 | pcfg->irq = irq; |
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286 | |
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287 | va = ioremap_prot(addr_phys[0]->start, resource_size(addr_phys[0]), 0); |
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288 | if (!va) { |
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289 | dev_err(dev, "ioremap::CE failed\n"); |
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290 | goto err_ioremap1; |
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291 | } |
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292 | |
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293 | pcfg->addr_virt[DPAA_PORTAL_CE] = va; |
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294 | |
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295 | va = ioremap_prot(addr_phys[1]->start, resource_size(addr_phys[1]), |
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296 | _PAGE_GUARDED | _PAGE_NO_CACHE); |
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297 | if (!va) { |
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298 | dev_err(dev, "ioremap::CI failed\n"); |
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299 | goto err_ioremap2; |
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300 | } |
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301 | |
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302 | pcfg->addr_virt[DPAA_PORTAL_CI] = va; |
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303 | |
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304 | pcfg->pools = qm_get_pools_sdqcr(); |
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305 | |
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306 | spin_lock(&qman_lock); |
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307 | cpu = cpumask_next_zero(-1, &portal_cpus); |
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308 | if (cpu >= nr_cpu_ids) { |
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309 | /* unassigned portal, skip init */ |
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310 | spin_unlock(&qman_lock); |
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311 | return 0; |
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312 | } |
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313 | |
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314 | cpumask_set_cpu(cpu, &portal_cpus); |
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315 | spin_unlock(&qman_lock); |
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316 | pcfg->cpu = cpu; |
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317 | |
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318 | if (dma_set_mask(dev, DMA_BIT_MASK(40))) { |
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319 | dev_err(dev, "dma_set_mask() failed\n"); |
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320 | goto err_portal_init; |
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321 | } |
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322 | |
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323 | if (!init_pcfg(pcfg)) { |
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324 | dev_err(dev, "portal init failed\n"); |
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325 | goto err_portal_init; |
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326 | } |
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327 | |
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328 | /* clear irq affinity if assigned cpu is offline */ |
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329 | if (!cpu_online(cpu)) |
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330 | qman_offline_cpu(cpu); |
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331 | |
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332 | return 0; |
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333 | |
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334 | err_portal_init: |
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335 | iounmap(pcfg->addr_virt[DPAA_PORTAL_CI]); |
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336 | err_ioremap2: |
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337 | iounmap(pcfg->addr_virt[DPAA_PORTAL_CE]); |
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338 | err_ioremap1: |
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339 | return -ENXIO; |
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340 | } |
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341 | |
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342 | static const struct of_device_id qman_portal_ids[] = { |
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343 | { |
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344 | .compatible = "fsl,qman-portal", |
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345 | }, |
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346 | {} |
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347 | }; |
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348 | MODULE_DEVICE_TABLE(of, qman_portal_ids); |
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349 | |
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350 | static struct platform_driver qman_portal_driver = { |
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351 | .driver = { |
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352 | .name = KBUILD_MODNAME, |
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353 | .of_match_table = qman_portal_ids, |
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354 | }, |
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355 | .probe = qman_portal_probe, |
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356 | }; |
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357 | |
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358 | static int __init qman_portal_driver_register(struct platform_driver *drv) |
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359 | { |
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360 | int ret; |
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361 | |
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362 | ret = platform_driver_register(drv); |
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363 | if (ret < 0) |
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364 | return ret; |
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365 | |
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366 | ret = cpuhp_setup_state_nocalls(CPUHP_AP_ONLINE_DYN, |
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367 | "soc/qman_portal:online", |
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368 | qman_online_cpu, qman_offline_cpu); |
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369 | if (ret < 0) { |
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370 | pr_err("qman: failed to register hotplug callbacks.\n"); |
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371 | platform_driver_unregister(drv); |
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372 | return ret; |
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373 | } |
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374 | return 0; |
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375 | } |
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376 | |
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377 | module_driver(qman_portal_driver, |
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378 | qman_portal_driver_register, platform_driver_unregister); |
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379 | #else /* __rtems__ */ |
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380 | #include <bsp/fdt.h> |
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381 | #include <linux/of_address.h> |
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382 | #include <linux/of_irq.h> |
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383 | |
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384 | static struct qm_portal_config qman_configs[NR_CPUS]; |
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385 | |
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386 | void |
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387 | qman_sysinit_portals(void) |
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388 | { |
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389 | const char *fdt = bsp_fdt_get(); |
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390 | struct device_node dn; |
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391 | const char *name; |
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392 | int cpu_count = (int)rtems_get_processor_count(); |
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393 | int cpu; |
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394 | int ret; |
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395 | int node; |
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396 | int parent; |
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397 | |
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398 | memset(&dn, 0, sizeof(dn)); |
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399 | |
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400 | name = "fsl,qman-portal"; |
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401 | node = fdt_node_offset_by_compatible(fdt, 0, name); |
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402 | if (node < 0) |
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403 | panic("qman: no portals in FDT"); |
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404 | parent = fdt_parent_offset(fdt, node); |
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405 | if (parent < 0) |
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406 | panic("qman: no parent of portals in FDT"); |
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407 | node = fdt_first_subnode(fdt, parent); |
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408 | |
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409 | dn.full_name = name; |
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410 | dn.offset = node; |
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411 | |
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412 | qoriq_clear_ce_portal(&qoriq_qman_portal[0][0], |
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413 | sizeof(qoriq_qman_portal[0])); |
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414 | qoriq_clear_ci_portal(&qoriq_qman_portal[1][0], |
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415 | sizeof(qoriq_qman_portal[1])); |
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416 | |
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417 | for (cpu = 0; cpu < cpu_count; ++cpu) { |
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418 | struct qm_portal_config *pcfg = &qman_configs[cpu]; |
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419 | struct qman_portal *portal; |
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420 | struct resource res; |
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421 | u32 val; |
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422 | |
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423 | if (node < 0) |
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424 | panic("qman: missing portal in FDT"); |
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425 | |
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426 | ret = of_address_to_resource(&dn, 0, &res); |
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427 | if (ret != 0) |
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428 | panic("qman: no portal CE address"); |
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429 | pcfg->addr_virt[0] = (__iomem void *) |
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430 | ((uintptr_t)&qoriq_qman_portal[0][0] + (uintptr_t)res.start); |
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431 | BSD_ASSERT((uintptr_t)pcfg->addr_virt[0] >= |
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432 | (uintptr_t)&qoriq_qman_portal[0][0]); |
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433 | BSD_ASSERT((uintptr_t)pcfg->addr_virt[0] < |
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434 | (uintptr_t)&qoriq_qman_portal[1][0]); |
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435 | |
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436 | ret = of_address_to_resource(&dn, 1, &res); |
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437 | if (ret != 0) |
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438 | panic("qman: no portal CI address"); |
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439 | pcfg->addr_virt[1] = (__iomem void *) |
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440 | ((uintptr_t)&qoriq_qman_portal[0][0] + (uintptr_t)res.start); |
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441 | BSD_ASSERT((uintptr_t)pcfg->addr_virt[1] >= |
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442 | (uintptr_t)&qoriq_qman_portal[1][0]); |
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443 | BSD_ASSERT((uintptr_t)pcfg->addr_virt[1] < |
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444 | (uintptr_t)&qoriq_qman_portal[2][0]); |
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445 | |
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446 | ret = of_property_read_u32(&dn, "cell-index", &val); |
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447 | if (ret != 0) |
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448 | panic("qman: no cell-index"); |
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449 | pcfg->channel = val; |
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450 | |
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451 | pcfg->irq = of_irq_to_resource(&dn, 0, NULL); |
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452 | if (pcfg->irq == NO_IRQ) |
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453 | panic("qman: no portal interrupt"); |
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454 | |
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455 | pcfg->cpu = cpu; |
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456 | pcfg->pools = qm_get_pools_sdqcr(); |
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457 | |
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458 | portal = init_pcfg(pcfg); |
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459 | if (portal == NULL) |
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460 | panic("qman: cannot create portal"); |
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461 | |
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462 | qman_portal_update_sdest(pcfg, cpu); |
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463 | |
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464 | node = fdt_next_subnode(fdt, node); |
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465 | dn.offset = node; |
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466 | } |
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467 | |
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468 | /* all assigned portals are initialized now */ |
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469 | qman_init_cgr_all(); |
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470 | } |
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471 | #endif /* __rtems__ */ |
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