1 | /*- |
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2 | * Copyright (c) 1998 Doug Rabson |
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3 | * All rights reserved. |
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4 | * |
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5 | * Redistribution and use in source and binary forms, with or without |
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6 | * modification, are permitted provided that the following conditions |
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7 | * are met: |
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8 | * 1. Redistributions of source code must retain the above copyright |
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9 | * notice, this list of conditions and the following disclaimer. |
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10 | * 2. Redistributions in binary form must reproduce the above copyright |
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11 | * notice, this list of conditions and the following disclaimer in the |
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12 | * documentation and/or other materials provided with the distribution. |
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13 | * |
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14 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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15 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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16 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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17 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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18 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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19 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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20 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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21 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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22 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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23 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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24 | * SUCH DAMAGE. |
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25 | * |
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26 | * $FreeBSD$ |
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27 | */ |
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28 | |
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29 | #ifndef _MACHINE_CPUFUNC_H_ |
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30 | #define _MACHINE_CPUFUNC_H_ |
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31 | |
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32 | /* |
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33 | * Required for user-space atomic.h includes |
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34 | */ |
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35 | static __inline void |
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36 | powerpc_mb(void) |
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37 | { |
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38 | |
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39 | __asm __volatile("eieio; sync" : : : "memory"); |
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40 | } |
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41 | |
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42 | #ifdef _KERNEL |
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43 | |
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44 | #include <sys/types.h> |
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45 | |
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46 | #include <machine/psl.h> |
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47 | #include <machine/spr.h> |
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48 | |
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49 | struct thread; |
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50 | |
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51 | #ifdef KDB |
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52 | void breakpoint(void); |
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53 | #else |
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54 | static __inline void |
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55 | breakpoint(void) |
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56 | { |
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57 | |
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58 | return; |
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59 | } |
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60 | #endif |
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61 | |
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62 | /* CPU register mangling inlines */ |
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63 | |
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64 | static __inline void |
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65 | mtmsr(register_t value) |
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66 | { |
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67 | |
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68 | __asm __volatile ("mtmsr %0; isync" :: "r"(value)); |
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69 | } |
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70 | |
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71 | #ifdef __powerpc64__ |
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72 | static __inline void |
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73 | mtmsrd(register_t value) |
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74 | { |
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75 | |
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76 | __asm __volatile ("mtmsrd %0; isync" :: "r"(value)); |
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77 | } |
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78 | #endif |
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79 | |
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80 | static __inline register_t |
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81 | mfmsr(void) |
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82 | { |
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83 | register_t value; |
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84 | |
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85 | __asm __volatile ("mfmsr %0" : "=r"(value)); |
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86 | |
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87 | return (value); |
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88 | } |
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89 | |
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90 | #ifndef __powerpc64__ |
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91 | static __inline void |
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92 | mtsrin(vm_offset_t va, register_t value) |
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93 | { |
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94 | |
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95 | __asm __volatile ("mtsrin %0,%1" :: "r"(value), "r"(va)); |
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96 | } |
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97 | |
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98 | static __inline register_t |
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99 | mfsrin(vm_offset_t va) |
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100 | { |
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101 | register_t value; |
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102 | |
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103 | __asm __volatile ("mfsrin %0,%1" : "=r"(value) : "r"(va)); |
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104 | |
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105 | return (value); |
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106 | } |
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107 | #endif |
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108 | |
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109 | static __inline register_t |
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110 | mfctrl(void) |
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111 | { |
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112 | register_t value; |
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113 | |
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114 | __asm __volatile ("mfspr %0,136" : "=r"(value)); |
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115 | |
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116 | return (value); |
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117 | } |
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118 | |
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119 | |
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120 | static __inline void |
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121 | mtdec(register_t value) |
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122 | { |
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123 | |
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124 | __asm __volatile ("mtdec %0" :: "r"(value)); |
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125 | } |
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126 | |
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127 | static __inline register_t |
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128 | mfdec(void) |
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129 | { |
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130 | register_t value; |
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131 | |
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132 | __asm __volatile ("mfdec %0" : "=r"(value)); |
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133 | |
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134 | return (value); |
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135 | } |
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136 | |
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137 | static __inline register_t |
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138 | mfpvr(void) |
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139 | { |
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140 | register_t value; |
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141 | |
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142 | __asm __volatile ("mfpvr %0" : "=r"(value)); |
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143 | |
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144 | return (value); |
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145 | } |
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146 | |
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147 | static __inline u_quad_t |
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148 | mftb(void) |
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149 | { |
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150 | u_quad_t tb; |
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151 | #ifdef __powerpc64__ |
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152 | __asm __volatile ("mftb %0" : "=r"(tb)); |
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153 | #else |
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154 | uint32_t *tbup = (uint32_t *)&tb; |
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155 | uint32_t *tblp = tbup + 1; |
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156 | |
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157 | do { |
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158 | *tbup = mfspr(TBR_TBU); |
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159 | *tblp = mfspr(TBR_TBL); |
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160 | } while (*tbup != mfspr(TBR_TBU)); |
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161 | #endif |
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162 | |
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163 | return (tb); |
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164 | } |
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165 | |
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166 | static __inline void |
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167 | mttb(u_quad_t time) |
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168 | { |
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169 | |
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170 | mtspr(TBR_TBWL, 0); |
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171 | mtspr(TBR_TBWU, (uint32_t)(time >> 32)); |
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172 | mtspr(TBR_TBWL, (uint32_t)(time & 0xffffffff)); |
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173 | } |
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174 | |
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175 | static __inline void |
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176 | eieio(void) |
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177 | { |
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178 | |
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179 | __asm __volatile ("eieio" : : : "memory"); |
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180 | } |
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181 | |
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182 | static __inline void |
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183 | isync(void) |
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184 | { |
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185 | |
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186 | __asm __volatile ("isync" : : : "memory"); |
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187 | } |
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188 | |
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189 | static __inline void |
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190 | powerpc_sync(void) |
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191 | { |
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192 | |
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193 | __asm __volatile ("sync" : : : "memory"); |
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194 | } |
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195 | |
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196 | static __inline register_t |
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197 | intr_disable(void) |
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198 | { |
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199 | register_t msr; |
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200 | |
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201 | msr = mfmsr(); |
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202 | mtmsr(msr & ~PSL_EE); |
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203 | return (msr); |
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204 | } |
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205 | |
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206 | static __inline void |
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207 | intr_restore(register_t msr) |
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208 | { |
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209 | |
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210 | mtmsr(msr); |
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211 | } |
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212 | |
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213 | static __inline struct pcpu * |
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214 | powerpc_get_pcpup(void) |
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215 | { |
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216 | struct pcpu *ret; |
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217 | |
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218 | __asm __volatile("mfsprg %0, 0" : "=r"(ret)); |
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219 | |
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220 | return (ret); |
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221 | } |
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222 | |
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223 | #endif /* _KERNEL */ |
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224 | |
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225 | #endif /* !_MACHINE_CPUFUNC_H_ */ |
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