1 | /* $NetBSD: if_udavreg.h,v 1.2 2003/09/04 15:17:39 tsutsui Exp $ */ |
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2 | /* $nabe: if_udavreg.h,v 1.2 2003/08/21 16:26:40 nabe Exp $ */ |
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3 | /* $FreeBSD$ */ |
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4 | /*- |
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5 | * Copyright (c) 2003 |
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6 | * Shingo WATANABE <nabe@nabechan.org>. All rights reserved. |
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7 | * |
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8 | * Redistribution and use in source and binary forms, with or without |
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9 | * modification, are permitted provided that the following conditions |
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10 | * are met: |
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11 | * 1. Redistributions of source code must retain the above copyright |
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12 | * notice, this list of conditions and the following disclaimer. |
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13 | * 2. Redistributions in binary form must reproduce the above copyright |
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14 | * notice, this list of conditions and the following disclaimer in the |
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15 | * documentation and/or other materials provided with the distribution. |
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16 | * 3. Neither the name of the author nor the names of any co-contributors |
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17 | * may be used to endorse or promote products derived from this software |
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18 | * without specific prior written permission. |
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19 | * |
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20 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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21 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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22 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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23 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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24 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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25 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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26 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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27 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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28 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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29 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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30 | * SUCH DAMAGE. |
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31 | * |
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32 | */ |
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33 | |
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34 | #define UDAV_IFACE_INDEX 0 |
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35 | #define UDAV_CONFIG_INDEX 0 /* config number 1 */ |
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36 | |
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37 | #define UDAV_TX_TIMEOUT 1000 |
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38 | #define UDAV_TIMEOUT 10000 |
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39 | |
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40 | #define UDAV_TX_TIMEOUT 1000 |
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41 | #define UDAV_TIMEOUT 10000 |
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42 | |
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43 | /* Packet length */ |
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44 | #define UDAV_MIN_FRAME_LEN 60 |
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45 | |
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46 | /* Request */ |
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47 | #define UDAV_REQ_REG_READ 0x00 /* Read from register(s) */ |
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48 | #define UDAV_REQ_REG_WRITE 0x01 /* Write to register(s) */ |
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49 | #define UDAV_REQ_REG_WRITE1 0x03 /* Write to a register */ |
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50 | |
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51 | #define UDAV_REQ_MEM_READ 0x02 /* Read from memory */ |
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52 | #define UDAV_REQ_MEM_WRITE 0x05 /* Write to memory */ |
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53 | #define UDAV_REQ_MEM_WRITE1 0x07 /* Write a byte to memory */ |
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54 | |
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55 | /* Registers */ |
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56 | #define UDAV_NCR 0x00 /* Network Control Register */ |
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57 | #define UDAV_NCR_EXT_PHY (1<<7) /* Select External PHY */ |
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58 | #define UDAV_NCR_WAKEEN (1<<6) /* Wakeup Event Enable */ |
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59 | #define UDAV_NCR_FCOL (1<<4) /* Force Collision Mode */ |
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60 | #define UDAV_NCR_FDX (1<<3) /* Full-Duplex Mode (RO on Int. PHY) */ |
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61 | #define UDAV_NCR_LBK1 (1<<2) /* Lookback Mode */ |
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62 | #define UDAV_NCR_LBK0 (1<<1) /* Lookback Mode */ |
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63 | #define UDAV_NCR_RST (1<<0) /* Software reset */ |
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64 | |
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65 | #define UDAV_RCR 0x05 /* RX Control Register */ |
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66 | #define UDAV_RCR_WTDIS (1<<6) /* Watchdog Timer Disable */ |
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67 | #define UDAV_RCR_DIS_LONG (1<<5) /* Discard Long Packet(over 1522Byte) */ |
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68 | #define UDAV_RCR_DIS_CRC (1<<4) /* Discard CRC Error Packet */ |
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69 | #define UDAV_RCR_ALL (1<<3) /* Pass All Multicast */ |
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70 | #define UDAV_RCR_RUNT (1<<2) /* Pass Runt Packet */ |
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71 | #define UDAV_RCR_PRMSC (1<<1) /* Promiscuous Mode */ |
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72 | #define UDAV_RCR_RXEN (1<<0) /* RX Enable */ |
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73 | |
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74 | #define UDAV_RSR 0x06 /* RX Status Register */ |
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75 | #define UDAV_RSR_RF (1<<7) /* Runt Frame */ |
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76 | #define UDAV_RSR_MF (1<<6) /* Multicast Frame */ |
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77 | #define UDAV_RSR_LCS (1<<5) /* Late Collision Seen */ |
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78 | #define UDAV_RSR_RWTO (1<<4) /* Receive Watchdog Time-Out */ |
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79 | #define UDAV_RSR_PLE (1<<3) /* Physical Layer Error */ |
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80 | #define UDAV_RSR_AE (1<<2) /* Alignment Error */ |
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81 | #define UDAV_RSR_CE (1<<1) /* CRC Error */ |
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82 | #define UDAV_RSR_FOE (1<<0) /* FIFO Overflow Error */ |
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83 | #define UDAV_RSR_ERR (UDAV_RSR_RF | UDAV_RSR_LCS | \ |
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84 | UDAV_RSR_RWTO | UDAV_RSR_PLE | \ |
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85 | UDAV_RSR_AE | UDAV_RSR_CE | UDAV_RSR_FOE) |
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86 | |
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87 | #define UDAV_EPCR 0x0b /* EEPROM & PHY Control Register */ |
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88 | #define UDAV_EPCR_REEP (1<<5) /* Reload EEPROM */ |
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89 | #define UDAV_EPCR_WEP (1<<4) /* Write EEPROM enable */ |
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90 | #define UDAV_EPCR_EPOS (1<<3) /* EEPROM or PHY Operation Select */ |
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91 | #define UDAV_EPCR_ERPRR (1<<2) /* EEPROM/PHY Register Read Command */ |
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92 | #define UDAV_EPCR_ERPRW (1<<1) /* EEPROM/PHY Register Write Command */ |
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93 | #define UDAV_EPCR_ERRE (1<<0) /* EEPROM/PHY Access Status */ |
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94 | |
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95 | #define UDAV_EPAR 0x0c /* EEPROM & PHY Control Register */ |
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96 | #define UDAV_EPAR_PHY_ADR1 (1<<7) /* PHY Address bit 1 */ |
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97 | #define UDAV_EPAR_PHY_ADR0 (1<<6) /* PHY Address bit 0 */ |
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98 | #define UDAV_EPAR_EROA (1<<0) /* EEPROM Word/PHY Register Address */ |
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99 | #define UDAV_EPAR_EROA_MASK (0x1f) /* [5:0] */ |
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100 | |
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101 | #define UDAV_EPDRL 0x0d /* EEPROM & PHY Data Register */ |
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102 | #define UDAV_EPDRH 0x0e /* EEPROM & PHY Data Register */ |
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103 | |
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104 | #define UDAV_PAR0 0x10 /* Ethernet Address, load from EEPROM */ |
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105 | #define UDAV_PAR1 0x11 /* Ethernet Address, load from EEPROM */ |
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106 | #define UDAV_PAR2 0x12 /* Ethernet Address, load from EEPROM */ |
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107 | #define UDAV_PAR3 0x13 /* Ethernet Address, load from EEPROM */ |
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108 | #define UDAV_PAR4 0x14 /* Ethernet Address, load from EEPROM */ |
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109 | #define UDAV_PAR5 0x15 /* Ethernet Address, load from EEPROM */ |
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110 | #define UDAV_PAR UDAV_PAR0 |
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111 | |
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112 | #define UDAV_MAR0 0x16 /* Multicast Register */ |
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113 | #define UDAV_MAR1 0x17 /* Multicast Register */ |
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114 | #define UDAV_MAR2 0x18 /* Multicast Register */ |
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115 | #define UDAV_MAR3 0x19 /* Multicast Register */ |
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116 | #define UDAV_MAR4 0x1a /* Multicast Register */ |
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117 | #define UDAV_MAR5 0x1b /* Multicast Register */ |
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118 | #define UDAV_MAR6 0x1c /* Multicast Register */ |
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119 | #define UDAV_MAR7 0x1d /* Multicast Register */ |
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120 | #define UDAV_MAR UDAV_MAR0 |
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121 | |
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122 | #define UDAV_GPCR 0x1e /* General purpose control register */ |
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123 | #define UDAV_GPCR_GEP_CNTL6 (1<<6) /* General purpose control 6 */ |
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124 | #define UDAV_GPCR_GEP_CNTL5 (1<<5) /* General purpose control 5 */ |
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125 | #define UDAV_GPCR_GEP_CNTL4 (1<<4) /* General purpose control 4 */ |
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126 | #define UDAV_GPCR_GEP_CNTL3 (1<<3) /* General purpose control 3 */ |
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127 | #define UDAV_GPCR_GEP_CNTL2 (1<<2) /* General purpose control 2 */ |
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128 | #define UDAV_GPCR_GEP_CNTL1 (1<<1) /* General purpose control 1 */ |
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129 | #define UDAV_GPCR_GEP_CNTL0 (1<<0) /* General purpose control 0 */ |
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130 | |
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131 | #define UDAV_GPR 0x1f /* General purpose register */ |
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132 | #define UDAV_GPR_GEPIO6 (1<<6) /* General purpose 6 */ |
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133 | #define UDAV_GPR_GEPIO5 (1<<5) /* General purpose 5 */ |
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134 | #define UDAV_GPR_GEPIO4 (1<<4) /* General purpose 4 */ |
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135 | #define UDAV_GPR_GEPIO3 (1<<3) /* General purpose 3 */ |
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136 | #define UDAV_GPR_GEPIO2 (1<<2) /* General purpose 2 */ |
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137 | #define UDAV_GPR_GEPIO1 (1<<1) /* General purpose 1 */ |
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138 | #define UDAV_GPR_GEPIO0 (1<<0) /* General purpose 0 */ |
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139 | |
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140 | #define GET_MII(sc) uether_getmii(&(sc)->sc_ue) |
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141 | |
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142 | struct udav_rxpkt { |
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143 | uint8_t rxstat; |
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144 | uint16_t pktlen; |
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145 | } __packed; |
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146 | |
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147 | enum { |
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148 | UDAV_BULK_DT_WR, |
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149 | UDAV_BULK_DT_RD, |
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150 | UDAV_INTR_DT_RD, |
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151 | UDAV_N_TRANSFER, |
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152 | }; |
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153 | |
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154 | struct udav_softc { |
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155 | struct usb_ether sc_ue; |
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156 | struct mtx sc_mtx; |
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157 | struct usb_xfer *sc_xfer[UDAV_N_TRANSFER]; |
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158 | |
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159 | int sc_flags; |
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160 | #define UDAV_FLAG_LINK 0x0001 |
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161 | #define UDAV_FLAG_EXT_PHY 0x0040 |
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162 | #define UDAV_FLAG_NO_PHY 0x0080 |
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163 | }; |
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164 | |
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165 | #define UDAV_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) |
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166 | #define UDAV_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) |
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167 | #define UDAV_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) |
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