source: rtems-libbsd/freebsd/sys/dev/usb/controller/saf1761_otg.h @ cf8e1d4

5-freebsd-12
Last change on this file since cf8e1d4 was cf8e1d4, checked in by Christian Mauderer <Christian.Mauderer@…>, on Apr 11, 2017 at 8:36:12 AM

usb/saf1761: Import from FreeBSD.

Import the files for the SAF1761 USB controller from
FreeBSD commit:

642b174daddbd0efd9bb5f242c43f4ab4db6869f
Tue Apr 4 04:01:02 2017

  • Property mode set to 100644
File size: 5.4 KB
RevLine 
[cf8e1d4]1/* $FreeBSD$ */
2/*-
3 * Copyright (c) 2014 Hans Petter Selasky <hselasky@FreeBSD.org>
4 * All rights reserved.
5 *
6 * This software was developed by SRI International and the University of
7 * Cambridge Computer Laboratory under DARPA/AFRL contract (FA8750-10-C-0237)
8 * ("CTSRD"), as part of the DARPA CRASH research programme.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * SUCH DAMAGE.
30 */
31
32#ifndef _SAF1761_OTG_H_
33#define _SAF1761_OTG_H_
34
35#define SOTG_MAX_DEVICES MIN(USB_MAX_DEVICES, 32)
36#define SOTG_FS_MAX_PACKET_SIZE 64
37#define SOTG_HS_MAX_PACKET_SIZE 512
38#define SOTG_NUM_PORTS 2        /* one Device and one Host port */
39#define SOTG_HOST_PORT_NUM 1
40#define SOTG_DEVICE_PORT_NUM 2
41#define SOTG_HOST_CHANNEL_MAX (3 * 32)
42
43/* Macros used for reading and writing little endian registers */
44
45#define SAF1761_READ_LE_4(sc, reg) ({ uint32_t _temp; \
46  _temp = bus_space_read_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (reg)); \
47  le32toh(_temp); })
48
49#define SAF1761_WRITE_LE_4(sc, reg, data) do { \
50  uint32_t _temp = (data); \
51  bus_space_write_4((sc)->sc_io_tag, (sc)->sc_io_hdl, (reg), htole32(_temp)); \
52} while (0)
53
54/* 90ns delay macro */
55
56#define SAF1761_90NS_DELAY(sc) do { \
57        (void) SAF1761_READ_LE_4(sc, SOTG_VEND_PROD_ID); \
58        (void) SAF1761_READ_LE_4(sc, SOTG_VEND_PROD_ID); \
59        (void) SAF1761_READ_LE_4(sc, SOTG_VEND_PROD_ID); \
60        (void) SAF1761_READ_LE_4(sc, SOTG_VEND_PROD_ID); \
61} while (0)
62
63struct saf1761_otg_softc;
64struct saf1761_otg_td;
65
66typedef uint8_t (saf1761_otg_cmd_t)(struct saf1761_otg_softc *, struct saf1761_otg_td *td);
67
68struct saf1761_otg_td {
69        struct saf1761_otg_td *obj_next;
70        saf1761_otg_cmd_t *func;
71        struct usb_page_cache *pc;
72        uint32_t offset;
73        uint32_t remainder;
74        uint32_t dw1_value;
75        uint16_t max_packet_size;
76        uint8_t ep_index;
77        uint8_t ep_type;
78        uint8_t channel;
79        uint8_t uframe;
80        uint8_t interval;
81        uint8_t error_any:1;
82        uint8_t error_stall:1;
83        uint8_t alt_next:1;
84        uint8_t short_pkt:1;
85        uint8_t did_stall:1;
86        uint8_t toggle:1;
87        uint8_t set_toggle:1;
88};
89
90struct saf1761_otg_std_temp {
91        saf1761_otg_cmd_t *func;
92        struct usb_page_cache *pc;
93        struct saf1761_otg_td *td;
94        struct saf1761_otg_td *td_next;
95        uint32_t len;
96        uint32_t offset;
97        uint16_t max_frame_size;
98        uint8_t short_pkt;
99        /*
100         * short_pkt = 0: transfer should be short terminated
101         * short_pkt = 1: transfer should not be short terminated
102         */
103        uint8_t setup_alt_next;
104        uint8_t did_stall;
105};
106
107struct saf1761_otg_config_desc {
108        struct usb_config_descriptor confd;
109        struct usb_interface_descriptor ifcd;
110        struct usb_endpoint_descriptor endpd;
111} __packed;
112
113union saf1761_otg_hub_temp {
114        uWord   wValue;
115        struct usb_port_status ps;
116};
117
118struct saf1761_otg_flags {
119        uint8_t change_connect:1;
120        uint8_t change_suspend:1;
121        uint8_t status_suspend:1;       /* set if suspended */
122        uint8_t status_vbus:1;          /* set if present */
123        uint8_t status_bus_reset:1;     /* set if reset complete */
124        uint8_t clocks_off:1;
125        uint8_t port_powered:1;
126        uint8_t port_enabled:1;
127        uint8_t d_pulled_up:1;
128};
129
130struct saf1761_otg_softc {
131        struct usb_bus sc_bus;
132        union saf1761_otg_hub_temp sc_hub_temp;
133
134        struct usb_device *sc_devices[SOTG_MAX_DEVICES];
135        struct resource *sc_io_res;
136        struct resource *sc_irq_res;
137        void   *sc_intr_hdl;
138        bus_size_t sc_io_size;
139        bus_space_tag_t sc_io_tag;
140        bus_space_handle_t sc_io_hdl;
141
142        uint32_t sc_host_async_busy_map[2];
143        uint32_t sc_host_async_map;
144        uint32_t sc_host_async_suspend_map;
145        uint32_t sc_host_intr_busy_map[2];
146        uint32_t sc_host_intr_map;
147        uint32_t sc_host_intr_suspend_map;
148        uint32_t sc_host_isoc_busy_map[2];
149        uint32_t sc_host_isoc_map;
150        uint32_t sc_host_isoc_suspend_map;
151        uint32_t sc_intr_enable;        /* enabled interrupts */
152        uint32_t sc_hw_mode;            /* hardware mode */
153        uint32_t sc_interrupt_cfg;      /* interrupt configuration */
154        uint32_t sc_xfer_complete;
155
156        uint32_t sc_bounce_buffer[1024 / 4];
157
158        uint8_t sc_rt_addr;             /* root HUB address */
159        uint8_t sc_dv_addr;             /* device address */
160        uint8_t sc_conf;                /* root HUB config */
161        uint8_t sc_isreset;             /* host mode */
162
163        uint8_t sc_hub_idata[1];
164
165        struct saf1761_otg_flags sc_flags;
166};
167
168/* prototypes */
169
170usb_error_t saf1761_otg_init(struct saf1761_otg_softc *sc);
171void    saf1761_otg_uninit(struct saf1761_otg_softc *sc);
172driver_filter_t saf1761_otg_filter_interrupt;
173driver_intr_t saf1761_otg_interrupt;
174
175#endif                                  /* _SAF1761_OTG_H_ */
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