source: rtems-libbsd/freebsd/sys/dev/usb/controller/ohci.h @ b43517b

55-freebsd-126-freebsd-12
Last change on this file since b43517b was b43517b, checked in by Sebastian Huber <sebastian.huber@…>, on 07/18/17 at 06:31:03

ohci: Fix for BSP_USB_OTG_TRANSCEIVER_I2C_ADDR

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File size: 8.6 KB
Line 
1/* $FreeBSD$ */
2/*-
3 * Copyright (c) 1998 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Lennart Augustsson (lennart@augustsson.net) at
8 * Carlstedt Research & Technology.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 *    notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 *    notice, this list of conditions and the following disclaimer in the
17 *    documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32#ifndef _OHCI_H_
33#define _OHCI_H_
34
35#ifdef __rtems__
36#ifdef BSP_USB_OTG_TRANSCEIVER_I2C_ADDR
37#include <dev/usb/usb_otg_transceiver.h>
38#endif
39#endif /* __rtems__ */
40#define OHCI_MAX_DEVICES MIN(USB_MAX_DEVICES, 128)
41
42#define OHCI_NO_INTRS           32
43#define OHCI_HCCA_SIZE          256
44
45/* Structures alignment (bytes) */
46#define OHCI_HCCA_ALIGN         256
47#define OHCI_ED_ALIGN           16
48#define OHCI_TD_ALIGN           16
49#define OHCI_ITD_ALIGN          32
50
51#define OHCI_PAGE_SIZE          0x1000
52#define OHCI_PAGE(x)            ((x) &~ 0xfff)
53#define OHCI_PAGE_OFFSET(x)     ((x) & 0xfff)
54#define OHCI_PAGE_MASK(x)       ((x) & 0xfff)
55
56#if     ((USB_PAGE_SIZE < OHCI_ED_ALIGN) || (OHCI_ED_ALIGN == 0) ||     \
57        (USB_PAGE_SIZE < OHCI_TD_ALIGN) || (OHCI_TD_ALIGN == 0) ||      \
58        (USB_PAGE_SIZE < OHCI_ITD_ALIGN) || (OHCI_ITD_ALIGN == 0) ||    \
59        (USB_PAGE_SIZE < OHCI_PAGE_SIZE) || (OHCI_PAGE_SIZE == 0))
60#error  "Invalid USB page size!"
61#endif
62
63#define OHCI_VIRTUAL_FRAMELIST_COUNT 128/* dummy */
64
65#if (OHCI_VIRTUAL_FRAMELIST_COUNT < USB_MAX_FS_ISOC_FRAMES_PER_XFER)
66#error "maximum number of full-speed isochronous frames is higher than supported!"
67#endif
68
69struct ohci_hcca {
70        volatile uint32_t hcca_interrupt_table[OHCI_NO_INTRS];
71        volatile uint32_t hcca_frame_number;
72        volatile uint32_t hcca_done_head;
73#define OHCI_DONE_INTRS         1
74} __aligned(OHCI_HCCA_ALIGN);
75
76typedef struct ohci_hcca ohci_hcca_t;
77
78struct ohci_ed {
79        volatile uint32_t ed_flags;
80#define OHCI_ED_GET_FA(s)       ((s) & 0x7f)
81#define OHCI_ED_ADDRMASK        0x0000007f
82#define OHCI_ED_SET_FA(s)       (s)
83#define OHCI_ED_GET_EN(s)       (((s) >> 7) & 0xf)
84#define OHCI_ED_SET_EN(s)       ((s) << 7)
85#define OHCI_ED_DIR_MASK        0x00001800
86#define OHCI_ED_DIR_TD          0x00000000
87#define OHCI_ED_DIR_OUT         0x00000800
88#define OHCI_ED_DIR_IN          0x00001000
89#define OHCI_ED_SPEED           0x00002000
90#define OHCI_ED_SKIP            0x00004000
91#define OHCI_ED_FORMAT_GEN      0x00000000
92#define OHCI_ED_FORMAT_ISO      0x00008000
93#define OHCI_ED_GET_MAXP(s)     (((s) >> 16) & 0x07ff)
94#define OHCI_ED_SET_MAXP(s)     ((s) << 16)
95#define OHCI_ED_MAXPMASK        (0x7ff << 16)
96        volatile uint32_t ed_tailp;
97        volatile uint32_t ed_headp;
98#define OHCI_HALTED             0x00000001
99#define OHCI_TOGGLECARRY        0x00000002
100#define OHCI_HEADMASK           0xfffffffc
101        volatile uint32_t ed_next;
102/*
103 * Extra information needed:
104 */
105        struct ohci_ed *next;
106        struct ohci_ed *prev;
107        struct ohci_ed *obj_next;
108        struct usb_page_cache *page_cache;
109        uint32_t ed_self;
110} __aligned(OHCI_ED_ALIGN);
111
112typedef struct ohci_ed ohci_ed_t;
113
114struct ohci_td {
115        volatile uint32_t td_flags;
116#define OHCI_TD_R               0x00040000      /* Buffer Rounding  */
117#define OHCI_TD_DP_MASK         0x00180000      /* Direction / PID */
118#define OHCI_TD_SETUP           0x00000000
119#define OHCI_TD_OUT             0x00080000
120#define OHCI_TD_IN              0x00100000
121#define OHCI_TD_GET_DI(x)       (((x) >> 21) & 7)       /* Delay Interrupt */
122#define OHCI_TD_SET_DI(x)       ((x) << 21)
123#define OHCI_TD_NOINTR          0x00e00000
124#define OHCI_TD_INTR_MASK       0x00e00000
125#define OHCI_TD_TOGGLE_CARRY    0x00000000
126#define OHCI_TD_TOGGLE_0        0x02000000
127#define OHCI_TD_TOGGLE_1        0x03000000
128#define OHCI_TD_TOGGLE_MASK     0x03000000
129#define OHCI_TD_GET_EC(x)       (((x) >> 26) & 3)       /* Error Count */
130#define OHCI_TD_GET_CC(x)       ((x) >> 28)     /* Condition Code */
131#define OHCI_TD_SET_CC(x)       ((x) << 28)
132#define OHCI_TD_NOCC            0xf0000000
133        volatile uint32_t td_cbp;       /* Current Buffer Pointer */
134        volatile uint32_t td_next;      /* Next TD */
135#define OHCI_TD_NEXT_END        0
136        volatile uint32_t td_be;        /* Buffer End */
137/*
138 * Extra information needed:
139 */
140        struct ohci_td *obj_next;
141        struct ohci_td *alt_next;
142        struct usb_page_cache *page_cache;
143        uint32_t td_self;
144        uint16_t len;
145} __aligned(OHCI_TD_ALIGN);
146
147typedef struct ohci_td ohci_td_t;
148
149struct ohci_itd {
150        volatile uint32_t itd_flags;
151#define OHCI_ITD_GET_SF(x)      ((x) & 0x0000ffff)
152#define OHCI_ITD_SET_SF(x)      ((x) & 0xffff)
153#define OHCI_ITD_GET_DI(x)      (((x) >> 21) & 7)       /* Delay Interrupt */
154#define OHCI_ITD_SET_DI(x)      ((x) << 21)
155#define OHCI_ITD_NOINTR         0x00e00000
156#define OHCI_ITD_GET_FC(x)      ((((x) >> 24) & 7)+1)   /* Frame Count */
157#define OHCI_ITD_SET_FC(x)      (((x)-1) << 24)
158#define OHCI_ITD_GET_CC(x)      ((x) >> 28)     /* Condition Code */
159#define OHCI_ITD_NOCC           0xf0000000
160#define OHCI_ITD_NOFFSET        8
161        volatile uint32_t itd_bp0;      /* Buffer Page 0 */
162        volatile uint32_t itd_next;     /* Next ITD */
163        volatile uint32_t itd_be;       /* Buffer End */
164        volatile uint16_t itd_offset[OHCI_ITD_NOFFSET]; /* Buffer offsets and
165                                                         * Status */
166#define OHCI_ITD_PAGE_SELECT    0x00001000
167#define OHCI_ITD_MK_OFFS(len)   (0xe000 | ((len) & 0x1fff))
168#define OHCI_ITD_PSW_LENGTH(x)  ((x) & 0xfff)   /* Transfer length */
169#define OHCI_ITD_PSW_GET_CC(x)  ((x) >> 12)     /* Condition Code */
170/*
171 * Extra information needed:
172 */
173        struct ohci_itd *obj_next;
174        struct usb_page_cache *page_cache;
175        uint32_t itd_self;
176        uint8_t frames;
177} __aligned(OHCI_ITD_ALIGN);
178
179typedef struct ohci_itd ohci_itd_t;
180
181#define OHCI_CC_NO_ERROR                0
182#define OHCI_CC_CRC                     1
183#define OHCI_CC_BIT_STUFFING            2
184#define OHCI_CC_DATA_TOGGLE_MISMATCH    3
185#define OHCI_CC_STALL                   4
186#define OHCI_CC_DEVICE_NOT_RESPONDING   5
187#define OHCI_CC_PID_CHECK_FAILURE       6
188#define OHCI_CC_UNEXPECTED_PID          7
189#define OHCI_CC_DATA_OVERRUN            8
190#define OHCI_CC_DATA_UNDERRUN           9
191#define OHCI_CC_BUFFER_OVERRUN          12
192#define OHCI_CC_BUFFER_UNDERRUN         13
193#define OHCI_CC_NOT_ACCESSED            15
194
195/* Some delay needed when changing certain registers. */
196#define OHCI_ENABLE_POWER_DELAY         5
197#define OHCI_READ_DESC_DELAY            5
198
199#define OHCI_NO_EDS                     (2*OHCI_NO_INTRS)
200
201struct ohci_hw_softc {
202        struct usb_page_cache hcca_pc;
203        struct usb_page_cache ctrl_start_pc;
204        struct usb_page_cache bulk_start_pc;
205        struct usb_page_cache isoc_start_pc;
206        struct usb_page_cache intr_start_pc[OHCI_NO_EDS];
207
208        struct usb_page hcca_pg;
209        struct usb_page ctrl_start_pg;
210        struct usb_page bulk_start_pg;
211        struct usb_page isoc_start_pg;
212        struct usb_page intr_start_pg[OHCI_NO_EDS];
213};
214
215struct ohci_config_desc {
216        struct usb_config_descriptor confd;
217        struct usb_interface_descriptor ifcd;
218        struct usb_endpoint_descriptor endpd;
219} __packed;
220
221union ohci_hub_desc {
222        struct usb_status stat;
223        struct usb_port_status ps;
224        struct usb_hub_descriptor hubd;
225        uint8_t temp[128];
226};
227
228typedef struct ohci_softc {
229        struct ohci_hw_softc sc_hw;
230        struct usb_bus sc_bus;          /* base device */
231        struct usb_callout sc_tmo_rhsc;
232        union ohci_hub_desc sc_hub_desc;
233
234        struct usb_device *sc_devices[OHCI_MAX_DEVICES];
235        struct resource *sc_io_res;
236        struct resource *sc_irq_res;
237        struct ohci_hcca *sc_hcca_p;
238        struct ohci_ed *sc_ctrl_p_last;
239        struct ohci_ed *sc_bulk_p_last;
240        struct ohci_ed *sc_isoc_p_last;
241        struct ohci_ed *sc_intr_p_last[OHCI_NO_EDS];
242        void   *sc_intr_hdl;
243        device_t sc_dev;
244        bus_size_t sc_io_size;
245        bus_space_tag_t sc_io_tag;
246        bus_space_handle_t sc_io_hdl;
247
248        uint32_t sc_eintrs;             /* enabled interrupts */
249
250        uint16_t sc_intr_stat[OHCI_NO_EDS];
251        uint16_t sc_id_vendor;
252
253        uint8_t sc_noport;
254        uint8_t sc_addr;                /* device address */
255        uint8_t sc_conf;                /* device configuration */
256        uint8_t sc_hub_idata[32];
257
258        char    sc_vendor[16];
259#ifdef __rtems__
260        int sc_init_done;
261#ifdef BSP_USB_OTG_TRANSCEIVER_I2C_ADDR
262        struct usb_otg_transceiver sc_otg_trans;
263#endif /* BSP_USB_OTG_TRANSCEIVER_I2C_ADDR */
264#endif /* __rtems__ */
265
266} ohci_softc_t;
267
268usb_bus_mem_cb_t ohci_iterate_hw_softc;
269
270usb_error_t ohci_init(ohci_softc_t *sc);
271void    ohci_detach(struct ohci_softc *sc);
272void    ohci_interrupt(ohci_softc_t *sc);
273
274#endif                                  /* _OHCI_H_ */
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