Context Navigation

mmc.c @ c7e162a

55-freebsd-126-freebsd-12

Last change on this file since c7e162a was c7e162a, checked in by Sebastian Huber <sebastian.huber@…>, on 04/26/18 at 13:19:42

mmc: Optimize mmc_wait_for_req()

Use a self-contained RTEMS binary semaphore instead of msleep() and
wakeup(). This is itself more efficient and in addition allows the use
of mmc_wakeup() in interrupt context.

Property mode set to 100644

File size: 57.3 KB

Line
1	#include <machine/rtems-bsd-kernel-space.h>
2
3	/*-
4	* Copyright (c) 2006 Bernd Walter. All rights reserved.
5	* Copyright (c) 2006 M. Warner Losh. All rights reserved.
6	* Copyright (c) 2017 Marius Strobl <marius@FreeBSD.org>
7	*
8	* Redistribution and use in source and binary forms, with or without
9	* modification, are permitted provided that the following conditions
10	* are met:
11	* 1. Redistributions of source code must retain the above copyright
12	* notice, this list of conditions and the following disclaimer.
13	* 2. Redistributions in binary form must reproduce the above copyright
14	* notice, this list of conditions and the following disclaimer in the
15	* documentation and/or other materials provided with the distribution.
16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*
28	* Portions of this software may have been developed with reference to
29	* the SD Simplified Specification. The following disclaimer may apply:
30	*
31	* The following conditions apply to the release of the simplified
32	* specification ("Simplified Specification") by the SD Card Association and
33	* the SD Group. The Simplified Specification is a subset of the complete SD
34	* Specification which is owned by the SD Card Association and the SD
35	* Group. This Simplified Specification is provided on a non-confidential
36	* basis subject to the disclaimers below. Any implementation of the
37	* Simplified Specification may require a license from the SD Card
38	* Association, SD Group, SD-3C LLC or other third parties.
39	*
40	* Disclaimers:
41	*
42	* The information contained in the Simplified Specification is presented only
43	* as a standard specification for SD Cards and SD Host/Ancillary products and
44	* is provided "AS-IS" without any representations or warranties of any
45	* kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD
46	* Card Association for any damages, any infringements of patents or other
47	* right of the SD Group, SD-3C LLC, the SD Card Association or any third
48	* parties, which may result from its use. No license is granted by
49	* implication, estoppel or otherwise under any patent or other rights of the
50	* SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing
51	* herein shall be construed as an obligation by the SD Group, the SD-3C LLC
52	* or the SD Card Association to disclose or distribute any technical
53	* information, know-how or other confidential information to any third party.
54	*/
55
56	#include <sys/cdefs.h>
57	__FBSDID("$FreeBSD$");
58
59	#include <sys/param.h>
60	#include <sys/systm.h>
61	#include <sys/kernel.h>
62	#include <sys/malloc.h>
63	#include <sys/lock.h>
64	#include <sys/module.h>
65	#include <sys/mutex.h>
66	#include <sys/bus.h>
67	#include <sys/endian.h>
68	#include <sys/sysctl.h>
69	#include <sys/time.h>
70
71	#include <dev/mmc/bridge.h>
72	#include <dev/mmc/mmc_private.h>
73	#include <dev/mmc/mmc_subr.h>
74	#include <dev/mmc/mmcreg.h>
75	#include <dev/mmc/mmcbrvar.h>
76	#include <dev/mmc/mmcvar.h>
77
78	#include <rtems/bsd/local/mmcbr_if.h>
79	#include <rtems/bsd/local/mmcbus_if.h>
80
81	CTASSERT(bus_timing_max <= sizeof(uint32_t) * NBBY);
82
83	/*
84	* Per-card data
85	*/
86	struct mmc_ivars {
87	uint32_t raw_cid[4]; /* Raw bits of the CID */
88	uint32_t raw_csd[4]; /* Raw bits of the CSD */
89	uint32_t raw_scr[2]; /* Raw bits of the SCR */
90	uint8_t raw_ext_csd[MMC_EXTCSD_SIZE]; /* Raw bits of the EXT_CSD */
91	uint32_t raw_sd_status[16]; /* Raw bits of the SD_STATUS */
92	uint16_t rca;
93	enum mmc_card_mode mode;
94	struct mmc_cid cid; /* cid decoded */
95	struct mmc_csd csd; /* csd decoded */
96	struct mmc_scr scr; /* scr decoded */
97	struct mmc_sd_status sd_status; /* SD_STATUS decoded */
98	u_char read_only; /* True when the device is read-only */
99	u_char bus_width; /* Bus width to use */
100	u_char high_cap; /* High Capacity card (block addressed) */
101	uint32_t sec_count; /* Card capacity in 512byte blocks */
102	uint32_t timings; /* Mask of bus timings supported */
103	uint32_t vccq_120; /* Mask of bus timings at VCCQ of 1.2 V */
104	uint32_t vccq_180; /* Mask of bus timings at VCCQ of 1.8 V */
105	uint32_t tran_speed; /* Max speed in normal mode */
106	uint32_t hs_tran_speed; /* Max speed in high speed mode */
107	uint32_t erase_sector; /* Card native erase sector size */
108	uint32_t cmd6_time; /* Generic switch timeout [us] */
109	char card_id_string[64];/* Formatted CID info (serial, MFG, etc) */
110	char card_sn_string[16];/* Formatted serial # for disk->d_ident */
111	};
112
113	#define CMD_RETRIES 3
114
115	static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver");
116
117	static int mmc_debug;
118	SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0,
119	"Debug level");
120
121	/* bus entry points */
122	static int mmc_acquire_bus(device_t busdev, device_t dev);
123	static int mmc_attach(device_t dev);
124	static int mmc_child_location_str(device_t dev, device_t child, char *buf,
125	size_t buflen);
126	static int mmc_detach(device_t dev);
127	static int mmc_probe(device_t dev);
128	static int mmc_read_ivar(device_t bus, device_t child, int which,
129	uintptr_t *result);
130	static int mmc_release_bus(device_t busdev, device_t dev);
131	static int mmc_resume(device_t dev);
132	static int mmc_suspend(device_t dev);
133	static int mmc_wait_for_request(device_t brdev, device_t reqdev,
134	struct mmc_request *req);
135	static int mmc_write_ivar(device_t bus, device_t child, int which,
136	uintptr_t value);
137
138	#define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
139	#define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
140	#define MMC_LOCK_INIT(_sc) \
141	mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \
142	"mmc", MTX_DEF)
143	#define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx);
144	#define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
145	#define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED);
146
147	static int mmc_all_send_cid(struct mmc_softc sc, uint32_t rawcid);
148	static void mmc_app_decode_scr(uint32_t raw_scr, struct mmc_scr scr);
149	static void mmc_app_decode_sd_status(uint32_t *raw_sd_status,
150	struct mmc_sd_status *sd_status);
151	static int mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca,
152	uint32_t *rawsdstatus);
153	static int mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca,
154	uint32_t *rawscr);
155	static int mmc_calculate_clock(struct mmc_softc *sc);
156	static void mmc_decode_cid_mmc(uint32_t raw_cid, struct mmc_cid cid,
157	bool is_4_41p);
158	static void mmc_decode_cid_sd(uint32_t raw_cid, struct mmc_cid cid);
159	static void mmc_decode_csd_mmc(uint32_t raw_csd, struct mmc_csd csd);
160	static void mmc_decode_csd_sd(uint32_t raw_csd, struct mmc_csd csd);
161	static void mmc_delayed_attach(void *xsc);
162	static int mmc_delete_cards(struct mmc_softc *sc);
163	static void mmc_discover_cards(struct mmc_softc *sc);
164	static void mmc_format_card_id_string(struct mmc_ivars *ivar);
165	static void mmc_go_discovery(struct mmc_softc *sc);
166	static uint32_t mmc_get_bits(uint32_t *bits, int bit_len, int start,
167	int size);
168	static int mmc_highest_voltage(uint32_t ocr);
169	static void mmc_idle_cards(struct mmc_softc *sc);
170	static void mmc_ms_delay(int ms);
171	static void mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard);
172	static void mmc_power_down(struct mmc_softc *sc);
173	static void mmc_power_up(struct mmc_softc *sc);
174	static void mmc_rescan_cards(struct mmc_softc *sc);
175	static void mmc_scan(struct mmc_softc *sc);
176	static int mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp,
177	uint8_t value, uint8_t *res);
178	static int mmc_select_card(struct mmc_softc *sc, uint16_t rca);
179	static uint32_t mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr);
180	static int mmc_send_app_op_cond(struct mmc_softc *sc, uint32_t ocr,
181	uint32_t *rocr);
182	static int mmc_send_csd(struct mmc_softc sc, uint16_t rca, uint32_t rawcsd);
183	static int mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs);
184	static int mmc_send_op_cond(struct mmc_softc *sc, uint32_t ocr,
185	uint32_t *rocr);
186	static int mmc_send_relative_addr(struct mmc_softc sc, uint32_t resp);
187	static int mmc_set_blocklen(struct mmc_softc *sc, uint32_t len);
188	static int mmc_set_card_bus_width(struct mmc_softc sc, struct mmc_ivars ivar);
189	static int mmc_set_power_class(struct mmc_softc sc, struct mmc_ivars ivar);
190	static int mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp);
191	static int mmc_set_timing(struct mmc_softc sc, struct mmc_ivars ivar,
192	enum mmc_bus_timing timing);
193	static int mmc_test_bus_width(struct mmc_softc *sc);
194	static uint32_t mmc_timing_to_dtr(struct mmc_ivars *ivar,
195	enum mmc_bus_timing timing);
196	static const char *mmc_timing_to_string(enum mmc_bus_timing timing);
197	static int mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
198	uint32_t arg, uint32_t flags, uint32_t *resp, int retries);
199	static int mmc_wait_for_req(struct mmc_softc sc, struct mmc_request req);
200	static void mmc_wakeup(struct mmc_request *req);
201
202	static void
203	mmc_ms_delay(int ms)
204	{
205
206	DELAY(1000 * ms); /* XXX BAD */
207	}
208
209	static int
210	mmc_probe(device_t dev)
211	{
212
213	device_set_desc(dev, "MMC/SD bus");
214	return (0);
215	}
216
217	static int
218	mmc_attach(device_t dev)
219	{
220	struct mmc_softc *sc;
221
222	sc = device_get_softc(dev);
223	sc->dev = dev;
224	MMC_LOCK_INIT(sc);
225
226	/* We'll probe and attach our children later, but before / mount */
227	sc->config_intrhook.ich_func = mmc_delayed_attach;
228	sc->config_intrhook.ich_arg = sc;
229	if (config_intrhook_establish(&sc->config_intrhook) != 0)
230	device_printf(dev, "config_intrhook_establish failed\n");
231	return (0);
232	}
233
234	static int
235	mmc_detach(device_t dev)
236	{
237	struct mmc_softc *sc = device_get_softc(dev);
238	int err;
239
240	if ((err = mmc_delete_cards(sc)) != 0)
241	return (err);
242	mmc_power_down(sc);
243	MMC_LOCK_DESTROY(sc);
244
245	return (0);
246	}
247
248	static int
249	mmc_suspend(device_t dev)
250	{
251	struct mmc_softc *sc = device_get_softc(dev);
252	int err;
253
254	err = bus_generic_suspend(dev);
255	if (err)
256	return (err);
257	mmc_power_down(sc);
258	return (0);
259	}
260
261	static int
262	mmc_resume(device_t dev)
263	{
264	struct mmc_softc *sc = device_get_softc(dev);
265
266	mmc_scan(sc);
267	return (bus_generic_resume(dev));
268	}
269
270	static int
271	mmc_acquire_bus(device_t busdev, device_t dev)
272	{
273	struct mmc_softc *sc;
274	struct mmc_ivars *ivar;
275	int err, rca;
276	enum mmc_bus_timing timing;
277
278	err = MMCBR_ACQUIRE_HOST(device_get_parent(busdev), busdev);
279	if (err)
280	return (err);
281	sc = device_get_softc(busdev);
282	MMC_LOCK(sc);
283	if (sc->owner)
284	panic("mmc: host bridge didn't serialize us.");
285	sc->owner = dev;
286	MMC_UNLOCK(sc);
287
288	if (busdev != dev) {
289	/*
290	* Keep track of the last rca that we've selected. If
291	* we're asked to do it again, don't. We never
292	* unselect unless the bus code itself wants the mmc
293	* bus, and constantly reselecting causes problems.
294	*/
295	ivar = device_get_ivars(dev);
296	rca = ivar->rca;
297	if (sc->last_rca != rca) {
298	if (mmc_select_card(sc, rca) != MMC_ERR_NONE) {
299	device_printf(sc->dev, "Card at relative "
300	"address %d failed to select.\n", rca);
301	return (ENXIO);
302	}
303	sc->last_rca = rca;
304	timing = mmcbr_get_timing(busdev);
305	/* Prepare bus width for the new card. */
306	if (bootverbose \|\| mmc_debug) {
307	device_printf(busdev,
308	"setting bus width to %d bits %s timing\n",
309	(ivar->bus_width == bus_width_4) ? 4 :
310	(ivar->bus_width == bus_width_8) ? 8 : 1,
311	mmc_timing_to_string(timing));
312	}
313	if (mmc_set_card_bus_width(sc, ivar) != MMC_ERR_NONE) {
314	device_printf(sc->dev, "Card at relative "
315	"address %d failed to set bus width.\n",
316	rca);
317	return (ENXIO);
318	}
319	if (isset(&ivar->vccq_120, timing))
320	mmcbr_set_vccq(busdev, vccq_120);
321	else if (isset(&ivar->vccq_180, timing))
322	mmcbr_set_vccq(busdev, vccq_180);
323	else
324	mmcbr_set_vccq(busdev, vccq_330);
325	if (mmcbr_switch_vccq(busdev) != 0) {
326	device_printf(sc->dev, "Failed to set VCCQ "
327	"for card at relative address %d.\n", rca);
328	return (ENXIO);
329	}
330	if (mmc_set_power_class(sc, ivar) != MMC_ERR_NONE) {
331	device_printf(sc->dev, "Card at relative "
332	"address %d failed to set power class.\n",
333	rca);
334	return (ENXIO);
335	}
336	mmcbr_set_bus_width(busdev, ivar->bus_width);
337	mmcbr_update_ios(busdev);
338	}
339	} else {
340	/*
341	* If there's a card selected, stand down.
342	*/
343	if (sc->last_rca != 0) {
344	mmc_select_card(sc, 0);
345	sc->last_rca = 0;
346	}
347	}
348
349	return (0);
350	}
351
352	static int
353	mmc_release_bus(device_t busdev, device_t dev)
354	{
355	struct mmc_softc *sc;
356	int err;
357
358	sc = device_get_softc(busdev);
359
360	MMC_LOCK(sc);
361	if (!sc->owner)
362	panic("mmc: releasing unowned bus.");
363	if (sc->owner != dev)
364	panic("mmc: you don't own the bus. game over.");
365	MMC_UNLOCK(sc);
366	err = MMCBR_RELEASE_HOST(device_get_parent(busdev), busdev);
367	if (err)
368	return (err);
369	MMC_LOCK(sc);
370	sc->owner = NULL;
371	MMC_UNLOCK(sc);
372	return (0);
373	}
374
375	static uint32_t
376	mmc_select_vdd(struct mmc_softc *sc, uint32_t ocr)
377	{
378
379	return (ocr & MMC_OCR_VOLTAGE);
380	}
381
382	static int
383	mmc_highest_voltage(uint32_t ocr)
384	{
385	int i;
386
387	for (i = MMC_OCR_MAX_VOLTAGE_SHIFT;
388	i >= MMC_OCR_MIN_VOLTAGE_SHIFT; i--)
389	if (ocr & (1 << i))
390	return (i);
391	return (-1);
392	}
393
394	static void
395	mmc_wakeup(struct mmc_request *req)
396	{
397	#ifndef __rtems__
398	struct mmc_softc *sc;
399
400	sc = (struct mmc_softc *)req->done_data;
401	MMC_LOCK(sc);
402	req->flags \|= MMC_REQ_DONE;
403	MMC_UNLOCK(sc);
404	wakeup(req);
405	#else /* __rtems__ */
406	rtems_binary_semaphore_post(&req->req_done);
407	#endif /* __rtems__ */
408	}
409
410	static int
411	mmc_wait_for_req(struct mmc_softc sc, struct mmc_request req)
412	{
413
414	#ifdef __rtems__
415	rtems_binary_semaphore_init(&req->req_done, "mmc_req_done");
416	#endif /* __rtems__ */
417	req->done = mmc_wakeup;
418	req->done_data = sc;
419	if (mmc_debug > 1) {
420	device_printf(sc->dev, "REQUEST: CMD%d arg %#x flags %#x",
421	req->cmd->opcode, req->cmd->arg, req->cmd->flags);
422	if (req->cmd->data) {
423	printf(" data %d\n", (int)req->cmd->data->len);
424	} else
425	printf("\n");
426	}
427	MMCBR_REQUEST(device_get_parent(sc->dev), sc->dev, req);
428	#ifndef __rtems__
429	MMC_LOCK(sc);
430	while ((req->flags & MMC_REQ_DONE) == 0)
431	msleep(req, &sc->sc_mtx, 0, "mmcreq", 0);
432	MMC_UNLOCK(sc);
433	#else /* __rtems__ */
434	rtems_binary_semaphore_wait(&req->req_done);
435	rtems_binary_semaphore_destroy(&req->req_done);
436	#endif /* __rtems__ */
437	if (mmc_debug > 2 \|\| (mmc_debug > 0 && req->cmd->error != MMC_ERR_NONE))
438	device_printf(sc->dev, "CMD%d RESULT: %d\n",
439	req->cmd->opcode, req->cmd->error);
440	return (0);
441	}
442
443	static int
444	mmc_wait_for_request(device_t brdev, device_t reqdev __unused,
445	struct mmc_request *req)
446	{
447	struct mmc_softc *sc = device_get_softc(brdev);
448
449	return (mmc_wait_for_req(sc, req));
450	}
451
452	static int
453	mmc_wait_for_command(struct mmc_softc *sc, uint32_t opcode,
454	uint32_t arg, uint32_t flags, uint32_t *resp, int retries)
455	{
456	struct mmc_command cmd;
457	int err;
458
459	memset(&cmd, 0, sizeof(cmd));
460	cmd.opcode = opcode;
461	cmd.arg = arg;
462	cmd.flags = flags;
463	cmd.data = NULL;
464	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, retries);
465	if (err)
466	return (err);
467	if (resp) {
468	if (flags & MMC_RSP_136)
469	memcpy(resp, cmd.resp, 4 * sizeof(uint32_t));
470	else
471	*resp = cmd.resp[0];
472	}
473	return (0);
474	}
475
476	static void
477	mmc_idle_cards(struct mmc_softc *sc)
478	{
479	device_t dev;
480	struct mmc_command cmd;
481
482	dev = sc->dev;
483	mmcbr_set_chip_select(dev, cs_high);
484	mmcbr_update_ios(dev);
485	mmc_ms_delay(1);
486
487	memset(&cmd, 0, sizeof(cmd));
488	cmd.opcode = MMC_GO_IDLE_STATE;
489	cmd.arg = 0;
490	cmd.flags = MMC_RSP_NONE \| MMC_CMD_BC;
491	cmd.data = NULL;
492	mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
493	mmc_ms_delay(1);
494
495	mmcbr_set_chip_select(dev, cs_dontcare);
496	mmcbr_update_ios(dev);
497	mmc_ms_delay(1);
498	}
499
500	static int
501	mmc_send_app_op_cond(struct mmc_softc sc, uint32_t ocr, uint32_t rocr)
502	{
503	struct mmc_command cmd;
504	int err = MMC_ERR_NONE, i;
505
506	memset(&cmd, 0, sizeof(cmd));
507	cmd.opcode = ACMD_SD_SEND_OP_COND;
508	cmd.arg = ocr;
509	cmd.flags = MMC_RSP_R3 \| MMC_CMD_BCR;
510	cmd.data = NULL;
511
512	for (i = 0; i < 1000; i++) {
513	err = mmc_wait_for_app_cmd(sc->dev, sc->dev, 0, &cmd,
514	CMD_RETRIES);
515	if (err != MMC_ERR_NONE)
516	break;
517	if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) \|\|
518	(ocr & MMC_OCR_VOLTAGE) == 0)
519	break;
520	err = MMC_ERR_TIMEOUT;
521	mmc_ms_delay(10);
522	}
523	if (rocr && err == MMC_ERR_NONE)
524	*rocr = cmd.resp[0];
525	return (err);
526	}
527
528	static int
529	mmc_send_op_cond(struct mmc_softc sc, uint32_t ocr, uint32_t rocr)
530	{
531	struct mmc_command cmd;
532	int err = MMC_ERR_NONE, i;
533
534	memset(&cmd, 0, sizeof(cmd));
535	cmd.opcode = MMC_SEND_OP_COND;
536	cmd.arg = ocr;
537	cmd.flags = MMC_RSP_R3 \| MMC_CMD_BCR;
538	cmd.data = NULL;
539
540	for (i = 0; i < 1000; i++) {
541	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
542	if (err != MMC_ERR_NONE)
543	break;
544	if ((cmd.resp[0] & MMC_OCR_CARD_BUSY) \|\|
545	(ocr & MMC_OCR_VOLTAGE) == 0)
546	break;
547	err = MMC_ERR_TIMEOUT;
548	mmc_ms_delay(10);
549	}
550	if (rocr && err == MMC_ERR_NONE)
551	*rocr = cmd.resp[0];
552	return (err);
553	}
554
555	static int
556	mmc_send_if_cond(struct mmc_softc *sc, uint8_t vhs)
557	{
558	struct mmc_command cmd;
559	int err;
560
561	memset(&cmd, 0, sizeof(cmd));
562	cmd.opcode = SD_SEND_IF_COND;
563	cmd.arg = (vhs << 8) + 0xAA;
564	cmd.flags = MMC_RSP_R7 \| MMC_CMD_BCR;
565	cmd.data = NULL;
566
567	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
568	return (err);
569	}
570
571	static void
572	mmc_power_up(struct mmc_softc *sc)
573	{
574	device_t dev;
575	enum mmc_vccq vccq;
576
577	dev = sc->dev;
578	mmcbr_set_vdd(dev, mmc_highest_voltage(mmcbr_get_host_ocr(dev)));
579	mmcbr_set_bus_mode(dev, opendrain);
580	mmcbr_set_chip_select(dev, cs_dontcare);
581	mmcbr_set_bus_width(dev, bus_width_1);
582	mmcbr_set_power_mode(dev, power_up);
583	mmcbr_set_clock(dev, 0);
584	mmcbr_update_ios(dev);
585	for (vccq = vccq_330; ; vccq--) {
586	mmcbr_set_vccq(dev, vccq);
587	if (mmcbr_switch_vccq(dev) == 0 \|\| vccq == vccq_120)
588	break;
589	}
590	mmc_ms_delay(1);
591
592	mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
593	mmcbr_set_timing(dev, bus_timing_normal);
594	mmcbr_set_power_mode(dev, power_on);
595	mmcbr_update_ios(dev);
596	mmc_ms_delay(2);
597	}
598
599	static void
600	mmc_power_down(struct mmc_softc *sc)
601	{
602	device_t dev = sc->dev;
603
604	mmcbr_set_bus_mode(dev, opendrain);
605	mmcbr_set_chip_select(dev, cs_dontcare);
606	mmcbr_set_bus_width(dev, bus_width_1);
607	mmcbr_set_power_mode(dev, power_off);
608	mmcbr_set_clock(dev, 0);
609	mmcbr_set_timing(dev, bus_timing_normal);
610	mmcbr_update_ios(dev);
611	}
612
613	static int
614	mmc_select_card(struct mmc_softc *sc, uint16_t rca)
615	{
616	int flags;
617
618	flags = (rca ? MMC_RSP_R1B : MMC_RSP_NONE) \| MMC_CMD_AC;
619	return (mmc_wait_for_command(sc, MMC_SELECT_CARD, (uint32_t)rca << 16,
620	flags, NULL, CMD_RETRIES));
621	}
622
623	static int
624	mmc_sd_switch(struct mmc_softc *sc, uint8_t mode, uint8_t grp, uint8_t value,
625	uint8_t *res)
626	{
627	int err;
628	struct mmc_command cmd;
629	struct mmc_data data;
630
631	memset(&cmd, 0, sizeof(cmd));
632	memset(&data, 0, sizeof(data));
633	memset(res, 0, 64);
634
635	cmd.opcode = SD_SWITCH_FUNC;
636	cmd.flags = MMC_RSP_R1 \| MMC_CMD_ADTC;
637	cmd.arg = mode << 31; /* 0 - check, 1 - set */
638	cmd.arg \|= 0x00FFFFFF;
639	cmd.arg &= ~(0xF << (grp * 4));
640	cmd.arg \|= value << (grp * 4);
641	cmd.data = &data;
642
643	data.data = res;
644	data.len = 64;
645	data.flags = MMC_DATA_READ;
646
647	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
648	return (err);
649	}
650
651	static int
652	mmc_set_card_bus_width(struct mmc_softc sc, struct mmc_ivars ivar)
653	{
654	struct mmc_command cmd;
655	int err;
656	uint8_t value;
657
658	if (mmcbr_get_mode(sc->dev) == mode_sd) {
659	memset(&cmd, 0, sizeof(cmd));
660	cmd.opcode = ACMD_SET_CLR_CARD_DETECT;
661	cmd.flags = MMC_RSP_R1 \| MMC_CMD_AC;
662	cmd.arg = SD_CLR_CARD_DETECT;
663	err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
664	CMD_RETRIES);
665	if (err != 0)
666	return (err);
667	memset(&cmd, 0, sizeof(cmd));
668	cmd.opcode = ACMD_SET_BUS_WIDTH;
669	cmd.flags = MMC_RSP_R1 \| MMC_CMD_AC;
670	switch (ivar->bus_width) {
671	case bus_width_1:
672	cmd.arg = SD_BUS_WIDTH_1;
673	break;
674	case bus_width_4:
675	cmd.arg = SD_BUS_WIDTH_4;
676	break;
677	default:
678	return (MMC_ERR_INVALID);
679	}
680	err = mmc_wait_for_app_cmd(sc->dev, sc->dev, ivar->rca, &cmd,
681	CMD_RETRIES);
682	} else {
683	switch (ivar->bus_width) {
684	case bus_width_1:
685	value = EXT_CSD_BUS_WIDTH_1;
686	break;
687	case bus_width_4:
688	switch (mmcbr_get_timing(sc->dev)) {
689	case bus_timing_mmc_ddr52:
690	case bus_timing_mmc_hs200:
691	case bus_timing_mmc_hs400:
692	case bus_timing_mmc_hs400es:
693	value = EXT_CSD_BUS_WIDTH_4_DDR;
694	break;
695	default:
696	value = EXT_CSD_BUS_WIDTH_4;
697	break;
698	}
699	break;
700	case bus_width_8:
701	switch (mmcbr_get_timing(sc->dev)) {
702	case bus_timing_mmc_ddr52:
703	case bus_timing_mmc_hs200:
704	case bus_timing_mmc_hs400:
705	case bus_timing_mmc_hs400es:
706	value = EXT_CSD_BUS_WIDTH_8_DDR;
707	break;
708	default:
709	value = EXT_CSD_BUS_WIDTH_8;
710	break;
711	}
712	break;
713	default:
714	return (MMC_ERR_INVALID);
715	}
716	err = mmc_switch(sc->dev, sc->dev, ivar->rca,
717	EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH, value,
718	ivar->cmd6_time, true);
719	}
720	return (err);
721	}
722
723	static int
724	mmc_set_power_class(struct mmc_softc sc, struct mmc_ivars ivar)
725	{
726	device_t dev;
727	const uint8_t *ext_csd;
728	uint32_t clock;
729	uint8_t value;
730
731	dev = sc->dev;
732	if (mmcbr_get_mode(dev) != mode_mmc \|\| ivar->csd.spec_vers < 4)
733	return (MMC_ERR_NONE);
734
735	value = 0;
736	ext_csd = ivar->raw_ext_csd;
737	clock = mmcbr_get_clock(dev);
738	switch (1 << mmcbr_get_vdd(dev)) {
739	case MMC_OCR_LOW_VOLTAGE:
740	if (clock <= MMC_TYPE_HS_26_MAX)
741	value = ext_csd[EXT_CSD_PWR_CL_26_195];
742	else if (clock <= MMC_TYPE_HS_52_MAX) {
743	if (mmcbr_get_timing(dev) >= bus_timing_mmc_ddr52 &&
744	ivar->bus_width >= bus_width_4)
745	value = ext_csd[EXT_CSD_PWR_CL_52_195_DDR];
746	else
747	value = ext_csd[EXT_CSD_PWR_CL_52_195];
748	} else if (clock <= MMC_TYPE_HS200_HS400ES_MAX)
749	value = ext_csd[EXT_CSD_PWR_CL_200_195];
750	break;
751	case MMC_OCR_270_280:
752	case MMC_OCR_280_290:
753	case MMC_OCR_290_300:
754	case MMC_OCR_300_310:
755	case MMC_OCR_310_320:
756	case MMC_OCR_320_330:
757	case MMC_OCR_330_340:
758	case MMC_OCR_340_350:
759	case MMC_OCR_350_360:
760	if (clock <= MMC_TYPE_HS_26_MAX)
761	value = ext_csd[EXT_CSD_PWR_CL_26_360];
762	else if (clock <= MMC_TYPE_HS_52_MAX) {
763	if (mmcbr_get_timing(dev) == bus_timing_mmc_ddr52 &&
764	ivar->bus_width >= bus_width_4)
765	value = ext_csd[EXT_CSD_PWR_CL_52_360_DDR];
766	else
767	value = ext_csd[EXT_CSD_PWR_CL_52_360];
768	} else if (clock <= MMC_TYPE_HS200_HS400ES_MAX) {
769	if (ivar->bus_width == bus_width_8)
770	value = ext_csd[EXT_CSD_PWR_CL_200_360_DDR];
771	else
772	value = ext_csd[EXT_CSD_PWR_CL_200_360];
773	}
774	break;
775	default:
776	device_printf(dev, "No power class support for VDD 0x%x\n",
777	1 << mmcbr_get_vdd(dev));
778	return (MMC_ERR_INVALID);
779	}
780
781	if (ivar->bus_width == bus_width_8)
782	value = (value & EXT_CSD_POWER_CLASS_8BIT_MASK) >>
783	EXT_CSD_POWER_CLASS_8BIT_SHIFT;
784	else
785	value = (value & EXT_CSD_POWER_CLASS_4BIT_MASK) >>
786	EXT_CSD_POWER_CLASS_4BIT_SHIFT;
787
788	if (value == 0)
789	return (MMC_ERR_NONE);
790
791	return (mmc_switch(dev, dev, ivar->rca, EXT_CSD_CMD_SET_NORMAL,
792	EXT_CSD_POWER_CLASS, value, ivar->cmd6_time, true));
793	}
794
795	static int
796	mmc_set_timing(struct mmc_softc sc, struct mmc_ivars ivar,
797	enum mmc_bus_timing timing)
798	{
799	u_char switch_res[64];
800	uint8_t value;
801	int err;
802
803	if (mmcbr_get_mode(sc->dev) == mode_sd) {
804	switch (timing) {
805	case bus_timing_normal:
806	value = SD_SWITCH_NORMAL_MODE;
807	break;
808	case bus_timing_hs:
809	value = SD_SWITCH_HS_MODE;
810	break;
811	default:
812	return (MMC_ERR_INVALID);
813	}
814	err = mmc_sd_switch(sc, SD_SWITCH_MODE_SET, SD_SWITCH_GROUP1,
815	value, switch_res);
816	if (err != MMC_ERR_NONE)
817	return (err);
818	if ((switch_res[16] & 0xf) != value)
819	return (MMC_ERR_FAILED);
820	mmcbr_set_timing(sc->dev, timing);
821	mmcbr_update_ios(sc->dev);
822	} else {
823	switch (timing) {
824	case bus_timing_normal:
825	value = EXT_CSD_HS_TIMING_BC;
826	break;
827	case bus_timing_hs:
828	case bus_timing_mmc_ddr52:
829	value = EXT_CSD_HS_TIMING_HS;
830	break;
831	default:
832	return (MMC_ERR_INVALID);
833	}
834	err = mmc_switch(sc->dev, sc->dev, ivar->rca,
835	EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, value,
836	ivar->cmd6_time, false);
837	if (err != MMC_ERR_NONE)
838	return (err);
839	mmcbr_set_timing(sc->dev, timing);
840	mmcbr_update_ios(sc->dev);
841	err = mmc_switch_status(sc->dev, sc->dev, ivar->rca,
842	ivar->cmd6_time);
843	}
844	return (err);
845	}
846
847	static const uint8_t p8[8] = {
848	0x55, 0xAA, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
849	};
850
851	static const uint8_t p8ok[8] = {
852	0xAA, 0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
853	};
854
855	static const uint8_t p4[4] = {
856	0x5A, 0x00, 0x00, 0x00
857	};
858
859	static const uint8_t p4ok[4] = {
860	0xA5, 0x00, 0x00, 0x00
861	};
862
863	static int
864	mmc_test_bus_width(struct mmc_softc *sc)
865	{
866	struct mmc_command cmd;
867	struct mmc_data data;
868	uint8_t buf[8];
869	int err;
870
871	if (mmcbr_get_caps(sc->dev) & MMC_CAP_8_BIT_DATA) {
872	mmcbr_set_bus_width(sc->dev, bus_width_8);
873	mmcbr_update_ios(sc->dev);
874
875	sc->squelched++; /* Errors are expected, squelch reporting. */
876	memset(&cmd, 0, sizeof(cmd));
877	memset(&data, 0, sizeof(data));
878	cmd.opcode = MMC_BUSTEST_W;
879	cmd.arg = 0;
880	cmd.flags = MMC_RSP_R1 \| MMC_CMD_ADTC;
881	cmd.data = &data;
882
883	data.data = __DECONST(void *, p8);
884	data.len = 8;
885	data.flags = MMC_DATA_WRITE;
886	mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
887
888	memset(&cmd, 0, sizeof(cmd));
889	memset(&data, 0, sizeof(data));
890	cmd.opcode = MMC_BUSTEST_R;
891	cmd.arg = 0;
892	cmd.flags = MMC_RSP_R1 \| MMC_CMD_ADTC;
893	cmd.data = &data;
894
895	data.data = buf;
896	data.len = 8;
897	data.flags = MMC_DATA_READ;
898	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
899	sc->squelched--;
900
901	mmcbr_set_bus_width(sc->dev, bus_width_1);
902	mmcbr_update_ios(sc->dev);
903
904	if (err == MMC_ERR_NONE && memcmp(buf, p8ok, 8) == 0)
905	return (bus_width_8);
906	}
907
908	if (mmcbr_get_caps(sc->dev) & MMC_CAP_4_BIT_DATA) {
909	mmcbr_set_bus_width(sc->dev, bus_width_4);
910	mmcbr_update_ios(sc->dev);
911
912	sc->squelched++; /* Errors are expected, squelch reporting. */
913	memset(&cmd, 0, sizeof(cmd));
914	memset(&data, 0, sizeof(data));
915	cmd.opcode = MMC_BUSTEST_W;
916	cmd.arg = 0;
917	cmd.flags = MMC_RSP_R1 \| MMC_CMD_ADTC;
918	cmd.data = &data;
919
920	data.data = __DECONST(void *, p4);
921	data.len = 4;
922	data.flags = MMC_DATA_WRITE;
923	mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
924
925	memset(&cmd, 0, sizeof(cmd));
926	memset(&data, 0, sizeof(data));
927	cmd.opcode = MMC_BUSTEST_R;
928	cmd.arg = 0;
929	cmd.flags = MMC_RSP_R1 \| MMC_CMD_ADTC;
930	cmd.data = &data;
931
932	data.data = buf;
933	data.len = 4;
934	data.flags = MMC_DATA_READ;
935	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, 0);
936	sc->squelched--;
937
938	mmcbr_set_bus_width(sc->dev, bus_width_1);
939	mmcbr_update_ios(sc->dev);
940
941	if (err == MMC_ERR_NONE && memcmp(buf, p4ok, 4) == 0)
942	return (bus_width_4);
943	}
944	return (bus_width_1);
945	}
946
947	static uint32_t
948	mmc_get_bits(uint32_t *bits, int bit_len, int start, int size)
949	{
950	const int i = (bit_len / 32) - (start / 32) - 1;
951	const int shift = start & 31;
952	uint32_t retval = bits[i] >> shift;
953
954	if (size + shift > 32)
955	retval \|= bits[i - 1] << (32 - shift);
956	return (retval & ((1llu << size) - 1));
957	}
958
959	static void
960	mmc_decode_cid_sd(uint32_t raw_cid, struct mmc_cid cid)
961	{
962	int i;
963
964	/* There's no version info, so we take it on faith */
965	memset(cid, 0, sizeof(*cid));
966	cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
967	cid->oid = mmc_get_bits(raw_cid, 128, 104, 16);
968	for (i = 0; i < 5; i++)
969	cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
970	cid->pnm[5] = 0;
971	cid->prv = mmc_get_bits(raw_cid, 128, 56, 8);
972	cid->psn = mmc_get_bits(raw_cid, 128, 24, 32);
973	cid->mdt_year = mmc_get_bits(raw_cid, 128, 12, 8) + 2000;
974	cid->mdt_month = mmc_get_bits(raw_cid, 128, 8, 4);
975	}
976
977	static void
978	mmc_decode_cid_mmc(uint32_t raw_cid, struct mmc_cid cid, bool is_4_41p)
979	{
980	int i;
981
982	/* There's no version info, so we take it on faith */
983	memset(cid, 0, sizeof(*cid));
984	cid->mid = mmc_get_bits(raw_cid, 128, 120, 8);
985	cid->oid = mmc_get_bits(raw_cid, 128, 104, 8);
986	for (i = 0; i < 6; i++)
987	cid->pnm[i] = mmc_get_bits(raw_cid, 128, 96 - i * 8, 8);
988	cid->pnm[6] = 0;
989	cid->prv = mmc_get_bits(raw_cid, 128, 48, 8);
990	cid->psn = mmc_get_bits(raw_cid, 128, 16, 32);
991	cid->mdt_month = mmc_get_bits(raw_cid, 128, 12, 4);
992	cid->mdt_year = mmc_get_bits(raw_cid, 128, 8, 4);
993	if (is_4_41p)
994	cid->mdt_year += 2013;
995	else
996	cid->mdt_year += 1997;
997	}
998
999	static void
1000	mmc_format_card_id_string(struct mmc_ivars *ivar)
1001	{
1002	char oidstr[8];
1003	uint8_t c1;
1004	uint8_t c2;
1005
1006	/*
1007	* Format a card ID string for use by the mmcsd driver, it's what
1008	* appears between the <> in the following:
1009	* mmcsd0: 968MB <SD SD01G 8.0 SN 2686905 Mfg 08/2008 by 3 TN> at mmc0
1010	* 22.5MHz/4bit/128-block
1011	*
1012	* Also format just the card serial number, which the mmcsd driver will
1013	* use as the disk->d_ident string.
1014	*
1015	* The card_id_string in mmc_ivars is currently allocated as 64 bytes,
1016	* and our max formatted length is currently 55 bytes if every field
1017	* contains the largest value.
1018	*
1019	* Sometimes the oid is two printable ascii chars; when it's not,
1020	* format it as 0xnnnn instead.
1021	*/
1022	c1 = (ivar->cid.oid >> 8) & 0x0ff;
1023	c2 = ivar->cid.oid & 0x0ff;
1024	if (c1 > 0x1f && c1 < 0x7f && c2 > 0x1f && c2 < 0x7f)
1025	snprintf(oidstr, sizeof(oidstr), "%c%c", c1, c2);
1026	else
1027	snprintf(oidstr, sizeof(oidstr), "0x%04x", ivar->cid.oid);
1028	snprintf(ivar->card_sn_string, sizeof(ivar->card_sn_string),
1029	"%08X", ivar->cid.psn);
1030	snprintf(ivar->card_id_string, sizeof(ivar->card_id_string),
1031	"%s%s %s %d.%d SN %08X MFG %02d/%04d by %d %s",
1032	ivar->mode == mode_sd ? "SD" : "MMC", ivar->high_cap ? "HC" : "",
1033	ivar->cid.pnm, ivar->cid.prv >> 4, ivar->cid.prv & 0x0f,
1034	ivar->cid.psn, ivar->cid.mdt_month, ivar->cid.mdt_year,
1035	ivar->cid.mid, oidstr);
1036	}
1037
1038	static const int exp[8] = {
1039	1, 10, 100, 1000, 10000, 100000, 1000000, 10000000
1040	};
1041
1042	static const int mant[16] = {
1043	0, 10, 12, 13, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 70, 80
1044	};
1045
1046	static const int cur_min[8] = {
1047	500, 1000, 5000, 10000, 25000, 35000, 60000, 100000
1048	};
1049
1050	static const int cur_max[8] = {
1051	1000, 5000, 10000, 25000, 35000, 45000, 800000, 200000
1052	};
1053
1054	static void
1055	mmc_decode_csd_sd(uint32_t raw_csd, struct mmc_csd csd)
1056	{
1057	int v;
1058	int m;
1059	int e;
1060
1061	memset(csd, 0, sizeof(*csd));
1062	csd->csd_structure = v = mmc_get_bits(raw_csd, 128, 126, 2);
1063	if (v == 0) {
1064	m = mmc_get_bits(raw_csd, 128, 115, 4);
1065	e = mmc_get_bits(raw_csd, 128, 112, 3);
1066	csd->tacc = (exp[e] * mant[m] + 9) / 10;
1067	csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1068	m = mmc_get_bits(raw_csd, 128, 99, 4);
1069	e = mmc_get_bits(raw_csd, 128, 96, 3);
1070	csd->tran_speed = exp[e] * 10000 * mant[m];
1071	csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1072	csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1073	csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1074	csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1075	csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1076	csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1077	csd->vdd_r_curr_min =
1078	cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1079	csd->vdd_r_curr_max =
1080	cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1081	csd->vdd_w_curr_min =
1082	cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1083	csd->vdd_w_curr_max =
1084	cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1085	m = mmc_get_bits(raw_csd, 128, 62, 12);
1086	e = mmc_get_bits(raw_csd, 128, 47, 3);
1087	csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1088	csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1089	csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1090	csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1091	csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1092	csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1093	csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1094	csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1095	} else if (v == 1) {
1096	m = mmc_get_bits(raw_csd, 128, 115, 4);
1097	e = mmc_get_bits(raw_csd, 128, 112, 3);
1098	csd->tacc = (exp[e] * mant[m] + 9) / 10;
1099	csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1100	m = mmc_get_bits(raw_csd, 128, 99, 4);
1101	e = mmc_get_bits(raw_csd, 128, 96, 3);
1102	csd->tran_speed = exp[e] * 10000 * mant[m];
1103	csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1104	csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1105	csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1106	csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1107	csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1108	csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1109	csd->capacity = ((uint64_t)mmc_get_bits(raw_csd, 128, 48, 22) +
1110	1) * 512 * 1024;
1111	csd->erase_blk_en = mmc_get_bits(raw_csd, 128, 46, 1);
1112	csd->erase_sector = mmc_get_bits(raw_csd, 128, 39, 7) + 1;
1113	csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 7);
1114	csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1115	csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1116	csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1117	csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1118	} else
1119	panic("unknown SD CSD version");
1120	}
1121
1122	static void
1123	mmc_decode_csd_mmc(uint32_t raw_csd, struct mmc_csd csd)
1124	{
1125	int m;
1126	int e;
1127
1128	memset(csd, 0, sizeof(*csd));
1129	csd->csd_structure = mmc_get_bits(raw_csd, 128, 126, 2);
1130	csd->spec_vers = mmc_get_bits(raw_csd, 128, 122, 4);
1131	m = mmc_get_bits(raw_csd, 128, 115, 4);
1132	e = mmc_get_bits(raw_csd, 128, 112, 3);
1133	csd->tacc = exp[e] * mant[m] + 9 / 10;
1134	csd->nsac = mmc_get_bits(raw_csd, 128, 104, 8) * 100;
1135	m = mmc_get_bits(raw_csd, 128, 99, 4);
1136	e = mmc_get_bits(raw_csd, 128, 96, 3);
1137	csd->tran_speed = exp[e] * 10000 * mant[m];
1138	csd->ccc = mmc_get_bits(raw_csd, 128, 84, 12);
1139	csd->read_bl_len = 1 << mmc_get_bits(raw_csd, 128, 80, 4);
1140	csd->read_bl_partial = mmc_get_bits(raw_csd, 128, 79, 1);
1141	csd->write_blk_misalign = mmc_get_bits(raw_csd, 128, 78, 1);
1142	csd->read_blk_misalign = mmc_get_bits(raw_csd, 128, 77, 1);
1143	csd->dsr_imp = mmc_get_bits(raw_csd, 128, 76, 1);
1144	csd->vdd_r_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 59, 3)];
1145	csd->vdd_r_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 56, 3)];
1146	csd->vdd_w_curr_min = cur_min[mmc_get_bits(raw_csd, 128, 53, 3)];
1147	csd->vdd_w_curr_max = cur_max[mmc_get_bits(raw_csd, 128, 50, 3)];
1148	m = mmc_get_bits(raw_csd, 128, 62, 12);
1149	e = mmc_get_bits(raw_csd, 128, 47, 3);
1150	csd->capacity = ((1 + m) << (e + 2)) * csd->read_bl_len;
1151	csd->erase_blk_en = 0;
1152	csd->erase_sector = (mmc_get_bits(raw_csd, 128, 42, 5) + 1) *
1153	(mmc_get_bits(raw_csd, 128, 37, 5) + 1);
1154	csd->wp_grp_size = mmc_get_bits(raw_csd, 128, 32, 5);
1155	csd->wp_grp_enable = mmc_get_bits(raw_csd, 128, 31, 1);
1156	csd->r2w_factor = 1 << mmc_get_bits(raw_csd, 128, 26, 3);
1157	csd->write_bl_len = 1 << mmc_get_bits(raw_csd, 128, 22, 4);
1158	csd->write_bl_partial = mmc_get_bits(raw_csd, 128, 21, 1);
1159	}
1160
1161	static void
1162	mmc_app_decode_scr(uint32_t raw_scr, struct mmc_scr scr)
1163	{
1164	unsigned int scr_struct;
1165
1166	memset(scr, 0, sizeof(*scr));
1167
1168	scr_struct = mmc_get_bits(raw_scr, 64, 60, 4);
1169	if (scr_struct != 0) {
1170	printf("Unrecognised SCR structure version %d\n",
1171	scr_struct);
1172	return;
1173	}
1174	scr->sda_vsn = mmc_get_bits(raw_scr, 64, 56, 4);
1175	scr->bus_widths = mmc_get_bits(raw_scr, 64, 48, 4);
1176	}
1177
1178	static void
1179	mmc_app_decode_sd_status(uint32_t *raw_sd_status,
1180	struct mmc_sd_status *sd_status)
1181	{
1182
1183	memset(sd_status, 0, sizeof(*sd_status));
1184
1185	sd_status->bus_width = mmc_get_bits(raw_sd_status, 512, 510, 2);
1186	sd_status->secured_mode = mmc_get_bits(raw_sd_status, 512, 509, 1);
1187	sd_status->card_type = mmc_get_bits(raw_sd_status, 512, 480, 16);
1188	sd_status->prot_area = mmc_get_bits(raw_sd_status, 512, 448, 12);
1189	sd_status->speed_class = mmc_get_bits(raw_sd_status, 512, 440, 8);
1190	sd_status->perf_move = mmc_get_bits(raw_sd_status, 512, 432, 8);
1191	sd_status->au_size = mmc_get_bits(raw_sd_status, 512, 428, 4);
1192	sd_status->erase_size = mmc_get_bits(raw_sd_status, 512, 408, 16);
1193	sd_status->erase_timeout = mmc_get_bits(raw_sd_status, 512, 402, 6);
1194	sd_status->erase_offset = mmc_get_bits(raw_sd_status, 512, 400, 2);
1195	}
1196
1197	static int
1198	mmc_all_send_cid(struct mmc_softc sc, uint32_t rawcid)
1199	{
1200	struct mmc_command cmd;
1201	int err;
1202
1203	memset(&cmd, 0, sizeof(cmd));
1204	cmd.opcode = MMC_ALL_SEND_CID;
1205	cmd.arg = 0;
1206	cmd.flags = MMC_RSP_R2 \| MMC_CMD_BCR;
1207	cmd.data = NULL;
1208	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1209	memcpy(rawcid, cmd.resp, 4 * sizeof(uint32_t));
1210	return (err);
1211	}
1212
1213	static int
1214	mmc_send_csd(struct mmc_softc sc, uint16_t rca, uint32_t rawcsd)
1215	{
1216	struct mmc_command cmd;
1217	int err;
1218
1219	memset(&cmd, 0, sizeof(cmd));
1220	cmd.opcode = MMC_SEND_CSD;
1221	cmd.arg = rca << 16;
1222	cmd.flags = MMC_RSP_R2 \| MMC_CMD_BCR;
1223	cmd.data = NULL;
1224	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1225	memcpy(rawcsd, cmd.resp, 4 * sizeof(uint32_t));
1226	return (err);
1227	}
1228
1229	static int
1230	mmc_app_send_scr(struct mmc_softc sc, uint16_t rca, uint32_t rawscr)
1231	{
1232	int err;
1233	struct mmc_command cmd;
1234	struct mmc_data data;
1235
1236	memset(&cmd, 0, sizeof(cmd));
1237	memset(&data, 0, sizeof(data));
1238
1239	memset(rawscr, 0, 8);
1240	cmd.opcode = ACMD_SEND_SCR;
1241	cmd.flags = MMC_RSP_R1 \| MMC_CMD_ADTC;
1242	cmd.arg = 0;
1243	cmd.data = &data;
1244
1245	data.data = rawscr;
1246	data.len = 8;
1247	data.flags = MMC_DATA_READ;
1248
1249	err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1250	rawscr[0] = be32toh(rawscr[0]);
1251	rawscr[1] = be32toh(rawscr[1]);
1252	return (err);
1253	}
1254
1255	static int
1256	mmc_app_sd_status(struct mmc_softc sc, uint16_t rca, uint32_t rawsdstatus)
1257	{
1258	struct mmc_command cmd;
1259	struct mmc_data data;
1260	int err, i;
1261
1262	memset(&cmd, 0, sizeof(cmd));
1263	memset(&data, 0, sizeof(data));
1264
1265	memset(rawsdstatus, 0, 64);
1266	cmd.opcode = ACMD_SD_STATUS;
1267	cmd.flags = MMC_RSP_R1 \| MMC_CMD_ADTC;
1268	cmd.arg = 0;
1269	cmd.data = &data;
1270
1271	data.data = rawsdstatus;
1272	data.len = 64;
1273	data.flags = MMC_DATA_READ;
1274
1275	err = mmc_wait_for_app_cmd(sc->dev, sc->dev, rca, &cmd, CMD_RETRIES);
1276	for (i = 0; i < 16; i++)
1277	rawsdstatus[i] = be32toh(rawsdstatus[i]);
1278	return (err);
1279	}
1280
1281	static int
1282	mmc_set_relative_addr(struct mmc_softc *sc, uint16_t resp)
1283	{
1284	struct mmc_command cmd;
1285	int err;
1286
1287	memset(&cmd, 0, sizeof(cmd));
1288	cmd.opcode = MMC_SET_RELATIVE_ADDR;
1289	cmd.arg = resp << 16;
1290	cmd.flags = MMC_RSP_R6 \| MMC_CMD_BCR;
1291	cmd.data = NULL;
1292	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1293	return (err);
1294	}
1295
1296	static int
1297	mmc_send_relative_addr(struct mmc_softc sc, uint32_t resp)
1298	{
1299	struct mmc_command cmd;
1300	int err;
1301
1302	memset(&cmd, 0, sizeof(cmd));
1303	cmd.opcode = SD_SEND_RELATIVE_ADDR;
1304	cmd.arg = 0;
1305	cmd.flags = MMC_RSP_R6 \| MMC_CMD_BCR;
1306	cmd.data = NULL;
1307	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1308	*resp = cmd.resp[0];
1309	return (err);
1310	}
1311
1312	static int
1313	mmc_set_blocklen(struct mmc_softc *sc, uint32_t len)
1314	{
1315	struct mmc_command cmd;
1316	int err;
1317
1318	memset(&cmd, 0, sizeof(cmd));
1319	cmd.opcode = MMC_SET_BLOCKLEN;
1320	cmd.arg = len;
1321	cmd.flags = MMC_RSP_R1 \| MMC_CMD_AC;
1322	cmd.data = NULL;
1323	err = mmc_wait_for_cmd(sc->dev, sc->dev, &cmd, CMD_RETRIES);
1324	return (err);
1325	}
1326
1327	static uint32_t
1328	mmc_timing_to_dtr(struct mmc_ivars *ivar, enum mmc_bus_timing timing)
1329	{
1330
1331	switch (timing) {
1332	case bus_timing_normal:
1333	return (ivar->tran_speed);
1334	case bus_timing_hs:
1335	return (ivar->hs_tran_speed);
1336	case bus_timing_uhs_sdr12:
1337	return (SD_SDR12_MAX);
1338	case bus_timing_uhs_sdr25:
1339	return (SD_SDR25_MAX);
1340	case bus_timing_uhs_ddr50:
1341	return (SD_DDR50_MAX);
1342	case bus_timing_uhs_sdr50:
1343	return (SD_SDR50_MAX);
1344	case bus_timing_uhs_sdr104:
1345	return (SD_SDR104_MAX);
1346	case bus_timing_mmc_ddr52:
1347	return (MMC_TYPE_DDR52_MAX);
1348	case bus_timing_mmc_hs200:
1349	case bus_timing_mmc_hs400:
1350	case bus_timing_mmc_hs400es:
1351	return (MMC_TYPE_HS200_HS400ES_MAX);
1352	}
1353	return (0);
1354	}
1355
1356	static const char *
1357	mmc_timing_to_string(enum mmc_bus_timing timing)
1358	{
1359
1360	switch (timing) {
1361	case bus_timing_normal:
1362	return ("normal speed");
1363	case bus_timing_hs:
1364	return ("high speed");
1365	case bus_timing_uhs_sdr12:
1366	case bus_timing_uhs_sdr25:
1367	case bus_timing_uhs_sdr50:
1368	case bus_timing_uhs_sdr104:
1369	return ("single data rate");
1370	case bus_timing_uhs_ddr50:
1371	case bus_timing_mmc_ddr52:
1372	return ("dual data rate");
1373	case bus_timing_mmc_hs200:
1374	return ("HS200");
1375	case bus_timing_mmc_hs400:
1376	return ("HS400");
1377	case bus_timing_mmc_hs400es:
1378	return ("HS400 with enhanced strobe");
1379	}
1380	return ("");
1381	}
1382
1383	static void
1384	mmc_log_card(device_t dev, struct mmc_ivars *ivar, int newcard)
1385	{
1386	enum mmc_bus_timing max_timing, timing;
1387
1388	device_printf(dev, "Card at relative address 0x%04x%s:\n",
1389	ivar->rca, newcard ? " added" : "");
1390	device_printf(dev, " card: %s\n", ivar->card_id_string);
1391	max_timing = bus_timing_normal;
1392	for (timing = bus_timing_max; timing > bus_timing_normal; timing--) {
1393	if (isset(&ivar->timings, timing)) {
1394	max_timing = timing;
1395	break;
1396	}
1397	}
1398	device_printf(dev, " bus: %ubit, %uMHz (%s timing)\n",
1399	(ivar->bus_width == bus_width_1 ? 1 :
1400	(ivar->bus_width == bus_width_4 ? 4 : 8)),
1401	mmc_timing_to_dtr(ivar, timing) / 1000000,
1402	mmc_timing_to_string(timing));
1403	device_printf(dev, " memory: %u blocks, erase sector %u blocks%s\n",
1404	ivar->sec_count, ivar->erase_sector,
1405	ivar->read_only ? ", read-only" : "");
1406	}
1407
1408	static void
1409	mmc_discover_cards(struct mmc_softc *sc)
1410	{
1411	u_char switch_res[64];
1412	uint32_t raw_cid[4];
1413	struct mmc_ivars *ivar = NULL;
1414	device_t *devlist;
1415	device_t child;
1416	int devcount, err, host_caps, i, newcard;
1417	uint32_t resp, sec_count, status;
1418	uint16_t rca = 2;
1419
1420	host_caps = mmcbr_get_caps(sc->dev);
1421	if (bootverbose \|\| mmc_debug)
1422	device_printf(sc->dev, "Probing cards\n");
1423	while (1) {
1424	sc->squelched++; /* Errors are expected, squelch reporting. */
1425	err = mmc_all_send_cid(sc, raw_cid);
1426	sc->squelched--;
1427	if (err == MMC_ERR_TIMEOUT)
1428	break;
1429	if (err != MMC_ERR_NONE) {
1430	device_printf(sc->dev, "Error reading CID %d\n", err);
1431	break;
1432	}
1433	newcard = 1;
1434	if ((err = device_get_children(sc->dev, &devlist,
1435	&devcount)) != 0)
1436	return;
1437	for (i = 0; i < devcount; i++) {
1438	ivar = device_get_ivars(devlist[i]);
1439	if (memcmp(ivar->raw_cid, raw_cid, sizeof(raw_cid)) ==
1440	0) {
1441	newcard = 0;
1442	break;
1443	}
1444	}
1445	free(devlist, M_TEMP);
1446	if (bootverbose \|\| mmc_debug) {
1447	device_printf(sc->dev,
1448	"%sard detected (CID %08x%08x%08x%08x)\n",
1449	newcard ? "New c" : "C",
1450	raw_cid[0], raw_cid[1], raw_cid[2], raw_cid[3]);
1451	}
1452	if (newcard) {
1453	ivar = malloc(sizeof(struct mmc_ivars), M_DEVBUF,
1454	M_WAITOK \| M_ZERO);
1455	memcpy(ivar->raw_cid, raw_cid, sizeof(raw_cid));
1456	}
1457	if (mmcbr_get_ro(sc->dev))
1458	ivar->read_only = 1;
1459	ivar->bus_width = bus_width_1;
1460	setbit(&ivar->timings, bus_timing_normal);
1461	ivar->mode = mmcbr_get_mode(sc->dev);
1462	if (ivar->mode == mode_sd) {
1463	mmc_decode_cid_sd(ivar->raw_cid, &ivar->cid);
1464	err = mmc_send_relative_addr(sc, &resp);
1465	if (err != MMC_ERR_NONE) {
1466	device_printf(sc->dev,
1467	"Error getting RCA %d\n", err);
1468	break;
1469	}
1470	ivar->rca = resp >> 16;
1471	/* Get card CSD. */
1472	err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1473	if (err != MMC_ERR_NONE) {
1474	device_printf(sc->dev,
1475	"Error getting CSD %d\n", err);
1476	break;
1477	}
1478	if (bootverbose \|\| mmc_debug)
1479	device_printf(sc->dev,
1480	"%sard detected (CSD %08x%08x%08x%08x)\n",
1481	newcard ? "New c" : "C", ivar->raw_csd[0],
1482	ivar->raw_csd[1], ivar->raw_csd[2],
1483	ivar->raw_csd[3]);
1484	mmc_decode_csd_sd(ivar->raw_csd, &ivar->csd);
1485	ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1486	if (ivar->csd.csd_structure > 0)
1487	ivar->high_cap = 1;
1488	ivar->tran_speed = ivar->csd.tran_speed;
1489	ivar->erase_sector = ivar->csd.erase_sector *
1490	ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1491
1492	err = mmc_send_status(sc->dev, sc->dev, ivar->rca,
1493	&status);
1494	if (err != MMC_ERR_NONE) {
1495	device_printf(sc->dev,
1496	"Error reading card status %d\n", err);
1497	break;
1498	}
1499	if ((status & R1_CARD_IS_LOCKED) != 0) {
1500	device_printf(sc->dev,
1501	"Card is password protected, skipping.\n");
1502	break;
1503	}
1504
1505	/* Get card SCR. Card must be selected to fetch it. */
1506	err = mmc_select_card(sc, ivar->rca);
1507	if (err != MMC_ERR_NONE) {
1508	device_printf(sc->dev,
1509	"Error selecting card %d\n", err);
1510	break;
1511	}
1512	err = mmc_app_send_scr(sc, ivar->rca, ivar->raw_scr);
1513	if (err != MMC_ERR_NONE) {
1514	device_printf(sc->dev,
1515	"Error reading SCR %d\n", err);
1516	break;
1517	}
1518	mmc_app_decode_scr(ivar->raw_scr, &ivar->scr);
1519	/* Get card switch capabilities (command class 10). */
1520	if ((ivar->scr.sda_vsn >= 1) &&
1521	(ivar->csd.ccc & (1 << 10))) {
1522	err = mmc_sd_switch(sc, SD_SWITCH_MODE_CHECK,
1523	SD_SWITCH_GROUP1, SD_SWITCH_NOCHANGE,
1524	switch_res);
1525	if (err == MMC_ERR_NONE &&
1526	switch_res[13] & (1 << SD_SWITCH_HS_MODE)) {
1527	setbit(&ivar->timings, bus_timing_hs);
1528	ivar->hs_tran_speed = SD_HS_MAX;
1529	}
1530	}
1531
1532	/*
1533	* We deselect then reselect the card here. Some cards
1534	* become unselected and timeout with the above two
1535	* commands, although the state tables / diagrams in the
1536	* standard suggest they go back to the transfer state.
1537	* Other cards don't become deselected, and if we
1538	* attempt to blindly re-select them, we get timeout
1539	* errors from some controllers. So we deselect then
1540	* reselect to handle all situations. The only thing we
1541	* use from the sd_status is the erase sector size, but
1542	* it is still nice to get that right.
1543	*/
1544	mmc_select_card(sc, 0);
1545	(void)mmc_select_card(sc, ivar->rca);
1546	(void)mmc_app_sd_status(sc, ivar->rca,
1547	ivar->raw_sd_status);
1548	mmc_app_decode_sd_status(ivar->raw_sd_status,
1549	&ivar->sd_status);
1550	if (ivar->sd_status.au_size != 0) {
1551	ivar->erase_sector =
1552	16 << ivar->sd_status.au_size;
1553	}
1554	/* Find max supported bus width. */
1555	if ((host_caps & MMC_CAP_4_BIT_DATA) &&
1556	(ivar->scr.bus_widths & SD_SCR_BUS_WIDTH_4))
1557	ivar->bus_width = bus_width_4;
1558
1559	/*
1560	* Some cards that report maximum I/O block sizes
1561	* greater than 512 require the block length to be
1562	* set to 512, even though that is supposed to be
1563	* the default. Example:
1564	*
1565	* Transcend 2GB SDSC card, CID:
1566	* mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000
1567	*/
1568	if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE \|\|
1569	ivar->csd.write_bl_len != MMC_SECTOR_SIZE)
1570	mmc_set_blocklen(sc, MMC_SECTOR_SIZE);
1571
1572	mmc_format_card_id_string(ivar);
1573
1574	if (bootverbose \|\| mmc_debug)
1575	mmc_log_card(sc->dev, ivar, newcard);
1576	if (newcard) {
1577	/* Add device. */
1578	child = device_add_child(sc->dev, NULL, -1);
1579	device_set_ivars(child, ivar);
1580	}
1581	mmc_select_card(sc, 0);
1582	return;
1583	}
1584	ivar->rca = rca++;
1585	err = mmc_set_relative_addr(sc, ivar->rca);
1586	if (err != MMC_ERR_NONE) {
1587	device_printf(sc->dev, "Error setting RCA %d\n", err);
1588	break;
1589	}
1590	/* Get card CSD. */
1591	err = mmc_send_csd(sc, ivar->rca, ivar->raw_csd);
1592	if (err != MMC_ERR_NONE) {
1593	device_printf(sc->dev, "Error getting CSD %d\n", err);
1594	break;
1595	}
1596	if (bootverbose \|\| mmc_debug)
1597	device_printf(sc->dev,
1598	"%sard detected (CSD %08x%08x%08x%08x)\n",
1599	newcard ? "New c" : "C", ivar->raw_csd[0],
1600	ivar->raw_csd[1], ivar->raw_csd[2],
1601	ivar->raw_csd[3]);
1602
1603	mmc_decode_csd_mmc(ivar->raw_csd, &ivar->csd);
1604	ivar->sec_count = ivar->csd.capacity / MMC_SECTOR_SIZE;
1605	ivar->tran_speed = ivar->csd.tran_speed;
1606	ivar->erase_sector = ivar->csd.erase_sector *
1607	ivar->csd.write_bl_len / MMC_SECTOR_SIZE;
1608
1609	err = mmc_send_status(sc->dev, sc->dev, ivar->rca, &status);
1610	if (err != MMC_ERR_NONE) {
1611	device_printf(sc->dev,
1612	"Error reading card status %d\n", err);
1613	break;
1614	}
1615	if ((status & R1_CARD_IS_LOCKED) != 0) {
1616	device_printf(sc->dev,
1617	"Card is password protected, skipping.\n");
1618	break;
1619	}
1620
1621	err = mmc_select_card(sc, ivar->rca);
1622	if (err != MMC_ERR_NONE) {
1623	device_printf(sc->dev, "Error selecting card %d\n",
1624	err);
1625	break;
1626	}
1627
1628	/* Only MMC >= 4.x devices support EXT_CSD. */
1629	if (ivar->csd.spec_vers >= 4) {
1630	err = mmc_send_ext_csd(sc->dev, sc->dev,
1631	ivar->raw_ext_csd);
1632	if (err != MMC_ERR_NONE) {
1633	device_printf(sc->dev,
1634	"Error reading EXT_CSD %d\n", err);
1635	break;
1636	}
1637	/* Handle extended capacity from EXT_CSD */
1638	sec_count = ivar->raw_ext_csd[EXT_CSD_SEC_CNT] +
1639	(ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 1] << 8) +
1640	(ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 2] << 16) +
1641	(ivar->raw_ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1642	if (sec_count != 0) {
1643	ivar->sec_count = sec_count;
1644	ivar->high_cap = 1;
1645	}
1646	/* Get device speeds beyond normal mode. */
1647	if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] &
1648	EXT_CSD_CARD_TYPE_HS_52) != 0) {
1649	setbit(&ivar->timings, bus_timing_hs);
1650	ivar->hs_tran_speed = MMC_TYPE_HS_52_MAX;
1651	} else if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] &
1652	EXT_CSD_CARD_TYPE_HS_26) != 0) {
1653	setbit(&ivar->timings, bus_timing_hs);
1654	ivar->hs_tran_speed = MMC_TYPE_HS_26_MAX;
1655	}
1656	if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] &
1657	EXT_CSD_CARD_TYPE_DDR_52_1_2V) != 0 &&
1658	(host_caps & MMC_CAP_SIGNALING_120) != 0) {
1659	setbit(&ivar->timings, bus_timing_mmc_ddr52);
1660	setbit(&ivar->vccq_120, bus_timing_mmc_ddr52);
1661	}
1662	if ((ivar->raw_ext_csd[EXT_CSD_CARD_TYPE] &
1663	EXT_CSD_CARD_TYPE_DDR_52_1_8V) != 0 &&
1664	(host_caps & MMC_CAP_SIGNALING_180) != 0) {
1665	setbit(&ivar->timings, bus_timing_mmc_ddr52);
1666	setbit(&ivar->vccq_180, bus_timing_mmc_ddr52);
1667	}
1668	/*
1669	* Determine generic switch timeout (provided in
1670	* units of 10 ms), defaulting to 500 ms.
1671	*/
1672	ivar->cmd6_time = 500 * 1000;
1673	if (ivar->csd.spec_vers >= 6)
1674	ivar->cmd6_time = 10 *
1675	ivar->raw_ext_csd[EXT_CSD_GEN_CMD6_TIME];
1676	/* Find max supported bus width. */
1677	ivar->bus_width = mmc_test_bus_width(sc);
1678	/* Handle HC erase sector size. */
1679	if (ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE] != 0) {
1680	ivar->erase_sector = 1024 *
1681	ivar->raw_ext_csd[EXT_CSD_ERASE_GRP_SIZE];
1682	err = mmc_switch(sc->dev, sc->dev, ivar->rca,
1683	EXT_CSD_CMD_SET_NORMAL,
1684	EXT_CSD_ERASE_GRP_DEF,
1685	EXT_CSD_ERASE_GRP_DEF_EN,
1686	ivar->cmd6_time, true);
1687	if (err != MMC_ERR_NONE) {
1688	device_printf(sc->dev,
1689	"Error setting erase group %d\n",
1690	err);
1691	break;
1692	}
1693	}
1694	}
1695
1696	/*
1697	* Some cards that report maximum I/O block sizes greater
1698	* than 512 require the block length to be set to 512, even
1699	* though that is supposed to be the default. Example:
1700	*
1701	* Transcend 2GB SDSC card, CID:
1702	* mid=0x1b oid=0x534d pnm="00000" prv=1.0 mdt=00.2000
1703	*/
1704	if (ivar->csd.read_bl_len != MMC_SECTOR_SIZE \|\|
1705	ivar->csd.write_bl_len != MMC_SECTOR_SIZE)
1706	mmc_set_blocklen(sc, MMC_SECTOR_SIZE);
1707
1708	mmc_decode_cid_mmc(ivar->raw_cid, &ivar->cid,
1709	ivar->raw_ext_csd[EXT_CSD_REV] >= 5);
1710	mmc_format_card_id_string(ivar);
1711
1712	if (bootverbose \|\| mmc_debug)
1713	mmc_log_card(sc->dev, ivar, newcard);
1714	if (newcard) {
1715	/* Add device. */
1716	child = device_add_child(sc->dev, NULL, -1);
1717	device_set_ivars(child, ivar);
1718	}
1719	mmc_select_card(sc, 0);
1720	}
1721	}
1722
1723	static void
1724	mmc_rescan_cards(struct mmc_softc *sc)
1725	{
1726	struct mmc_ivars *ivar;
1727	device_t *devlist;
1728	int err, i, devcount;
1729
1730	if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1731	return;
1732	for (i = 0; i < devcount; i++) {
1733	ivar = device_get_ivars(devlist[i]);
1734	if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE) {
1735	if (bootverbose \|\| mmc_debug)
1736	device_printf(sc->dev,
1737	"Card at relative address %d lost.\n",
1738	ivar->rca);
1739	device_delete_child(sc->dev, devlist[i]);
1740	free(ivar, M_DEVBUF);
1741	}
1742	}
1743	free(devlist, M_TEMP);
1744	mmc_select_card(sc, 0);
1745	}
1746
1747	static int
1748	mmc_delete_cards(struct mmc_softc *sc)
1749	{
1750	struct mmc_ivars *ivar;
1751	device_t *devlist;
1752	int err, i, devcount;
1753
1754	if ((err = device_get_children(sc->dev, &devlist, &devcount)) != 0)
1755	return (err);
1756	for (i = 0; i < devcount; i++) {
1757	ivar = device_get_ivars(devlist[i]);
1758	if (bootverbose \|\| mmc_debug)
1759	device_printf(sc->dev,
1760	"Card at relative address %d deleted.\n",
1761	ivar->rca);
1762	device_delete_child(sc->dev, devlist[i]);
1763	free(ivar, M_DEVBUF);
1764	}
1765	free(devlist, M_TEMP);
1766	return (0);
1767	}
1768
1769	static void
1770	mmc_go_discovery(struct mmc_softc *sc)
1771	{
1772	uint32_t ocr;
1773	device_t dev;
1774	int err;
1775
1776	dev = sc->dev;
1777	if (mmcbr_get_power_mode(dev) != power_on) {
1778	/*
1779	* First, try SD modes
1780	*/
1781	sc->squelched++; /* Errors are expected, squelch reporting. */
1782	mmcbr_set_mode(dev, mode_sd);
1783	mmc_power_up(sc);
1784	mmcbr_set_bus_mode(dev, pushpull);
1785	if (bootverbose \|\| mmc_debug)
1786	device_printf(sc->dev, "Probing bus\n");
1787	mmc_idle_cards(sc);
1788	err = mmc_send_if_cond(sc, 1);
1789	if ((bootverbose \|\| mmc_debug) && err == 0)
1790	device_printf(sc->dev,
1791	"SD 2.0 interface conditions: OK\n");
1792	if (mmc_send_app_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
1793	if (bootverbose \|\| mmc_debug)
1794	device_printf(sc->dev, "SD probe: failed\n");
1795	/*
1796	* Failed, try MMC
1797	*/
1798	mmcbr_set_mode(dev, mode_mmc);
1799	if (mmc_send_op_cond(sc, 0, &ocr) != MMC_ERR_NONE) {
1800	if (bootverbose \|\| mmc_debug)
1801	device_printf(sc->dev,
1802	"MMC probe: failed\n");
1803	ocr = 0; /* Failed both, powerdown. */
1804	} else if (bootverbose \|\| mmc_debug)
1805	device_printf(sc->dev,
1806	"MMC probe: OK (OCR: 0x%08x)\n", ocr);
1807	} else if (bootverbose \|\| mmc_debug)
1808	device_printf(sc->dev, "SD probe: OK (OCR: 0x%08x)\n",
1809	ocr);
1810	sc->squelched--;
1811
1812	mmcbr_set_ocr(dev, mmc_select_vdd(sc, ocr));
1813	if (mmcbr_get_ocr(dev) != 0)
1814	mmc_idle_cards(sc);
1815	} else {
1816	mmcbr_set_bus_mode(dev, opendrain);
1817	mmcbr_set_clock(dev, SD_MMC_CARD_ID_FREQUENCY);
1818	mmcbr_update_ios(dev);
1819	/* XXX recompute vdd based on new cards? */
1820	}
1821	/*
1822	* Make sure that we have a mutually agreeable voltage to at least
1823	* one card on the bus.
1824	*/
1825	if (bootverbose \|\| mmc_debug)
1826	device_printf(sc->dev, "Current OCR: 0x%08x\n",
1827	mmcbr_get_ocr(dev));
1828	if (mmcbr_get_ocr(dev) == 0) {
1829	device_printf(sc->dev, "No compatible cards found on bus\n");
1830	mmc_delete_cards(sc);
1831	mmc_power_down(sc);
1832	return;
1833	}
1834	/*
1835	* Reselect the cards after we've idled them above.
1836	*/
1837	if (mmcbr_get_mode(dev) == mode_sd) {
1838	err = mmc_send_if_cond(sc, 1);
1839	mmc_send_app_op_cond(sc,
1840	(err ? 0 : MMC_OCR_CCS) \| mmcbr_get_ocr(dev), NULL);
1841	} else
1842	mmc_send_op_cond(sc, MMC_OCR_CCS \| mmcbr_get_ocr(dev), NULL);
1843	mmc_discover_cards(sc);
1844	mmc_rescan_cards(sc);
1845
1846	mmcbr_set_bus_mode(dev, pushpull);
1847	mmcbr_update_ios(dev);
1848	mmc_calculate_clock(sc);
1849	}
1850
1851	static int
1852	mmc_calculate_clock(struct mmc_softc *sc)
1853	{
1854	device_t *kids;
1855	struct mmc_ivars *ivar;
1856	int host_caps, i, nkid;
1857	uint32_t dtr, max_dtr;
1858	enum mmc_bus_timing max_timing, timing;
1859	bool changed;
1860
1861	max_dtr = mmcbr_get_f_max(sc->dev);
1862	host_caps = mmcbr_get_caps(sc->dev);
1863	if ((host_caps & MMC_CAP_MMC_DDR52) != 0)
1864	max_timing = bus_timing_mmc_ddr52;
1865	else if ((host_caps & MMC_CAP_HSPEED) != 0)
1866	max_timing = bus_timing_hs;
1867	else
1868	max_timing = bus_timing_normal;
1869	if (device_get_children(sc->dev, &kids, &nkid) != 0)
1870	panic("can't get children");
1871	do {
1872	changed = false;
1873	for (i = 0; i < nkid; i++) {
1874	ivar = device_get_ivars(kids[i]);
1875	if (isclr(&ivar->timings, max_timing)) {
1876	for (timing = max_timing; timing >=
1877	bus_timing_normal; timing--) {
1878	if (isset(&ivar->timings, timing)) {
1879	max_timing = timing;
1880	break;
1881	}
1882	}
1883	changed = true;
1884	}
1885	dtr = mmc_timing_to_dtr(ivar, max_timing);
1886	if (dtr < max_dtr) {
1887	max_dtr = dtr;
1888	changed = true;
1889	}
1890	}
1891	} while (changed == true);
1892	if (bootverbose \|\| mmc_debug) {
1893	device_printf(sc->dev,
1894	"setting transfer rate to %d.%03dMHz (%s timing)\n",
1895	max_dtr / 1000000, (max_dtr / 1000) % 1000,
1896	mmc_timing_to_string(max_timing));
1897	}
1898	for (i = 0; i < nkid; i++) {
1899	ivar = device_get_ivars(kids[i]);
1900	if ((ivar->timings & ~(1 << bus_timing_normal)) == 0)
1901	continue;
1902	if (mmc_select_card(sc, ivar->rca) != MMC_ERR_NONE \|\|
1903	mmc_set_timing(sc, ivar, max_timing) != MMC_ERR_NONE)
1904	device_printf(sc->dev, "Card at relative address %d "
1905	"failed to set timing.\n", ivar->rca);
1906	}
1907	mmc_select_card(sc, 0);
1908	free(kids, M_TEMP);
1909	mmcbr_set_clock(sc->dev, max_dtr);
1910	mmcbr_update_ios(sc->dev);
1911	return (max_dtr);
1912	}
1913
1914	static void
1915	mmc_scan(struct mmc_softc *sc)
1916	{
1917	device_t dev = sc->dev;
1918
1919	mmc_acquire_bus(dev, dev);
1920	mmc_go_discovery(sc);
1921	mmc_release_bus(dev, dev);
1922
1923	bus_generic_attach(dev);
1924	}
1925
1926	static int
1927	mmc_read_ivar(device_t bus, device_t child, int which, uintptr_t *result)
1928	{
1929	struct mmc_ivars *ivar = device_get_ivars(child);
1930
1931	switch (which) {
1932	default:
1933	return (EINVAL);
1934	case MMC_IVAR_SPEC_VERS:
1935	*result = ivar->csd.spec_vers;
1936	break;
1937	case MMC_IVAR_DSR_IMP:
1938	*result = ivar->csd.dsr_imp;
1939	break;
1940	case MMC_IVAR_MEDIA_SIZE:
1941	*result = ivar->sec_count;
1942	break;
1943	case MMC_IVAR_RCA:
1944	*result = ivar->rca;
1945	break;
1946	case MMC_IVAR_SECTOR_SIZE:
1947	*result = MMC_SECTOR_SIZE;
1948	break;
1949	case MMC_IVAR_TRAN_SPEED:
1950	*result = mmcbr_get_clock(bus);
1951	break;
1952	case MMC_IVAR_READ_ONLY:
1953	*result = ivar->read_only;
1954	break;
1955	case MMC_IVAR_HIGH_CAP:
1956	*result = ivar->high_cap;
1957	break;
1958	case MMC_IVAR_CARD_TYPE:
1959	*result = ivar->mode;
1960	break;
1961	case MMC_IVAR_BUS_WIDTH:
1962	*result = ivar->bus_width;
1963	break;
1964	case MMC_IVAR_ERASE_SECTOR:
1965	*result = ivar->erase_sector;
1966	break;
1967	case MMC_IVAR_MAX_DATA:
1968	*result = mmcbr_get_max_data(bus);
1969	break;
1970	case MMC_IVAR_CARD_ID_STRING:
1971	(char *)result = ivar->card_id_string;
1972	break;
1973	case MMC_IVAR_CARD_SN_STRING:
1974	(char *)result = ivar->card_sn_string;
1975	break;
1976	}
1977	return (0);
1978	}
1979
1980	static int
1981	mmc_write_ivar(device_t bus, device_t child, int which, uintptr_t value)
1982	{
1983
1984	/*
1985	* None are writable ATM
1986	*/
1987	return (EINVAL);
1988	}
1989
1990	static void
1991	mmc_delayed_attach(void *xsc)
1992	{
1993	struct mmc_softc *sc = xsc;
1994
1995	mmc_scan(sc);
1996	config_intrhook_disestablish(&sc->config_intrhook);
1997	}
1998
1999	static int
2000	mmc_child_location_str(device_t dev, device_t child, char *buf,
2001	size_t buflen)
2002	{
2003
2004	snprintf(buf, buflen, "rca=0x%04x", mmc_get_rca(child));
2005	return (0);
2006	}
2007
2008	static device_method_t mmc_methods[] = {
2009	/* device_if */
2010	DEVMETHOD(device_probe, mmc_probe),
2011	DEVMETHOD(device_attach, mmc_attach),
2012	DEVMETHOD(device_detach, mmc_detach),
2013	DEVMETHOD(device_suspend, mmc_suspend),
2014	DEVMETHOD(device_resume, mmc_resume),
2015
2016	/* Bus interface */
2017	DEVMETHOD(bus_read_ivar, mmc_read_ivar),
2018	DEVMETHOD(bus_write_ivar, mmc_write_ivar),
2019	DEVMETHOD(bus_child_location_str, mmc_child_location_str),
2020
2021	/* MMC Bus interface */
2022	DEVMETHOD(mmcbus_wait_for_request, mmc_wait_for_request),
2023	DEVMETHOD(mmcbus_acquire_bus, mmc_acquire_bus),
2024	DEVMETHOD(mmcbus_release_bus, mmc_release_bus),
2025
2026	DEVMETHOD_END
2027	};
2028
2029	driver_t mmc_driver = {
2030	"mmc",
2031	mmc_methods,
2032	sizeof(struct mmc_softc),
2033	};
2034	devclass_t mmc_devclass;
2035
2036	MODULE_VERSION(mmc, MMC_VERSION);

Note: See TracBrowser for help on using the repository browser.

Context Navigation

source: rtems-libbsd/freebsd/sys/dev/mmc/mmc.c @ c7e162a

Download in other formats: