1 | #include <machine/rtems-bsd-kernel-space.h> |
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2 | |
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3 | /*- |
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4 | * Copyright (c) 2003 |
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5 | * Bill Paul <wpaul@windriver.com>. All rights reserved. |
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6 | * |
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7 | * Redistribution and use in source and binary forms, with or without |
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8 | * modification, are permitted provided that the following conditions |
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9 | * are met: |
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10 | * 1. Redistributions of source code must retain the above copyright |
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11 | * notice, this list of conditions and the following disclaimer. |
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12 | * 2. Redistributions in binary form must reproduce the above copyright |
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13 | * notice, this list of conditions and the following disclaimer in the |
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14 | * documentation and/or other materials provided with the distribution. |
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15 | * 3. All advertising materials mentioning features or use of this software |
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16 | * must display the following acknowledgement: |
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17 | * This product includes software developed by Bill Paul. |
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18 | * 4. Neither the name of the author nor the names of any co-contributors |
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19 | * may be used to endorse or promote products derived from this software |
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20 | * without specific prior written permission. |
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21 | * |
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22 | * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND |
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23 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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25 | * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD |
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26 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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27 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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28 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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29 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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30 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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31 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF |
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32 | * THE POSSIBILITY OF SUCH DAMAGE. |
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33 | */ |
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34 | |
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35 | #include <sys/cdefs.h> |
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36 | __FBSDID("$FreeBSD$"); |
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37 | |
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38 | /* |
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39 | * Driver for the RealTek 8169S/8110S/8211B/8211C internal 10/100/1000 PHY. |
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40 | */ |
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41 | |
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42 | #include <rtems/bsd/sys/param.h> |
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43 | #include <sys/systm.h> |
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44 | #include <sys/kernel.h> |
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45 | #include <sys/module.h> |
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46 | #include <sys/socket.h> |
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47 | #include <sys/bus.h> |
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48 | |
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49 | #include <net/if.h> |
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50 | #include <net/if_arp.h> |
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51 | #include <net/if_media.h> |
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52 | |
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53 | #include <dev/mii/mii.h> |
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54 | #include <dev/mii/miivar.h> |
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55 | #include <rtems/bsd/local/miidevs.h> |
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56 | |
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57 | #include <dev/mii/rgephyreg.h> |
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58 | |
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59 | #include <rtems/bsd/local/miibus_if.h> |
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60 | |
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61 | #include <machine/bus.h> |
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62 | #include <pci/if_rlreg.h> |
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63 | |
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64 | static int rgephy_probe(device_t); |
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65 | static int rgephy_attach(device_t); |
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66 | |
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67 | static device_method_t rgephy_methods[] = { |
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68 | /* device interface */ |
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69 | DEVMETHOD(device_probe, rgephy_probe), |
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70 | DEVMETHOD(device_attach, rgephy_attach), |
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71 | DEVMETHOD(device_detach, mii_phy_detach), |
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72 | DEVMETHOD(device_shutdown, bus_generic_shutdown), |
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73 | DEVMETHOD_END |
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74 | }; |
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75 | |
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76 | static devclass_t rgephy_devclass; |
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77 | |
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78 | static driver_t rgephy_driver = { |
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79 | "rgephy", |
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80 | rgephy_methods, |
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81 | sizeof(struct mii_softc) |
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82 | }; |
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83 | |
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84 | DRIVER_MODULE(rgephy, miibus, rgephy_driver, rgephy_devclass, 0, 0); |
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85 | |
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86 | static int rgephy_service(struct mii_softc *, struct mii_data *, int); |
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87 | static void rgephy_status(struct mii_softc *); |
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88 | static int rgephy_mii_phy_auto(struct mii_softc *, int); |
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89 | static void rgephy_reset(struct mii_softc *); |
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90 | static int rgephy_linkup(struct mii_softc *); |
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91 | static void rgephy_loop(struct mii_softc *); |
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92 | static void rgephy_load_dspcode(struct mii_softc *); |
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93 | |
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94 | static const struct mii_phydesc rgephys[] = { |
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95 | MII_PHY_DESC(REALTEK, RTL8169S), |
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96 | MII_PHY_DESC(REALTEK, RTL8251), |
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97 | MII_PHY_END |
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98 | }; |
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99 | |
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100 | static const struct mii_phy_funcs rgephy_funcs = { |
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101 | rgephy_service, |
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102 | rgephy_status, |
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103 | rgephy_reset |
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104 | }; |
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105 | |
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106 | static int |
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107 | rgephy_probe(device_t dev) |
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108 | { |
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109 | |
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110 | return (mii_phy_dev_probe(dev, rgephys, BUS_PROBE_DEFAULT)); |
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111 | } |
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112 | |
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113 | static int |
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114 | rgephy_attach(device_t dev) |
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115 | { |
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116 | struct mii_softc *sc; |
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117 | struct mii_attach_args *ma; |
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118 | u_int flags; |
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119 | |
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120 | sc = device_get_softc(dev); |
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121 | ma = device_get_ivars(dev); |
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122 | flags = 0; |
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123 | if (strcmp(ma->mii_data->mii_ifp->if_dname, "re") == 0) |
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124 | flags |= MIIF_PHYPRIV0; |
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125 | mii_phy_dev_attach(dev, flags, &rgephy_funcs, 0); |
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126 | |
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127 | /* RTL8169S do not report auto-sense; add manually. */ |
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128 | sc->mii_capabilities = (PHY_READ(sc, MII_BMSR) | BMSR_ANEG) & |
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129 | sc->mii_capmask; |
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130 | if (sc->mii_capabilities & BMSR_EXTSTAT) |
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131 | sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); |
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132 | device_printf(dev, " "); |
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133 | mii_phy_add_media(sc); |
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134 | printf("\n"); |
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135 | /* |
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136 | * Allow IFM_FLAG0 to be set indicating that auto-negotiation with |
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137 | * manual configuration, which is used to work around issues with |
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138 | * certain setups by default, should not be triggered as it may in |
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139 | * turn cause harm in some edge cases. |
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140 | */ |
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141 | sc->mii_pdata->mii_media.ifm_mask |= IFM_FLAG0; |
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142 | |
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143 | PHY_RESET(sc); |
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144 | |
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145 | MIIBUS_MEDIAINIT(sc->mii_dev); |
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146 | return (0); |
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147 | } |
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148 | |
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149 | static int |
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150 | rgephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) |
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151 | { |
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152 | struct ifmedia_entry *ife = mii->mii_media.ifm_cur; |
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153 | int speed, gig, anar; |
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154 | |
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155 | switch (cmd) { |
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156 | case MII_POLLSTAT: |
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157 | break; |
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158 | |
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159 | case MII_MEDIACHG: |
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160 | /* |
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161 | * If the interface is not up, don't do anything. |
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162 | */ |
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163 | if ((mii->mii_ifp->if_flags & IFF_UP) == 0) |
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164 | break; |
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165 | |
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166 | PHY_RESET(sc); /* XXX hardware bug work-around */ |
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167 | |
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168 | anar = PHY_READ(sc, RGEPHY_MII_ANAR); |
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169 | anar &= ~(RGEPHY_ANAR_PC | RGEPHY_ANAR_ASP | |
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170 | RGEPHY_ANAR_TX_FD | RGEPHY_ANAR_TX | |
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171 | RGEPHY_ANAR_10_FD | RGEPHY_ANAR_10); |
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172 | |
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173 | switch (IFM_SUBTYPE(ife->ifm_media)) { |
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174 | case IFM_AUTO: |
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175 | #ifdef foo |
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176 | /* |
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177 | * If we're already in auto mode, just return. |
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178 | */ |
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179 | if (PHY_READ(sc, RGEPHY_MII_BMCR) & RGEPHY_BMCR_AUTOEN) |
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180 | return (0); |
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181 | #endif |
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182 | (void)rgephy_mii_phy_auto(sc, ife->ifm_media); |
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183 | break; |
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184 | case IFM_1000_T: |
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185 | speed = RGEPHY_S1000; |
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186 | goto setit; |
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187 | case IFM_100_TX: |
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188 | speed = RGEPHY_S100; |
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189 | anar |= RGEPHY_ANAR_TX_FD | RGEPHY_ANAR_TX; |
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190 | goto setit; |
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191 | case IFM_10_T: |
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192 | speed = RGEPHY_S10; |
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193 | anar |= RGEPHY_ANAR_10_FD | RGEPHY_ANAR_10; |
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194 | setit: |
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195 | if ((ife->ifm_media & IFM_FLOW) != 0 && |
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196 | (mii->mii_media.ifm_media & IFM_FLAG0) != 0) |
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197 | return (EINVAL); |
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198 | |
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199 | if ((ife->ifm_media & IFM_FDX) != 0) { |
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200 | speed |= RGEPHY_BMCR_FDX; |
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201 | gig = RGEPHY_1000CTL_AFD; |
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202 | anar &= ~(RGEPHY_ANAR_TX | RGEPHY_ANAR_10); |
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203 | if ((ife->ifm_media & IFM_FLOW) != 0 || |
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204 | (sc->mii_flags & MIIF_FORCEPAUSE) != 0) |
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205 | anar |= |
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206 | RGEPHY_ANAR_PC | RGEPHY_ANAR_ASP; |
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207 | } else { |
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208 | gig = RGEPHY_1000CTL_AHD; |
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209 | anar &= |
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210 | ~(RGEPHY_ANAR_TX_FD | RGEPHY_ANAR_10_FD); |
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211 | } |
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212 | if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { |
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213 | gig |= RGEPHY_1000CTL_MSE; |
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214 | if ((ife->ifm_media & IFM_ETH_MASTER) != 0) |
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215 | gig |= RGEPHY_1000CTL_MSC; |
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216 | } else { |
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217 | gig = 0; |
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218 | anar &= ~RGEPHY_ANAR_ASP; |
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219 | } |
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220 | if ((mii->mii_media.ifm_media & IFM_FLAG0) == 0) |
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221 | speed |= |
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222 | RGEPHY_BMCR_AUTOEN | RGEPHY_BMCR_STARTNEG; |
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223 | rgephy_loop(sc); |
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224 | PHY_WRITE(sc, RGEPHY_MII_1000CTL, gig); |
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225 | PHY_WRITE(sc, RGEPHY_MII_ANAR, anar); |
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226 | PHY_WRITE(sc, RGEPHY_MII_BMCR, speed); |
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227 | break; |
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228 | case IFM_NONE: |
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229 | PHY_WRITE(sc, MII_BMCR, BMCR_ISO | BMCR_PDOWN); |
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230 | break; |
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231 | default: |
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232 | return (EINVAL); |
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233 | } |
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234 | break; |
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235 | |
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236 | case MII_TICK: |
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237 | /* |
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238 | * Is the interface even up? |
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239 | */ |
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240 | if ((mii->mii_ifp->if_flags & IFF_UP) == 0) |
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241 | return (0); |
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242 | |
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243 | /* |
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244 | * Only used for autonegotiation. |
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245 | */ |
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246 | if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { |
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247 | sc->mii_ticks = 0; |
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248 | break; |
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249 | } |
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250 | |
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251 | /* |
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252 | * Check to see if we have link. If we do, we don't |
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253 | * need to restart the autonegotiation process. |
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254 | */ |
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255 | if (rgephy_linkup(sc) != 0) { |
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256 | sc->mii_ticks = 0; |
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257 | break; |
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258 | } |
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259 | |
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260 | /* Announce link loss right after it happens. */ |
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261 | if (sc->mii_ticks++ == 0) |
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262 | break; |
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263 | |
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264 | /* Only retry autonegotiation every mii_anegticks seconds. */ |
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265 | if (sc->mii_ticks <= sc->mii_anegticks) |
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266 | return (0); |
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267 | |
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268 | sc->mii_ticks = 0; |
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269 | rgephy_mii_phy_auto(sc, ife->ifm_media); |
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270 | break; |
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271 | } |
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272 | |
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273 | /* Update the media status. */ |
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274 | PHY_STATUS(sc); |
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275 | |
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276 | /* |
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277 | * Callback if something changed. Note that we need to poke |
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278 | * the DSP on the RealTek PHYs if the media changes. |
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279 | * |
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280 | */ |
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281 | if (sc->mii_media_active != mii->mii_media_active || |
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282 | sc->mii_media_status != mii->mii_media_status || |
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283 | cmd == MII_MEDIACHG) { |
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284 | rgephy_load_dspcode(sc); |
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285 | } |
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286 | mii_phy_update(sc, cmd); |
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287 | return (0); |
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288 | } |
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289 | |
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290 | static int |
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291 | rgephy_linkup(struct mii_softc *sc) |
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292 | { |
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293 | int linkup; |
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294 | uint16_t reg; |
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295 | |
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296 | linkup = 0; |
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297 | if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && |
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298 | sc->mii_mpd_rev >= RGEPHY_8211B) { |
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299 | if (sc->mii_mpd_rev == RGEPHY_8211F) { |
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300 | reg = PHY_READ(sc, RGEPHY_F_MII_SSR); |
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301 | if (reg & RGEPHY_F_SSR_LINK) |
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302 | linkup++; |
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303 | } else { |
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304 | reg = PHY_READ(sc, RGEPHY_MII_SSR); |
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305 | if (reg & RGEPHY_SSR_LINK) |
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306 | linkup++; |
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307 | } |
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308 | } else { |
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309 | reg = PHY_READ(sc, RL_GMEDIASTAT); |
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310 | if (reg & RL_GMEDIASTAT_LINK) |
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311 | linkup++; |
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312 | } |
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313 | |
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314 | return (linkup); |
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315 | } |
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316 | |
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317 | static void |
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318 | rgephy_status(struct mii_softc *sc) |
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319 | { |
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320 | struct mii_data *mii = sc->mii_pdata; |
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321 | int bmsr, bmcr; |
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322 | uint16_t ssr; |
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323 | |
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324 | mii->mii_media_status = IFM_AVALID; |
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325 | mii->mii_media_active = IFM_ETHER; |
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326 | |
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327 | if (rgephy_linkup(sc) != 0) |
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328 | mii->mii_media_status |= IFM_ACTIVE; |
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329 | |
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330 | bmsr = PHY_READ(sc, RGEPHY_MII_BMSR); |
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331 | bmcr = PHY_READ(sc, RGEPHY_MII_BMCR); |
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332 | if (bmcr & RGEPHY_BMCR_ISO) { |
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333 | mii->mii_media_active |= IFM_NONE; |
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334 | mii->mii_media_status = 0; |
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335 | return; |
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336 | } |
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337 | |
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338 | if (bmcr & RGEPHY_BMCR_LOOP) |
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339 | mii->mii_media_active |= IFM_LOOP; |
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340 | |
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341 | if (bmcr & RGEPHY_BMCR_AUTOEN) { |
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342 | if ((bmsr & RGEPHY_BMSR_ACOMP) == 0) { |
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343 | /* Erg, still trying, I guess... */ |
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344 | mii->mii_media_active |= IFM_NONE; |
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345 | return; |
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346 | } |
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347 | } |
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348 | |
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349 | if ((sc->mii_flags & MIIF_PHYPRIV0) == 0 && |
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350 | sc->mii_mpd_rev >= RGEPHY_8211B) { |
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351 | if (sc->mii_mpd_rev == RGEPHY_8211F) { |
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352 | ssr = PHY_READ(sc, RGEPHY_F_MII_SSR); |
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353 | switch (ssr & RGEPHY_F_SSR_SPD_MASK) { |
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354 | case RGEPHY_F_SSR_S1000: |
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355 | mii->mii_media_active |= IFM_1000_T; |
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356 | break; |
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357 | case RGEPHY_F_SSR_S100: |
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358 | mii->mii_media_active |= IFM_100_TX; |
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359 | break; |
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360 | case RGEPHY_F_SSR_S10: |
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361 | mii->mii_media_active |= IFM_10_T; |
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362 | break; |
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363 | default: |
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364 | mii->mii_media_active |= IFM_NONE; |
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365 | break; |
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366 | } |
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367 | if (ssr & RGEPHY_F_SSR_FDX) |
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368 | mii->mii_media_active |= IFM_FDX; |
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369 | else |
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370 | mii->mii_media_active |= IFM_HDX; |
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371 | |
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372 | } else { |
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373 | ssr = PHY_READ(sc, RGEPHY_MII_SSR); |
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374 | switch (ssr & RGEPHY_SSR_SPD_MASK) { |
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375 | case RGEPHY_SSR_S1000: |
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376 | mii->mii_media_active |= IFM_1000_T; |
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377 | break; |
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378 | case RGEPHY_SSR_S100: |
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379 | mii->mii_media_active |= IFM_100_TX; |
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380 | break; |
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381 | case RGEPHY_SSR_S10: |
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382 | mii->mii_media_active |= IFM_10_T; |
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383 | break; |
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384 | default: |
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385 | mii->mii_media_active |= IFM_NONE; |
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386 | break; |
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387 | } |
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388 | if (ssr & RGEPHY_SSR_FDX) |
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389 | mii->mii_media_active |= IFM_FDX; |
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390 | else |
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391 | mii->mii_media_active |= IFM_HDX; |
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392 | } |
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393 | } else { |
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394 | bmsr = PHY_READ(sc, RL_GMEDIASTAT); |
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395 | if (bmsr & RL_GMEDIASTAT_1000MBPS) |
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396 | mii->mii_media_active |= IFM_1000_T; |
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397 | else if (bmsr & RL_GMEDIASTAT_100MBPS) |
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398 | mii->mii_media_active |= IFM_100_TX; |
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399 | else if (bmsr & RL_GMEDIASTAT_10MBPS) |
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400 | mii->mii_media_active |= IFM_10_T; |
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401 | else |
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402 | mii->mii_media_active |= IFM_NONE; |
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403 | if (bmsr & RL_GMEDIASTAT_FDX) |
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404 | mii->mii_media_active |= IFM_FDX; |
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405 | else |
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406 | mii->mii_media_active |= IFM_HDX; |
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407 | } |
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408 | |
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409 | if ((mii->mii_media_active & IFM_FDX) != 0) |
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410 | mii->mii_media_active |= mii_phy_flowstatus(sc); |
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411 | |
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412 | if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) && |
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413 | (PHY_READ(sc, RGEPHY_MII_1000STS) & RGEPHY_1000STS_MSR) != 0) |
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414 | mii->mii_media_active |= IFM_ETH_MASTER; |
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415 | } |
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416 | |
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417 | static int |
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418 | rgephy_mii_phy_auto(struct mii_softc *sc, int media) |
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419 | { |
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420 | int anar; |
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421 | |
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422 | rgephy_loop(sc); |
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423 | PHY_RESET(sc); |
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424 | |
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425 | anar = BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA; |
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426 | if ((media & IFM_FLOW) != 0 || (sc->mii_flags & MIIF_FORCEPAUSE) != 0) |
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427 | anar |= RGEPHY_ANAR_PC | RGEPHY_ANAR_ASP; |
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428 | PHY_WRITE(sc, RGEPHY_MII_ANAR, anar); |
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429 | DELAY(1000); |
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430 | PHY_WRITE(sc, RGEPHY_MII_1000CTL, |
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431 | RGEPHY_1000CTL_AHD | RGEPHY_1000CTL_AFD); |
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432 | DELAY(1000); |
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433 | PHY_WRITE(sc, RGEPHY_MII_BMCR, |
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434 | RGEPHY_BMCR_AUTOEN | RGEPHY_BMCR_STARTNEG); |
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435 | DELAY(100); |
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436 | |
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437 | return (EJUSTRETURN); |
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438 | } |
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439 | |
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440 | static void |
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441 | rgephy_loop(struct mii_softc *sc) |
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442 | { |
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443 | int i; |
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444 | |
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445 | if (sc->mii_mpd_model != MII_MODEL_REALTEK_RTL8251 && |
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446 | sc->mii_mpd_rev < RGEPHY_8211B) { |
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447 | PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_PDOWN); |
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448 | DELAY(1000); |
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449 | } |
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450 | |
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451 | for (i = 0; i < 15000; i++) { |
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452 | if (!(PHY_READ(sc, RGEPHY_MII_BMSR) & RGEPHY_BMSR_LINK)) { |
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453 | #if 0 |
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454 | device_printf(sc->mii_dev, "looped %d\n", i); |
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455 | #endif |
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456 | break; |
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457 | } |
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458 | DELAY(10); |
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459 | } |
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460 | } |
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461 | |
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462 | #define PHY_SETBIT(x, y, z) \ |
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463 | PHY_WRITE(x, y, (PHY_READ(x, y) | (z))) |
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464 | #define PHY_CLRBIT(x, y, z) \ |
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465 | PHY_WRITE(x, y, (PHY_READ(x, y) & ~(z))) |
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466 | |
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467 | /* |
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468 | * Initialize RealTek PHY per the datasheet. The DSP in the PHYs of |
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469 | * existing revisions of the 8169S/8110S chips need to be tuned in |
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470 | * order to reliably negotiate a 1000Mbps link. This is only needed |
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471 | * for rev 0 and rev 1 of the PHY. Later versions work without |
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472 | * any fixups. |
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473 | */ |
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474 | static void |
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475 | rgephy_load_dspcode(struct mii_softc *sc) |
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476 | { |
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477 | int val; |
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478 | |
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479 | if (sc->mii_mpd_model == MII_MODEL_REALTEK_RTL8251 || |
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480 | sc->mii_mpd_rev >= RGEPHY_8211B) |
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481 | return; |
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482 | |
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483 | PHY_WRITE(sc, 31, 0x0001); |
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484 | PHY_WRITE(sc, 21, 0x1000); |
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485 | PHY_WRITE(sc, 24, 0x65C7); |
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486 | PHY_CLRBIT(sc, 4, 0x0800); |
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487 | val = PHY_READ(sc, 4) & 0xFFF; |
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488 | PHY_WRITE(sc, 4, val); |
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489 | PHY_WRITE(sc, 3, 0x00A1); |
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490 | PHY_WRITE(sc, 2, 0x0008); |
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491 | PHY_WRITE(sc, 1, 0x1020); |
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492 | PHY_WRITE(sc, 0, 0x1000); |
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493 | PHY_SETBIT(sc, 4, 0x0800); |
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494 | PHY_CLRBIT(sc, 4, 0x0800); |
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495 | val = (PHY_READ(sc, 4) & 0xFFF) | 0x7000; |
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496 | PHY_WRITE(sc, 4, val); |
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497 | PHY_WRITE(sc, 3, 0xFF41); |
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498 | PHY_WRITE(sc, 2, 0xDE60); |
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499 | PHY_WRITE(sc, 1, 0x0140); |
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500 | PHY_WRITE(sc, 0, 0x0077); |
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501 | val = (PHY_READ(sc, 4) & 0xFFF) | 0xA000; |
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502 | PHY_WRITE(sc, 4, val); |
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503 | PHY_WRITE(sc, 3, 0xDF01); |
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504 | PHY_WRITE(sc, 2, 0xDF20); |
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505 | PHY_WRITE(sc, 1, 0xFF95); |
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506 | PHY_WRITE(sc, 0, 0xFA00); |
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507 | val = (PHY_READ(sc, 4) & 0xFFF) | 0xB000; |
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508 | PHY_WRITE(sc, 4, val); |
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509 | PHY_WRITE(sc, 3, 0xFF41); |
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510 | PHY_WRITE(sc, 2, 0xDE20); |
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511 | PHY_WRITE(sc, 1, 0x0140); |
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512 | PHY_WRITE(sc, 0, 0x00BB); |
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513 | val = (PHY_READ(sc, 4) & 0xFFF) | 0xF000; |
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514 | PHY_WRITE(sc, 4, val); |
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515 | PHY_WRITE(sc, 3, 0xDF01); |
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516 | PHY_WRITE(sc, 2, 0xDF20); |
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517 | PHY_WRITE(sc, 1, 0xFF95); |
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518 | PHY_WRITE(sc, 0, 0xBF00); |
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519 | PHY_SETBIT(sc, 4, 0x0800); |
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520 | PHY_CLRBIT(sc, 4, 0x0800); |
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521 | PHY_WRITE(sc, 31, 0x0000); |
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522 | |
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523 | DELAY(40); |
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524 | } |
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525 | |
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526 | static void |
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527 | rgephy_reset(struct mii_softc *sc) |
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528 | { |
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529 | uint16_t pcr, ssr; |
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530 | |
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531 | switch (sc->mii_mpd_rev) { |
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532 | case RGEPHY_8211F: |
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533 | pcr = PHY_READ(sc, RGEPHY_F_MII_PCR1); |
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534 | if ((pcr & RGEPHY_F_PCR1_MDI_MM) != 0) { |
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535 | pcr &= ~RGEPHY_F_PCR1_MDI_MM; |
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536 | PHY_WRITE(sc, RGEPHY_F_MII_PCR1, pcr); |
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537 | } |
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538 | break; |
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539 | case RGEPHY_8211C: |
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540 | if ((sc->mii_flags & MIIF_PHYPRIV0) == 0) { |
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541 | /* RTL8211C(L) */ |
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542 | ssr = PHY_READ(sc, RGEPHY_MII_SSR); |
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543 | if ((ssr & RGEPHY_SSR_ALDPS) != 0) { |
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544 | ssr &= ~RGEPHY_SSR_ALDPS; |
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545 | PHY_WRITE(sc, RGEPHY_MII_SSR, ssr); |
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546 | } |
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547 | } |
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548 | /* FALLTHROUGH */ |
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549 | default: |
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550 | if (sc->mii_mpd_rev >= RGEPHY_8211B) { |
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551 | pcr = PHY_READ(sc, RGEPHY_MII_PCR); |
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552 | if ((pcr & RGEPHY_PCR_MDIX_AUTO) == 0) { |
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553 | pcr &= ~RGEPHY_PCR_MDI_MASK; |
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554 | pcr |= RGEPHY_PCR_MDIX_AUTO; |
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555 | PHY_WRITE(sc, RGEPHY_MII_PCR, pcr); |
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556 | } |
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557 | } |
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558 | break; |
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559 | } |
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560 | |
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561 | mii_phy_reset(sc); |
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562 | DELAY(1000); |
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563 | rgephy_load_dspcode(sc); |
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564 | } |
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