1 | #include <machine/rtems-bsd-kernel-space.h> |
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2 | |
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3 | /*- |
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4 | * Principal Author: Parag Patel |
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5 | * Copyright (c) 2001 |
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6 | * All rights reserved. |
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7 | * |
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8 | * Redistribution and use in source and binary forms, with or without |
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9 | * modification, are permitted provided that the following conditions |
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10 | * are met: |
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11 | * 1. Redistributions of source code must retain the above copyright |
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12 | * notice unmodified, this list of conditions, and the following |
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13 | * disclaimer. |
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14 | * 2. Redistributions in binary form must reproduce the above copyright |
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15 | * notice, this list of conditions and the following disclaimer in the |
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16 | * documentation and/or other materials provided with the distribution. |
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17 | * |
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18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND |
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19 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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20 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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21 | * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE |
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22 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
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23 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
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24 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
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25 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT |
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26 | * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY |
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27 | * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF |
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28 | * SUCH DAMAGE. |
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29 | * |
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30 | * Additional Copyright (c) 2001 by Traakan Software under same licence. |
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31 | * Secondary Author: Matthew Jacob |
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32 | */ |
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33 | |
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34 | #include <sys/cdefs.h> |
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35 | __FBSDID("$FreeBSD$"); |
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36 | |
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37 | /* |
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38 | * driver for the Marvell 88E1000 series external 1000/100/10-BT PHY. |
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39 | */ |
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40 | |
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41 | /* |
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42 | * Support added for the Marvell 88E1011 (Alaska) 1000/100/10baseTX and |
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43 | * 1000baseSX PHY. |
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44 | * Nathan Binkert <nate@openbsd.org> |
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45 | * Jung-uk Kim <jkim@niksun.com> |
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46 | */ |
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47 | |
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48 | #include <rtems/bsd/sys/param.h> |
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49 | #include <sys/systm.h> |
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50 | #include <sys/kernel.h> |
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51 | #include <sys/module.h> |
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52 | #include <sys/socket.h> |
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53 | #include <sys/bus.h> |
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54 | |
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55 | |
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56 | #include <net/if.h> |
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57 | #include <net/if_media.h> |
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58 | |
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59 | #include <dev/mii/mii.h> |
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60 | #include <dev/mii/miivar.h> |
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61 | #include <rtems/bsd/local/miidevs.h> |
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62 | |
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63 | #ifdef __rtems__ |
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64 | /* hacked into here to avoid having to touch the geerated header file. */ |
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65 | #define MII_MODEL_xxMARVELL_E1512 0x001d |
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66 | #define MII_STR_xxMARVELL_E1512 "Marvell 88E1512 Gigabit PHY" |
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67 | #endif /* __rtems__ */ |
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68 | |
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69 | #include <dev/mii/e1000phyreg.h> |
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70 | |
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71 | #include <rtems/bsd/local/miibus_if.h> |
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72 | |
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73 | static int e1000phy_probe(device_t); |
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74 | static int e1000phy_attach(device_t); |
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75 | |
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76 | static device_method_t e1000phy_methods[] = { |
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77 | /* device interface */ |
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78 | DEVMETHOD(device_probe, e1000phy_probe), |
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79 | DEVMETHOD(device_attach, e1000phy_attach), |
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80 | DEVMETHOD(device_detach, mii_phy_detach), |
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81 | DEVMETHOD(device_shutdown, bus_generic_shutdown), |
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82 | DEVMETHOD_END |
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83 | }; |
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84 | |
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85 | static devclass_t e1000phy_devclass; |
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86 | static driver_t e1000phy_driver = { |
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87 | "e1000phy", |
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88 | e1000phy_methods, |
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89 | sizeof(struct mii_softc) |
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90 | }; |
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91 | |
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92 | DRIVER_MODULE(e1000phy, miibus, e1000phy_driver, e1000phy_devclass, 0, 0); |
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93 | |
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94 | static int e1000phy_service(struct mii_softc *, struct mii_data *, int); |
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95 | static void e1000phy_status(struct mii_softc *); |
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96 | static void e1000phy_reset(struct mii_softc *); |
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97 | static int e1000phy_mii_phy_auto(struct mii_softc *, int); |
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98 | |
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99 | static const struct mii_phydesc e1000phys[] = { |
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100 | MII_PHY_DESC(MARVELL, E1000), |
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101 | MII_PHY_DESC(MARVELL, E1011), |
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102 | MII_PHY_DESC(MARVELL, E1000_3), |
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103 | MII_PHY_DESC(MARVELL, E1000_5), |
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104 | MII_PHY_DESC(MARVELL, E1111), |
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105 | MII_PHY_DESC(xxMARVELL, E1000), |
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106 | MII_PHY_DESC(xxMARVELL, E1011), |
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107 | MII_PHY_DESC(xxMARVELL, E1000_3), |
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108 | MII_PHY_DESC(xxMARVELL, E1000S), |
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109 | MII_PHY_DESC(xxMARVELL, E1000_5), |
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110 | MII_PHY_DESC(xxMARVELL, E1101), |
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111 | MII_PHY_DESC(xxMARVELL, E3082), |
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112 | MII_PHY_DESC(xxMARVELL, E1112), |
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113 | MII_PHY_DESC(xxMARVELL, E1149), |
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114 | MII_PHY_DESC(xxMARVELL, E1111), |
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115 | MII_PHY_DESC(xxMARVELL, E1116), |
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116 | MII_PHY_DESC(xxMARVELL, E1116R), |
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117 | MII_PHY_DESC(xxMARVELL, E1118), |
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118 | MII_PHY_DESC(xxMARVELL, E1149R), |
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119 | MII_PHY_DESC(xxMARVELL, E3016), |
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120 | MII_PHY_DESC(xxMARVELL, PHYG65G), |
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121 | #if __rtems__ |
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122 | MII_PHY_DESC(xxMARVELL, E1512), |
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123 | #endif /* __rtems__ */ |
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124 | MII_PHY_END |
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125 | }; |
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126 | |
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127 | static const struct mii_phy_funcs e1000phy_funcs = { |
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128 | e1000phy_service, |
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129 | e1000phy_status, |
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130 | e1000phy_reset |
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131 | }; |
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132 | |
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133 | static int |
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134 | e1000phy_probe(device_t dev) |
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135 | { |
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136 | |
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137 | return (mii_phy_dev_probe(dev, e1000phys, BUS_PROBE_DEFAULT)); |
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138 | } |
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139 | |
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140 | static int |
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141 | e1000phy_attach(device_t dev) |
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142 | { |
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143 | struct mii_softc *sc; |
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144 | struct ifnet *ifp; |
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145 | |
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146 | sc = device_get_softc(dev); |
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147 | |
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148 | mii_phy_dev_attach(dev, MIIF_NOMANPAUSE, &e1000phy_funcs, 0); |
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149 | |
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150 | ifp = sc->mii_pdata->mii_ifp; |
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151 | if (strcmp(ifp->if_dname, "msk") == 0 && |
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152 | (sc->mii_flags & MIIF_MACPRIV0) != 0) |
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153 | sc->mii_flags |= MIIF_PHYPRIV0; |
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154 | |
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155 | switch (sc->mii_mpd_model) { |
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156 | case MII_MODEL_xxMARVELL_E1011: |
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157 | case MII_MODEL_xxMARVELL_E1112: |
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158 | if (PHY_READ(sc, E1000_ESSR) & E1000_ESSR_FIBER_LINK) |
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159 | sc->mii_flags |= MIIF_HAVEFIBER; |
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160 | break; |
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161 | case MII_MODEL_xxMARVELL_E1149: |
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162 | case MII_MODEL_xxMARVELL_E1149R: |
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163 | /* |
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164 | * Some 88E1149 PHY's page select is initialized to |
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165 | * point to other bank instead of copper/fiber bank |
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166 | * which in turn resulted in wrong registers were |
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167 | * accessed during PHY operation. It is believed that |
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168 | * page 0 should be used for copper PHY so reinitialize |
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169 | * E1000_EADR to select default copper PHY. If parent |
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170 | * device know the type of PHY(either copper or fiber), |
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171 | * that information should be used to select default |
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172 | * type of PHY. |
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173 | */ |
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174 | PHY_WRITE(sc, E1000_EADR, 0); |
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175 | break; |
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176 | } |
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177 | |
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178 | PHY_RESET(sc); |
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179 | |
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180 | sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; |
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181 | if (sc->mii_capabilities & BMSR_EXTSTAT) { |
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182 | sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); |
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183 | if ((sc->mii_extcapabilities & |
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184 | (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) |
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185 | sc->mii_flags |= MIIF_HAVE_GTCR; |
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186 | } |
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187 | device_printf(dev, " "); |
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188 | mii_phy_add_media(sc); |
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189 | printf("\n"); |
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190 | |
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191 | MIIBUS_MEDIAINIT(sc->mii_dev); |
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192 | return (0); |
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193 | } |
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194 | |
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195 | static void |
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196 | e1000phy_reset(struct mii_softc *sc) |
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197 | { |
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198 | uint16_t reg, page; |
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199 | |
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200 | reg = PHY_READ(sc, E1000_SCR); |
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201 | if ((sc->mii_flags & MIIF_HAVEFIBER) != 0) { |
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202 | reg &= ~E1000_SCR_AUTO_X_MODE; |
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203 | PHY_WRITE(sc, E1000_SCR, reg); |
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204 | if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1112) { |
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205 | /* Select 1000BASE-X only mode. */ |
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206 | page = PHY_READ(sc, E1000_EADR); |
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207 | PHY_WRITE(sc, E1000_EADR, 2); |
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208 | reg = PHY_READ(sc, E1000_SCR); |
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209 | reg &= ~E1000_SCR_MODE_MASK; |
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210 | reg |= E1000_SCR_MODE_1000BX; |
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211 | PHY_WRITE(sc, E1000_SCR, reg); |
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212 | if ((sc->mii_flags & MIIF_PHYPRIV0) != 0) { |
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213 | /* Set SIGDET polarity low for SFP module. */ |
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214 | PHY_WRITE(sc, E1000_EADR, 1); |
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215 | reg = PHY_READ(sc, E1000_SCR); |
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216 | reg |= E1000_SCR_FIB_SIGDET_POLARITY; |
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217 | PHY_WRITE(sc, E1000_SCR, reg); |
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218 | } |
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219 | PHY_WRITE(sc, E1000_EADR, page); |
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220 | } |
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221 | } else { |
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222 | switch (sc->mii_mpd_model) { |
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223 | case MII_MODEL_xxMARVELL_E1111: |
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224 | case MII_MODEL_xxMARVELL_E1112: |
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225 | case MII_MODEL_xxMARVELL_E1116: |
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226 | case MII_MODEL_xxMARVELL_E1118: |
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227 | case MII_MODEL_xxMARVELL_E1149: |
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228 | case MII_MODEL_xxMARVELL_E1149R: |
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229 | case MII_MODEL_xxMARVELL_PHYG65G: |
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230 | /* Disable energy detect mode. */ |
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231 | reg &= ~E1000_SCR_EN_DETECT_MASK; |
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232 | reg |= E1000_SCR_AUTO_X_MODE; |
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233 | if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116) |
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234 | reg &= ~E1000_SCR_POWER_DOWN; |
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235 | reg |= E1000_SCR_ASSERT_CRS_ON_TX; |
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236 | break; |
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237 | case MII_MODEL_xxMARVELL_E3082: |
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238 | reg |= (E1000_SCR_AUTO_X_MODE >> 1); |
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239 | reg |= E1000_SCR_ASSERT_CRS_ON_TX; |
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240 | break; |
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241 | case MII_MODEL_xxMARVELL_E3016: |
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242 | reg |= E1000_SCR_AUTO_MDIX; |
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243 | reg &= ~(E1000_SCR_EN_DETECT | |
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244 | E1000_SCR_SCRAMBLER_DISABLE); |
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245 | reg |= E1000_SCR_LPNP; |
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246 | /* XXX Enable class A driver for Yukon FE+ A0. */ |
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247 | PHY_WRITE(sc, 0x1C, PHY_READ(sc, 0x1C) | 0x0001); |
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248 | break; |
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249 | default: |
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250 | reg &= ~E1000_SCR_AUTO_X_MODE; |
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251 | reg |= E1000_SCR_ASSERT_CRS_ON_TX; |
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252 | break; |
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253 | } |
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254 | if (sc->mii_mpd_model != MII_MODEL_xxMARVELL_E3016) { |
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255 | /* Auto correction for reversed cable polarity. */ |
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256 | reg &= ~E1000_SCR_POLARITY_REVERSAL; |
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257 | } |
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258 | PHY_WRITE(sc, E1000_SCR, reg); |
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259 | |
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260 | if (sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1116 || |
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261 | sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149 || |
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262 | sc->mii_mpd_model == MII_MODEL_xxMARVELL_E1149R) { |
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263 | PHY_WRITE(sc, E1000_EADR, 2); |
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264 | reg = PHY_READ(sc, E1000_SCR); |
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265 | reg |= E1000_SCR_RGMII_POWER_UP; |
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266 | PHY_WRITE(sc, E1000_SCR, reg); |
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267 | PHY_WRITE(sc, E1000_EADR, 0); |
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268 | } |
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269 | } |
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270 | |
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271 | switch (sc->mii_mpd_model) { |
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272 | case MII_MODEL_xxMARVELL_E3082: |
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273 | case MII_MODEL_xxMARVELL_E1112: |
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274 | case MII_MODEL_xxMARVELL_E1118: |
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275 | break; |
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276 | case MII_MODEL_xxMARVELL_E1116: |
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277 | page = PHY_READ(sc, E1000_EADR); |
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278 | /* Select page 3, LED control register. */ |
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279 | PHY_WRITE(sc, E1000_EADR, 3); |
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280 | PHY_WRITE(sc, E1000_SCR, |
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281 | E1000_SCR_LED_LOS(1) | /* Link/Act */ |
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282 | E1000_SCR_LED_INIT(8) | /* 10Mbps */ |
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283 | E1000_SCR_LED_STAT1(7) | /* 100Mbps */ |
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284 | E1000_SCR_LED_STAT0(7)); /* 1000Mbps */ |
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285 | /* Set blink rate. */ |
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286 | PHY_WRITE(sc, E1000_IER, E1000_PULSE_DUR(E1000_PULSE_170MS) | |
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287 | E1000_BLINK_RATE(E1000_BLINK_84MS)); |
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288 | PHY_WRITE(sc, E1000_EADR, page); |
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289 | break; |
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290 | case MII_MODEL_xxMARVELL_E3016: |
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291 | /* LED2 -> ACT, LED1 -> LINK, LED0 -> SPEED. */ |
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292 | PHY_WRITE(sc, 0x16, 0x0B << 8 | 0x05 << 4 | 0x04); |
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293 | /* Integrated register calibration workaround. */ |
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294 | PHY_WRITE(sc, 0x1D, 17); |
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295 | PHY_WRITE(sc, 0x1E, 0x3F60); |
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296 | break; |
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297 | default: |
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298 | /* Force TX_CLK to 25MHz clock. */ |
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299 | reg = PHY_READ(sc, E1000_ESCR); |
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300 | reg |= E1000_ESCR_TX_CLK_25; |
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301 | PHY_WRITE(sc, E1000_ESCR, reg); |
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302 | break; |
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303 | } |
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304 | |
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305 | /* Reset the PHY so all changes take effect. */ |
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306 | reg = PHY_READ(sc, E1000_CR); |
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307 | reg |= E1000_CR_RESET; |
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308 | PHY_WRITE(sc, E1000_CR, reg); |
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309 | } |
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310 | |
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311 | static int |
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312 | e1000phy_service(struct mii_softc *sc, struct mii_data *mii, int cmd) |
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313 | { |
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314 | struct ifmedia_entry *ife = mii->mii_media.ifm_cur; |
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315 | uint16_t speed, gig; |
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316 | int reg; |
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317 | |
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318 | switch (cmd) { |
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319 | case MII_POLLSTAT: |
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320 | break; |
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321 | |
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322 | case MII_MEDIACHG: |
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323 | /* |
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324 | * If the interface is not up, don't do anything. |
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325 | */ |
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326 | if ((mii->mii_ifp->if_flags & IFF_UP) == 0) |
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327 | break; |
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328 | |
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329 | if (IFM_SUBTYPE(ife->ifm_media) == IFM_AUTO) { |
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330 | e1000phy_mii_phy_auto(sc, ife->ifm_media); |
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331 | break; |
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332 | } |
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333 | |
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334 | speed = 0; |
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335 | switch (IFM_SUBTYPE(ife->ifm_media)) { |
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336 | case IFM_1000_T: |
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337 | if ((sc->mii_flags & MIIF_HAVE_GTCR) == 0) |
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338 | return (EINVAL); |
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339 | speed = E1000_CR_SPEED_1000; |
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340 | break; |
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341 | case IFM_1000_SX: |
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342 | if ((sc->mii_extcapabilities & |
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343 | (EXTSR_1000XFDX | EXTSR_1000XHDX)) == 0) |
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344 | return (EINVAL); |
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345 | speed = E1000_CR_SPEED_1000; |
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346 | break; |
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347 | case IFM_100_TX: |
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348 | speed = E1000_CR_SPEED_100; |
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349 | break; |
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350 | case IFM_10_T: |
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351 | speed = E1000_CR_SPEED_10; |
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352 | break; |
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353 | case IFM_NONE: |
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354 | reg = PHY_READ(sc, E1000_CR); |
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355 | PHY_WRITE(sc, E1000_CR, |
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356 | reg | E1000_CR_ISOLATE | E1000_CR_POWER_DOWN); |
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357 | goto done; |
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358 | default: |
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359 | return (EINVAL); |
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360 | } |
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361 | |
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362 | if ((ife->ifm_media & IFM_FDX) != 0) { |
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363 | speed |= E1000_CR_FULL_DUPLEX; |
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364 | gig = E1000_1GCR_1000T_FD; |
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365 | } else |
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366 | gig = E1000_1GCR_1000T; |
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367 | |
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368 | reg = PHY_READ(sc, E1000_CR); |
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369 | reg &= ~E1000_CR_AUTO_NEG_ENABLE; |
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370 | PHY_WRITE(sc, E1000_CR, reg | E1000_CR_RESET); |
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371 | |
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372 | if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { |
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373 | gig |= E1000_1GCR_MS_ENABLE; |
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374 | if ((ife->ifm_media & IFM_ETH_MASTER) != 0) |
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375 | gig |= E1000_1GCR_MS_VALUE; |
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376 | } else if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) |
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377 | gig = 0; |
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378 | PHY_WRITE(sc, E1000_1GCR, gig); |
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379 | PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); |
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380 | PHY_WRITE(sc, E1000_CR, speed | E1000_CR_RESET); |
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381 | done: |
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382 | break; |
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383 | case MII_TICK: |
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384 | /* |
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385 | * Is the interface even up? |
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386 | */ |
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387 | if ((mii->mii_ifp->if_flags & IFF_UP) == 0) |
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388 | return (0); |
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389 | |
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390 | /* |
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391 | * Only used for autonegotiation. |
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392 | */ |
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393 | if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) { |
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394 | sc->mii_ticks = 0; |
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395 | break; |
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396 | } |
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397 | |
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398 | /* |
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399 | * check for link. |
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400 | * Read the status register twice; BMSR_LINK is latch-low. |
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401 | */ |
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402 | reg = PHY_READ(sc, MII_BMSR) | PHY_READ(sc, MII_BMSR); |
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403 | if (reg & BMSR_LINK) { |
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404 | sc->mii_ticks = 0; |
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405 | break; |
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406 | } |
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407 | |
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408 | /* Announce link loss right after it happens. */ |
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409 | if (sc->mii_ticks++ == 0) |
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410 | break; |
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411 | if (sc->mii_ticks <= sc->mii_anegticks) |
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412 | break; |
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413 | |
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414 | sc->mii_ticks = 0; |
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415 | PHY_RESET(sc); |
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416 | e1000phy_mii_phy_auto(sc, ife->ifm_media); |
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417 | break; |
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418 | } |
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419 | |
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420 | /* Update the media status. */ |
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421 | PHY_STATUS(sc); |
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422 | |
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423 | /* Callback if something changed. */ |
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424 | mii_phy_update(sc, cmd); |
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425 | return (0); |
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426 | } |
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427 | |
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428 | static void |
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429 | e1000phy_status(struct mii_softc *sc) |
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430 | { |
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431 | struct mii_data *mii = sc->mii_pdata; |
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432 | int bmcr, bmsr, ssr; |
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433 | |
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434 | mii->mii_media_status = IFM_AVALID; |
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435 | mii->mii_media_active = IFM_ETHER; |
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436 | |
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437 | bmsr = PHY_READ(sc, E1000_SR) | PHY_READ(sc, E1000_SR); |
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438 | bmcr = PHY_READ(sc, E1000_CR); |
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439 | ssr = PHY_READ(sc, E1000_SSR); |
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440 | |
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441 | if (bmsr & E1000_SR_LINK_STATUS) |
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442 | mii->mii_media_status |= IFM_ACTIVE; |
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443 | |
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444 | if (bmcr & E1000_CR_LOOPBACK) |
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445 | mii->mii_media_active |= IFM_LOOP; |
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446 | |
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447 | if ((bmcr & E1000_CR_AUTO_NEG_ENABLE) != 0 && |
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448 | (ssr & E1000_SSR_SPD_DPLX_RESOLVED) == 0) { |
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449 | /* Erg, still trying, I guess... */ |
---|
450 | mii->mii_media_active |= IFM_NONE; |
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451 | return; |
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452 | } |
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453 | |
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454 | if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { |
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455 | switch (ssr & E1000_SSR_SPEED) { |
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456 | case E1000_SSR_1000MBS: |
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457 | mii->mii_media_active |= IFM_1000_T; |
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458 | break; |
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459 | case E1000_SSR_100MBS: |
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460 | mii->mii_media_active |= IFM_100_TX; |
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461 | break; |
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462 | case E1000_SSR_10MBS: |
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463 | mii->mii_media_active |= IFM_10_T; |
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464 | break; |
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465 | default: |
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466 | mii->mii_media_active |= IFM_NONE; |
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467 | return; |
---|
468 | } |
---|
469 | } else { |
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470 | /* |
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471 | * Some fiber PHY(88E1112) does not seem to set resolved |
---|
472 | * speed so always assume we've got IFM_1000_SX. |
---|
473 | */ |
---|
474 | mii->mii_media_active |= IFM_1000_SX; |
---|
475 | } |
---|
476 | |
---|
477 | if (ssr & E1000_SSR_DUPLEX) { |
---|
478 | mii->mii_media_active |= IFM_FDX; |
---|
479 | if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) |
---|
480 | mii->mii_media_active |= mii_phy_flowstatus(sc); |
---|
481 | } else |
---|
482 | mii->mii_media_active |= IFM_HDX; |
---|
483 | |
---|
484 | if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) { |
---|
485 | if (((PHY_READ(sc, E1000_1GSR) | PHY_READ(sc, E1000_1GSR)) & |
---|
486 | E1000_1GSR_MS_CONFIG_RES) != 0) |
---|
487 | mii->mii_media_active |= IFM_ETH_MASTER; |
---|
488 | } |
---|
489 | } |
---|
490 | |
---|
491 | static int |
---|
492 | e1000phy_mii_phy_auto(struct mii_softc *sc, int media) |
---|
493 | { |
---|
494 | uint16_t reg; |
---|
495 | |
---|
496 | if ((sc->mii_flags & MIIF_HAVEFIBER) == 0) { |
---|
497 | reg = PHY_READ(sc, E1000_AR); |
---|
498 | reg &= ~(E1000_AR_PAUSE | E1000_AR_ASM_DIR); |
---|
499 | reg |= E1000_AR_10T | E1000_AR_10T_FD | |
---|
500 | E1000_AR_100TX | E1000_AR_100TX_FD; |
---|
501 | if ((media & IFM_FLOW) != 0 || |
---|
502 | (sc->mii_flags & MIIF_FORCEPAUSE) != 0) |
---|
503 | reg |= E1000_AR_PAUSE | E1000_AR_ASM_DIR; |
---|
504 | PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD); |
---|
505 | } else |
---|
506 | PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X); |
---|
507 | if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) { |
---|
508 | reg = 0; |
---|
509 | if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) |
---|
510 | reg |= E1000_1GCR_1000T_FD; |
---|
511 | if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) |
---|
512 | reg |= E1000_1GCR_1000T; |
---|
513 | PHY_WRITE(sc, E1000_1GCR, reg); |
---|
514 | } |
---|
515 | PHY_WRITE(sc, E1000_CR, |
---|
516 | E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG); |
---|
517 | |
---|
518 | return (EJUSTRETURN); |
---|
519 | } |
---|