source: rtems-libbsd/freebsd/dev/usb/controller/ohci_lpc3250.c @ 03d4faf

4.1155-freebsd-126-freebsd-12freebsd-9.3
Last change on this file since 03d4faf was 03d4faf, checked in by Joel Sherrill <joel.sherrill@…>, on 03/08/12 at 14:56:25

Begin to trim rtems/ from include file paths - start with freebsd
  • Property mode set to 100644
File size: 8.3 KB
Line 
1#include <freebsd/machine/rtems-bsd-config.h>
2
3#include <rtems/freebsd/machine/rtems-bsd-config.h>
4
5#include <bsp.h>
6
7#ifdef LIBBSP_ARM_LPC3250_BSP_H
8
9#include <bsp/irq.h>
10
11#include <rtems/freebsd/sys/cdefs.h>
12#include <rtems/freebsd/sys/stdint.h>
13#include <rtems/freebsd/sys/stddef.h>
14#include <rtems/freebsd/sys/param.h>
15#include <rtems/freebsd/sys/queue.h>
16#include <rtems/freebsd/sys/types.h>
17#include <rtems/freebsd/sys/systm.h>
18#include <rtems/freebsd/sys/kernel.h>
19#include <rtems/freebsd/sys/bus.h>
20#include <rtems/freebsd/sys/linker_set.h>
21#include <rtems/freebsd/sys/module.h>
22#include <rtems/freebsd/sys/lock.h>
23#include <rtems/freebsd/sys/mutex.h>
24#include <rtems/freebsd/sys/condvar.h>
25#include <rtems/freebsd/sys/sysctl.h>
26#include <rtems/freebsd/sys/sx.h>
27#include <rtems/freebsd/sys/unistd.h>
28#include <rtems/freebsd/sys/callout.h>
29#include <rtems/freebsd/sys/malloc.h>
30#include <rtems/freebsd/sys/priv.h>
31
32#include <rtems/freebsd/dev/usb/usb.h>
33#include <rtems/freebsd/dev/usb/usbdi.h>
34
35#include <rtems/freebsd/dev/usb/usb_core.h>
36#include <rtems/freebsd/dev/usb/usb_busdma.h>
37#include <rtems/freebsd/dev/usb/usb_process.h>
38#include <rtems/freebsd/dev/usb/usb_util.h>
39
40#include <rtems/freebsd/dev/usb/usb_controller.h>
41#include <rtems/freebsd/dev/usb/usb_bus.h>
42#include <rtems/freebsd/dev/usb/controller/ohci.h>
43
44typedef struct
45{
46  uint16_t VendorID;
47  uint16_t ProductID;
48  uint16_t VersionID;
49} isp130x_PhyDetails_Typ;
50
51static void
52i2c_wait_for_receive_fifo_not_empty(void)
53{
54  while ((OTGI2CSTS & OTG_I2C_RFE) != 0) {
55                /* Wait */
56        }
57}
58
59static uint8_t
60isp1301_read(uint8_t reg)
61{
62  OTGI2CCTL = OTG_I2C_RESET;
63
64  OTGI2CTX = ISP1301_I2C_ADDR | OTG_I2C_START;
65
66  OTGI2CTX = reg;
67
68  OTGI2CTX = ISP1301_I2C_ADDR | OTG_I2C_READ | OTG_I2C_START;
69
70  OTGI2CTX = OTG_I2C_STOP;
71
72        i2c_wait_for_receive_fifo_not_empty();
73
74  return (uint8_t) OTGI2CRX;
75}
76
77static void
78i2c_wait_for_transaction_done(void)
79{
80  while ((OTGI2CSTS & OTG_I2C_TDI) == 0) {
81                /* Wait */
82        }
83
84  OTGI2CSTS = OTG_I2C_TDI;
85}
86
87static void
88isp1301_write(uint8_t reg, uint8_t val)
89{
90
91  OTGI2CCTL = OTG_I2C_RESET;
92
93  OTGI2CTX = ISP1301_I2C_ADDR | OTG_I2C_START;
94
95  OTGI2CTX = reg;
96
97  OTGI2CTX = val | OTG_I2C_STOP;
98
99        i2c_wait_for_transaction_done();
100}
101
102static void
103isp1301_dump(void)
104{
105        BSD_PRINTF(
106                "ISP1301: mc1 %02x, mc2 %02x, otgctrl %02x, otgsts %02x, isrc %02x, iltch %02x, ienl %02x, ienh %02x\n",
107                isp1301_read(ISP1301_MODE_CONTROL_1),
108                isp1301_read(ISP1301_MODE_CONTROL_2),
109    isp1301_read(ISP1301_OTG_CONTROL_1),
110                isp1301_read(ISP1301_OTG_STATUS),
111    isp1301_read(ISP1301_I2C_INTERRUPT_SOURCE),
112    isp1301_read(ISP1301_I2C_INTERRUPT_LATCH),
113    isp1301_read(ISP1301_I2C_INTERRUPT_FALLING),
114    isp1301_read(ISP1301_I2C_INTERRUPT_RISING)
115        );
116}
117
118
119static isp130x_PhyDetails_Typ
120 isp130x_GetPhyDetails(void)
121{
122  isp130x_PhyDetails_Typ PhyDetails;
123
124  PhyDetails.VendorID  = (uint16_t)((isp1301_read(ISP1301_I2C_VENDOR_ID_HIGH) << 8) |
125                                     isp1301_read(ISP1301_I2C_VENDOR_ID_LOW));
126
127  PhyDetails.ProductID = (uint16_t)((isp1301_read(ISP1301_I2C_PRODUCT_ID_HIGH) << 8) |
128                                     isp1301_read(ISP1301_I2C_PRODUCT_ID_LOW));
129
130  PhyDetails.VersionID = (uint16_t)((isp1301_read(ISP1301_I2C_VERSION_ID_HIGH) << 8) |
131                                     isp1301_read(ISP1301_I2C_VERSION_ID_LOW));
132
133  return PhyDetails;
134}
135
136
137static void
138isp1301_configure(void)
139{
140    isp130x_PhyDetails_Typ PhyDetails = isp130x_GetPhyDetails();
141
142    BSD_PRINTF("ISP130x: vendor 0x%04x, product 0x%04x, version 0x%04x\n",
143               PhyDetails.VendorID,
144               PhyDetails.ProductID,
145               PhyDetails.VersionID);
146
147        isp1301_write(ISP1301_MODE_CONTROL_1_CLEAR, 0xff);
148  isp1301_write(ISP1301_MODE_CONTROL_1_SET, MC1_SPEED_REG);
149        isp1301_write(ISP1301_MODE_CONTROL_2_CLEAR, 0xff);
150
151    switch (PhyDetails.ProductID)
152    {
153      case ISP1301_PRODUCT_ID:
154        isp1301_write(ISP1301_MODE_CONTROL_2_SET, MC2_BI_DI |
155                                                  MC2_PSW_EN |
156                                                  MC2_SPD_SUSP_CTRL);
157        break;
158
159      case ISP1302_PRODUCT_ID:
160        // Do not set 'SPD_SUSP_CTRL' bit as per ISP1301 this bit is reserved in
161        // ISP1302, setting it will cause problems.
162        isp1301_write(ISP1301_MODE_CONTROL_2_SET, MC2_BI_DI |
163                                                  MC2_PSW_EN);
164
165        // ISP1302 has an additonal register we should initialise it..
166        isp1301_write(ISP1302_MISC_CONTROL_CLEAR, 0xff);
167        isp1301_write(ISP1302_MISC_CONTROL_SET, MISC_UART_2V8_EN);
168
169        break;
170
171      default:
172        break;
173    }
174
175    isp1301_write(ISP1301_OTG_CONTROL_CLEAR, 0xff);
176  isp1301_write(ISP1301_MODE_CONTROL_1_SET, MC1_DAT_SE0);
177  isp1301_write(ISP1301_OTG_CONTROL_SET, OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN);
178  isp1301_write(ISP1301_I2C_INTERRUPT_LATCH_CLEAR, 0xff);
179  isp1301_write(ISP1301_I2C_INTERRUPT_FALLING_CLEAR, 0xff);
180  isp1301_write(ISP1301_I2C_INTERRUPT_RISING_CLEAR, 0xff);
181}
182
183static void
184isp1301_vbus_on(void)
185{
186  isp1301_write(ISP1301_OTG_CONTROL_SET, OTG1_VBUS_DRV);
187}
188
189static int
190ohci_lpc32xx_suspend(device_t self)
191{
192        ohci_softc_t *e = device_get_softc(self);
193        int eno = bus_generic_suspend(self);
194
195        if (eno != 0) {
196                return (eno);
197        }
198
199        ohci_suspend(e);
200
201        return (0);
202}
203
204static int
205ohci_lpc32xx_resume(device_t self)
206{
207        ohci_softc_t *e = device_get_softc(self);
208
209        ohci_resume(e);
210
211        bus_generic_resume(self);
212
213        return (0);
214}
215
216
217static int
218ohci_lpc32xx_probe(device_t self)
219{
220  device_set_desc(self, "LPC3250 OHCI controller");
221
222        return (0);
223}
224
225static int
226ohci_lpc32xx_detach(device_t self)
227{
228        ohci_softc_t *e = device_get_softc(self);
229
230        BSD_PRINTF("FIXME\n");
231
232        return (0);
233}
234
235static int
236ohci_lpc32xx_attach(device_t self)
237{
238        rtems_status_code sc = RTEMS_SUCCESSFUL;
239        ohci_softc_t *e = device_get_softc(self);
240        usb_error_t ue = USB_ERR_NORMAL_COMPLETION;
241        int eno = 0;
242
243        memset(e, 0, sizeof(*e));
244
245        /* Initialize some bus fields */
246        e->sc_bus.parent = self;
247        e->sc_bus.devices = e->sc_devices;
248        e->sc_bus.devices_max = OHCI_MAX_DEVICES;
249
250        /* Get all DMA memory */
251        if (usb_bus_mem_alloc_all(&e->sc_bus, USB_GET_DMA_TAG(self), &ohci_iterate_hw_softc)) {
252                return (ENOMEM);
253        }
254        e->sc_dev = self;
255
256        /* Child device */
257        e->sc_bus.bdev = device_add_child(self, "usbus", -1);
258        if (e->sc_bus.bdev == NULL) {
259                device_printf(self, "Could not add USB device\n");
260                goto error;
261        }
262        device_set_ivars(e->sc_bus.bdev, &e->sc_bus);
263  device_set_desc(e->sc_bus.bdev, "LPC3250 OHCI bus");
264        snprintf(e->sc_vendor, sizeof(e->sc_vendor), "NXP");
265
266        /* Register space */
267        e->sc_io_tag = 0U;
268  e->sc_io_hdl = OTGUSB_BASE;
269        e->sc_io_size = 0x5cU;
270
271        /* Enable USB PLL */
272  USBDIVCTRL = 0xc;
273  USBCTRL = USBCLK_SLAVE_HCLK_EN
274    | USBCLK_PC_BUS_KEEPER
275    | USBCLK_CLKEN1
276    | USBCLK_POWER_UP
277    | USBCLK_P_2
278    | USBCLK_N_1
279    | (191U << USBCLK_M_SHIFT);
280  while ((USBCTRL & USBCLK_PLL_LOCK) == 0) {
281                /* Wait */
282        }
283  USBCTRL |= USBCLK_CLKEN2;
284
285        /* Enable USB host and AHB clocks */
286  OTGCLKCTRL = 0x1c;
287  while ((OTGCLKSTAT & 0x1c) != 0x1c) {
288                /* Wait */
289        }
290
291        isp1301_configure();
292
293  USBCTRL |= USBCLK_HOST_NEED_CLK_EN;
294
295  OTGCLKCTRL = 0x1d;
296  while ((OTGCLKSTAT & 0x1d) != 0x1d) {
297                /* Wait */
298        }
299
300        /* Set OTG Status and Control Register */
301  OTGSTAT = 0x1;
302
303        isp1301_vbus_on();
304
305        /* Install interrupt handler */
306        sc = rtems_interrupt_server_handler_install(
307                RTEMS_ID_NONE,
308    IRQ_USB_HOST,
309                "USB",
310                RTEMS_INTERRUPT_UNIQUE,
311                (rtems_interrupt_handler) ohci_interrupt,
312                e
313        );
314        BSD_ASSERT_SC(sc);
315
316        /* OHCI intitialization */
317        ue = ohci_init(e);
318        if (ue != USB_ERR_NORMAL_COMPLETION) {
319                goto error;
320        }
321
322        /* Probe and attach child */
323        eno = device_probe_and_attach(e->sc_bus.bdev);
324        if (eno != 0) {
325                goto error;
326        }
327
328        return (0);
329
330error:
331        ohci_lpc32xx_detach(self);
332        return (ENXIO);
333}
334
335static device_method_t ohci_methods [] = {
336        /* Device interface */
337        DEVMETHOD(device_probe, ohci_lpc32xx_probe),
338        DEVMETHOD(device_attach, ohci_lpc32xx_attach),
339        DEVMETHOD(device_detach, ohci_lpc32xx_detach),
340        DEVMETHOD(device_suspend, ohci_lpc32xx_suspend),
341        DEVMETHOD(device_resume, ohci_lpc32xx_resume),
342        DEVMETHOD(device_shutdown, bus_generic_shutdown),
343
344        /* Bus interface */
345        DEVMETHOD(bus_print_child, bus_generic_print_child),
346
347        {0, 0}
348};
349
350static driver_t ohci_driver = {
351        .name = "ohci",
352        .methods = ohci_methods,
353        .size = sizeof(struct ohci_softc)
354};
355
356static devclass_t ohci_devclass;
357
358DRIVER_MODULE(ohci, nexus, ohci_driver, ohci_devclass, 0, 0);
359MODULE_DEPEND(ohci, usb, 1, 1, 1);
360
361#endif /* LIBBSP_ARM_LPC3250_BSP_H */
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