source: rtems-docs/user/bsps/bsps-microblaze.rst @ 3859073

Last change on this file since 3859073 was 3859073, checked in by Chris Johns <chrisj@…>, on 08/03/22 at 04:22:20

versions: Update microblaze, powerpc, riscv and x86_64

Updates #4695

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1.. SPDX-License-Identifier: CC-BY-SA-4.0
2
3.. Copyright (C) 2018 embedded brains GmbH
4.. Copyright (C) 2022 On-Line Applications Research Corporation (OAR)
5
6microblaze (MicroBlaze)
7***********************
8
9KCU105 QEMU
10===========
11
12The basic hardware initialization is performed by the BSP. This BSP supports the
13QEMU emulated Xilinx AXI Interrupt Controller v4.1.
14
15Boot via ELF
16------------
17
18The executable image is booted by QEMU in ELF format.
19
20Clock Driver
21------------
22
23The clock driver supports the QEMU emulated Xilinx AXI Timer v2.0. It is
24implemented as a simple downcounter.
25
26Console Driver
27--------------
28
29The console driver supports the QEMU emulated Xilinx AXI UART Lite v2.0. It is
30initialized to a baud rate of 115200.
31
32Network Driver
33--------------
34
35Support for networking is provided by the libbsd library. Network interface
36configuration is extracted from the device tree binary which, by default, is
37in `<bsp/microblaze-dtb.h> <https://git.rtems.org/rtems/tree/bsps/microblaze/microblaze_fpga/include/bsp/microblaze-dtb.h>`_.
38The device tree source for the default device tree is at `dts/system.dts <https://git.rtems.org/rtems/tree/bsps/microblaze/microblaze_fpga/dts/system.dts>`_.
39
40To replace the default device tree with your own, assuming ``my_device_tree.dts``
41is the name of your device tree source file, first you must convert your device
42tree to .dtb format.
43
44.. code-block:: none
45
46  $ dtc -I dts -O dtb my_device_tree.dts > my_device_tree.dtb
47
48The device tree blob, ``my_device_tree.dtb``, can now be converted to a C file.
49The name ``system_dtb`` is significant as it is the name expected by the BSP.
50
51.. code-block:: none
52
53  $ rtems-bin2c -C -A 8 -N system_dtb my_device_tree.dtb my_dtb
54
55The ``BSP_MICROBLAZE_FPGA_DTB_HEADER_PATH`` BSP configuration option can then be
56set to the path of the resulting source file, ``my_dtb.c``, in the waf INI file
57to include it in the BSP build.
58
59.. code-block:: none
60
61  BSP_MICROBLAZE_FPGA_DTB_HEADER_PATH = /path/to/my_dtb.c
62
63
64Running Executables
65-------------------
66
67A ``.dtb`` (device tree blob) file should be provided to QEMU via the ``-hw-dtb``
68option. In the example command below, the device tree blob comes from the Xilinx
69Petalinux KCU105 MicroBlaze BSP (https://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/embedded-design-tools.html).
70
71Executables generated by this BSP can be run using the following command:
72
73.. code-block:: none
74
75  $ qemu-system-microblazeel -no-reboot -nographic -M microblaze-fdt-plnx -m 256 \
76   -serial mon:stdio -display none -hw-dtb system.dtb -kernel example.exe
77
78Debugging with QEMU
79-------------------
80
81To debug an application, add the option ``-s`` to make QEMU listen for GDB
82connections on port 1234. Add the ``-S`` option to also stop execution until
83a connection is made.
84
85For example, to debug the hello sample and break at ``Init``, first start QEMU.
86
87.. code-block:: none
88
89  $ qemu-system-microblazeel -no-reboot -nographic -M microblaze-fdt-plnx -m 256 \
90   -serial mon:stdio -display none -hw-dtb system.dtb -kernel \
91   build/microblaze/kcu105_qemu/testsuites/samples/hello.exe -s -S
92
93Then start GDB and connect to QEMU.
94
95.. code-block:: none
96
97  $ microblaze-rtems@rtems-ver-major@-gdb build/microblaze/kcu105_qemu/testsuites/samples/hello.exe
98  (gdb) target remote localhost:1234
99  (gdb) break Init
100  (gdb) continue
101
102KCU105
103======
104
105The basic hardware initialization is performed by the BSP. This BSP supports the
106Xilinx AXI Interrupt Controller v4.1.
107
108This BSP was tested using the Xilinx Kintex UltraScale FPGA KCU105 board
109configured with the default Petalinux KCU105 MicroBlaze BSP. The defaults may
110need to be adjusted using BSP configuration options to match the memory layout
111and configuration of your board.
112
113Clock Driver
114------------
115
116The clock driver supports the Xilinx AXI Timer v2.0. It is implemented as a
117simple downcounter.
118
119Console Driver
120--------------
121
122The console driver supports the Xilinx AXI UART Lite v2.0.
123
124Debugging
125---------
126
127The following debugging procedure was used for debugging RTEMS applications
128running on the Xilinx KCU105 board using GDB.
129
130First send an FPGA bitstream to the board using OpenOCD.
131
132.. code-block:: none
133
134  $ openocd -f board/kcu105.cfg -c "init; pld load 0 system.bit; exit"
135
136After the board has been programmed, start the Vivado ``hw_server`` application
137to serve as the debug server. Leave it running in the background for the rest of
138the process.
139
140.. code-block:: none
141
142  $ tools/Xilinx/Vivado/2020.2/bin/hw_server
143
144With the debug server running, connect to the debug server with GDB, load the
145application, and debug as usual. By default the GDB server listens on port 3002.
146
147.. code-block:: none
148
149  $ microblaze-rtems@rtems-ver-major@-gdb example.exe
150  (gdb) target extended-remote localhost:3002
151  (gdb) load
152  (gdb) break Init
153  (gdb) continue
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