source: rtems-docs/user/bsps/bsps-arm.rst @ e52906b

5
Last change on this file since e52906b was e52906b, checked in by Sebastian Huber <sebastian.huber@…>, on 01/09/19 at 15:14:06

Simplify SPDX-License-Identifier comment

  • Property mode set to 100644
File size: 4.6 KB
Line 
1.. SPDX-License-Identifier: CC-BY-SA-4.0
2
3.. Copyright (C) 2017, 2018 embedded brains GmbH
4
5arm (ARM)
6*********
7
8altera-cyclone-v
9================
10
11TODO.
12
13atsam
14=====
15
16TODO.
17
18beagle
19======
20
21TODO.
22
23csb336
24======
25
26TODO.
27
28csb337
29======
30
31TODO.
32
33edb7312
34=======
35
36TODO.
37
38gdbarmsim
39=========
40
41TODO.
42
43gumstix
44=======
45
46TODO.
47
48imx (NXP i.MX)
49==============
50
51This BSP offers only one variant, the `imx7`.  This variant supports the i.MX
527Dual processor.  The basic hardware initialization is not performed by the
53BSP.  A boot loader with device tree support must be used to start the BSP,
54e.g. U-Boot.
55
56Build Configuration Options
57---------------------------
58
59The following options are available at the configure command line.
60
61``BSP_PRESS_KEY_FOR_RESET``
62    If defined to a non-zero value, then print a message and wait until pressed
63    before resetting board when application terminates.
64
65``BSP_RESET_BOARD_AT_EXIT``
66    If defined to a non-zero value, then reset the board when the application
67    terminates.
68
69``BSP_PRINT_EXCEPTION_CONTEXT``
70    If defined to a non-zero value, then print the exception context when an
71    unexpected exception occurs.
72
73``BSP_FDT_BLOB_SIZE_MAX``
74    The maximum size of the device tree blob in bytes (default is 262144).
75
76``CONSOLE_USE_INTERRUPTS``
77    Use interrupt driven mode for console devices (enabled by default).
78
79``IMX_CCM_IPG_HZ``
80   The IPG clock frequency in Hz (default is 67500000).
81
82``IMX_CCM_UART_HZ``
83   The UART clock frequency in Hz (default is 24000000).
84
85``IMX_CCM_AHB_HZ``
86   The AHB clock frequency in Hz (default is 135000000).
87
88Boot via U-Boot
89---------------
90
91The application executable file (ELF file) must be converted to an U-Boot
92image.  Use the following commands:
93
94::
95
96    arm-rtems5-objcopy -O binary app.exe app.bin
97    gzip -9 -f -c app.bin > app.bin.gz
98    mkimage -A arm -O linux -T kernel -a 0x80200000 -e 0x80200000 -n RTEMS -d app.bin.gz app.img
99
100Use the following U-Boot commands to boot an application via TFTP download:
101
102::
103
104    tftpboot ${loadaddr} app.img && run loadfdt && bootm ${loadaddr} - ${fdt_addr} ; reset
105
106Clock Driver
107------------
108
109The clock driver uses the `ARMv7-AR Generic Timer`.
110
111Console Driver
112--------------
113
114The console driver supports up to seven on-chip UARTs.  They are initialized
115according to the device tree.  The console driver does not configure the pins.
116
117I2C Driver
118----------
119
120I2C drivers are registered by the ``i2c_bus_register_imx()`` function.  The I2C
121driver does not configure the pins.
122
123.. code-block:: c
124
125    #include <assert.h>
126    #include <bsp.h>
127
128    void i2c_init(void)
129    {
130      int rv;
131
132      rv = i2c_bus_register_imx("/dev/i2c-0", "i2c0");
133      assert(rv == 0);
134    }
135
136SPI Driver
137----------
138
139SPI drivers are registered by the ``spi_bus_register_imx()`` function.  The SPI
140driver configures the pins according to the ``pinctrl-0`` device tree property.
141SPI transfers with a continuous chip select are limited by the FIFO size of 64
142bytes.  The driver has no DMA support.
143
144.. code-block:: c
145
146    #include <assert.h>
147    #include <bsp.h>
148
149    void spi_init(void)
150    {
151      int rv;
152
153      rv =  spi_bus_register_imx("/dev/spi-0", "spi0");
154      assert(rv == 0);
155    }
156
157Network Interface Driver
158------------------------
159
160The network interface driver is provided by the `libbsd`.  It is initialized
161according to the device tree.  It supports checksum offload and interrupt
162coalescing.  IPv6 transmit checksum offload is not implemented.  The interrupt
163coalescing uses the MII/GMII clocks and can be controlled by the following
164system controls:
165
166 * ``dev.ffec.<unit>.int_coal.rx_time``
167 * ``dev.ffec.<unit>.int_coal.rx_count``
168 * ``dev.ffec.<unit>.int_coal.tx_time``
169 * ``dev.ffec.<unit>.int_coal.tx_count``
170
171A value of zero for the time or count disables the interrupt coalescing in the
172corresponding direction.
173
174MMC/SDCard Driver
175-----------------
176
177The MMC/SDCard driver (uSDHC module) is provided by the `libbsd`.  It is
178initialized according to the device tree.  Pin re-configuration according to
179the serial clock frequency is not supported.  Data transfers are extremely
180slow.  This is probably due to the missing DMA support.
181
182Caveats
183-------
184
185The clock and pin configuration support is quite rudimentary and mostly relies
186on the boot loader.  For a pin group configuration see
187``imx_iomux_configure_pins()``.  There is no power management support.
188
189lm3s69xx
190========
191
192TODO.
193
194lpc176x
195=======
196
197TODO.
198
199lpc24xx
200=======
201
202TODO.
203
204lpc32xx
205=======
206
207TODO.
208
209raspberrypi
210===========
211
212TODO.
213
214realview-pbx-a9
215===============
216
217TODO.
218
219rtl22xx
220=======
221
222TODO.
223
224smdk2410
225========
226
227TODO.
228
229stm32f4
230=======
231
232TODO.
233
234tms570
235======
236
237TODO.
238
239xilinx-zynq
240===========
241
242TODO.
Note: See TracBrowser for help on using the repository browser.