source: rtems-docs/user/bsps/bsps-arm.rst @ 05d066a

5
Last change on this file since 05d066a was 05d066a, checked in by Sebastian Huber <sebastian.huber@…>, on 01/09/19 at 12:58:14

user: Add TODO entries for all BSP families

Update #3464.

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1.. comment SPDX-License-Identifier: CC-BY-SA-4.0
2.. comment Copyright (c) 2017, 2018 embedded brains GmbH
3
4arm (ARM)
5*********
6
7altera-cyclone-v
8================
9
10TODO.
11
12atsam
13=====
14
15TODO.
16
17beagle
18======
19
20TODO.
21
22csb336
23======
24
25TODO.
26
27csb337
28======
29
30TODO.
31
32edb7312
33=======
34
35TODO.
36
37gdbarmsim
38=========
39
40TODO.
41
42gumstix
43=======
44
45TODO.
46
47imx (NXP i.MX)
48==============
49
50This BSP offers only one variant, the `imx7`.  This variant supports the i.MX
517Dual processor.  The basic hardware initialization is not performed by the
52BSP.  A boot loader with device tree support must be used to start the BSP,
53e.g. U-Boot.
54
55Build Configuration Options
56---------------------------
57
58The following options are available at the configure command line.
59
60``BSP_PRESS_KEY_FOR_RESET``
61    If defined to a non-zero value, then print a message and wait until pressed
62    before resetting board when application terminates.
63
64``BSP_RESET_BOARD_AT_EXIT``
65    If defined to a non-zero value, then reset the board when the application
66    terminates.
67
68``BSP_PRINT_EXCEPTION_CONTEXT``
69    If defined to a non-zero value, then print the exception context when an
70    unexpected exception occurs.
71
72``BSP_FDT_BLOB_SIZE_MAX``
73    The maximum size of the device tree blob in bytes (default is 262144).
74
75``CONSOLE_USE_INTERRUPTS``
76    Use interrupt driven mode for console devices (enabled by default).
77
78``IMX_CCM_IPG_HZ``
79   The IPG clock frequency in Hz (default is 67500000).
80
81``IMX_CCM_UART_HZ``
82   The UART clock frequency in Hz (default is 24000000).
83
84``IMX_CCM_AHB_HZ``
85   The AHB clock frequency in Hz (default is 135000000).
86
87Boot via U-Boot
88---------------
89
90The application executable file (ELF file) must be converted to an U-Boot
91image.  Use the following commands:
92
93::
94
95    arm-rtems5-objcopy -O binary app.exe app.bin
96    gzip -9 -f -c app.bin > app.bin.gz
97    mkimage -A arm -O linux -T kernel -a 0x80200000 -e 0x80200000 -n RTEMS -d app.bin.gz app.img
98
99Use the following U-Boot commands to boot an application via TFTP download:
100
101::
102
103    tftpboot ${loadaddr} app.img && run loadfdt && bootm ${loadaddr} - ${fdt_addr} ; reset
104
105Clock Driver
106------------
107
108The clock driver uses the `ARMv7-AR Generic Timer`.
109
110Console Driver
111--------------
112
113The console driver supports up to seven on-chip UARTs.  They are initialized
114according to the device tree.  The console driver does not configure the pins.
115
116I2C Driver
117----------
118
119I2C drivers are registered by the ``i2c_bus_register_imx()`` function.  The I2C
120driver does not configure the pins.
121
122.. code-block:: c
123
124    #include <assert.h>
125    #include <bsp.h>
126
127    void i2c_init(void)
128    {
129      int rv;
130
131      rv = i2c_bus_register_imx("/dev/i2c-0", "i2c0");
132      assert(rv == 0);
133    }
134
135SPI Driver
136----------
137
138SPI drivers are registered by the ``spi_bus_register_imx()`` function.  The SPI
139driver configures the pins according to the ``pinctrl-0`` device tree property.
140SPI transfers with a continuous chip select are limited by the FIFO size of 64
141bytes.  The driver has no DMA support.
142
143.. code-block:: c
144
145    #include <assert.h>
146    #include <bsp.h>
147
148    void spi_init(void)
149    {
150      int rv;
151
152      rv =  spi_bus_register_imx("/dev/spi-0", "spi0");
153      assert(rv == 0);
154    }
155
156Network Interface Driver
157------------------------
158
159The network interface driver is provided by the `libbsd`.  It is initialized
160according to the device tree.  It supports checksum offload and interrupt
161coalescing.  IPv6 transmit checksum offload is not implemented.  The interrupt
162coalescing uses the MII/GMII clocks and can be controlled by the following
163system controls:
164
165 * ``dev.ffec.<unit>.int_coal.rx_time``
166 * ``dev.ffec.<unit>.int_coal.rx_count``
167 * ``dev.ffec.<unit>.int_coal.tx_time``
168 * ``dev.ffec.<unit>.int_coal.tx_count``
169
170A value of zero for the time or count disables the interrupt coalescing in the
171corresponding direction.
172
173MMC/SDCard Driver
174-----------------
175
176The MMC/SDCard driver (uSDHC module) is provided by the `libbsd`.  It is
177initialized according to the device tree.  Pin re-configuration according to
178the serial clock frequency is not supported.  Data transfers are extremely
179slow.  This is probably due to the missing DMA support.
180
181Caveats
182-------
183
184The clock and pin configuration support is quite rudimentary and mostly relies
185on the boot loader.  For a pin group configuration see
186``imx_iomux_configure_pins()``.  There is no power management support.
187
188lm3s69xx
189========
190
191TODO.
192
193lpc176x
194=======
195
196TODO.
197
198lpc24xx
199=======
200
201TODO.
202
203lpc32xx
204=======
205
206TODO.
207
208raspberrypi
209===========
210
211TODO.
212
213realview-pbx-a9
214===============
215
216TODO.
217
218rtl22xx
219=======
220
221TODO.
222
223smdk2410
224========
225
226TODO.
227
228stm32f4
229=======
230
231TODO.
232
233tms570
234======
235
236TODO.
237
238xilinx-zynq
239===========
240
241TODO.
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