1 | .. SPDX-License-Identifier: CC-BY-SA-4.0 |
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2 | |
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3 | .. Copyright (C) 2020 embedded brains GmbH |
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4 | .. Copyright (C) 2020 Christian Mauderer |
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5 | |
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6 | imxrt (NXP i.MXRT) |
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7 | ================== |
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8 | |
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9 | This BSP offers only one variant, the `imxrt1052`. This variant supports the |
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10 | i.MXRT 1052 processor on a IMXRT1050-EVKB (tested with rev A1). You can also |
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11 | configure it to work with custom boards. |
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12 | |
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13 | NOTE: The IMXRT1050-EVKB has an backlight controller that must not be enabled |
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14 | without load. Make sure to either attach a load, disable it by software or |
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15 | disable it by removing the 0-Ohm resistor on it's input. |
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16 | |
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17 | Build Configuration Options |
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18 | --------------------------- |
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19 | |
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20 | Please see the documentation of the `IMXRT_*` and `BSP_*` configuration options |
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21 | for that. You can generate a default set of options with:: |
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22 | |
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23 | ./waf bsp_defaults --rtems-bsps=arm/imxrt1052 > config.ini |
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24 | |
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25 | Boot Process |
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26 | ------------ |
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27 | |
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28 | There are two possible boot processes supported: |
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29 | |
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30 | 1) The ROM code loads a configuration from HyperFlash (connected to FlexSPI), |
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31 | does some initialization (based on device configuration data (DCD)) and then |
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32 | starts the application. This is the default case. `linkcmds.flexspi` is used |
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33 | for this case. |
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34 | |
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35 | 2) Some custom bootloader does the basic initialization, loads the application |
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36 | to SDRAM and starts it from there. Select the `linkcmds.sdram` for this. |
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37 | |
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38 | For programming the HyperFlash in case 1, you can use the on board debugger |
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39 | integrated into the IMXRT1050-EVKB. You can generate a flash image out of a |
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40 | compiled RTEMS application with for example:: |
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41 | |
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42 | arm-rtems6-objcopy -O binary build/arm/imxrt1052/testsuites/samples/hello.exe hello.bin |
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43 | |
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44 | Then just copy the generated binary to the mass storage provided by the |
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45 | debugger. Wait a bit till the mass storage vanishes and re-appears. After that, |
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46 | reset the board and the newly programmed application will start. |
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47 | |
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48 | NOTE: It seems that there is a bug on at least some of the on board debuggers. |
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49 | They can't write more than 1MB to the HyperFlash. If your application is bigger |
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50 | than that (like quite some of the applications in libbsd), you should use an |
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51 | external debugger or find some alternative programming method. |
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52 | |
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53 | For debugging: Create a special application with a `while(true)` loop at end of |
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54 | `bsp_start_hook_1`. Load that application into flash. Then remove the loop |
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55 | again, build your BSP for SDRAM and use a debugger to load the application into |
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56 | SDRAM after the BSP started from flash did the basic initialization. |
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57 | |
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58 | Flash Image |
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59 | ----------- |
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60 | |
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61 | For booting from a HyperFlash (or other storage connected to FlexSPI), the ROM |
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62 | code of the i.MXRT first reads some special flash header information from a |
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63 | fixed location of the connected flash device. This consists of the Image vector |
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64 | table (IVT), Boot data and Device configuration data (DCD). |
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65 | |
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66 | In RTEMS, these flash headers are generated using some C-structures. If you use |
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67 | a board other than the IMXRT1050-EVKB, those structures have to be adapted. To |
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68 | do that re-define the following variables in your application (you only need the |
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69 | ones that need different values): |
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70 | |
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71 | .. code-block:: c |
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72 | |
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73 | #include <bsp/flash-headers.h> |
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74 | const uint8_t imxrt_dcd_data[] = |
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75 | { /* Your DCD data here */ }; |
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76 | const ivt imxrt_image_vector_table = |
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77 | { /* Your IVT here */ }; |
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78 | const BOOT_DATA_T imxrt_boot_data = |
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79 | { /* Your boot data here */ }; |
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80 | const flexspi_nor_config_t imxrt_flexspi_config = |
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81 | { /* Your FlexSPI config here */ }; |
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82 | |
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83 | You can find the default definitions in `bsps/arm/imxrt/start/flash-*.c`. Take a |
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84 | look at the `i.MX RT1050 Processor Reference Manual, Rev. 4, 12/2019` chapter |
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85 | `9.7 Program image` for details about the contents. |
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86 | |
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87 | FDT |
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88 | --- |
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89 | |
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90 | The BSP uses a FDT based initialization. The FDT is linked into the application. |
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91 | You can find the default FDT used in the BSP in |
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92 | `bsps/arm/imxrt/dts/imxrt1050-evkb.dts`. The FDT is split up into two parts. The |
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93 | core part is put into an `dtsi` file and is installed together with normal |
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94 | headers into `${PREFIX}/arm-rtems6/imxrt1052/lib/include`. You can use that to |
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95 | create your own device tree based on that. Basically use something like:: |
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96 | |
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97 | /dts-v1/; |
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98 | |
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99 | #include <imxrt/imxrt1050-pinfunc.h> |
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100 | #include <imxrt/imxrt1050.dtsi> |
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101 | |
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102 | &lpuart1 { |
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103 | pinctrl-0 = <&pinctrl_lpuart1>; |
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104 | status = "okay"; |
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105 | }; |
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106 | |
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107 | &chosen { |
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108 | stdout-path = &lpuart1; |
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109 | }; |
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110 | |
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111 | /* put your further devices here */ |
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112 | |
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113 | &iomuxc { |
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114 | pinctrl_lpuart1: lpuart1grp { |
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115 | fsl,pins = < |
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116 | IMXRT_PAD_GPIO_AD_B0_12__LPUART1_TX 0x8 |
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117 | IMXRT_PAD_GPIO_AD_B0_13__LPUART1_RX 0x13000 |
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118 | >; |
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119 | }; |
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120 | |
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121 | /* put your further pinctrl groups here */ |
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122 | }; |
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123 | |
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124 | You can then convert your FDT into a C file with (replace `YOUR.dts` and similar |
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125 | with your FDT source names):: |
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126 | |
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127 | sh> arm-rtems6-cpp -P -x assembler-with-cpp \ |
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128 | -I ${PREFIX}/arm-rtems6/imxrt1052/lib/include \ |
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129 | -include "YOUR.dts" /dev/null | \ |
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130 | dtc -O dtb -o "YOUR.dtb" -b 0 -p 64 |
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131 | sh> rtems-bin2c -C -N imxrt_dtb "YOUR.dtb" "YOUR.c" |
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132 | |
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133 | Make sure that your new C file is compiled and linked into the application. |
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134 | |
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135 | PLL Settings |
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136 | ------------ |
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137 | |
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138 | The commercial variant of the i.MXRT1052 on the evaluation board allows a clock |
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139 | up to 600MHz for the ARM core. For some industrial variants only up to 528MHz |
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140 | are specified. To make it possible to adapt to these variants the application |
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141 | can overwrite the following constant: |
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142 | |
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143 | .. code-block:: c |
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144 | |
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145 | #include "fsl_clock_config.h" |
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146 | |
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147 | const clock_arm_pll_config_t armPllConfig_BOARD_BootClockRUN = { |
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148 | .loopDivider = 100, |
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149 | .src = 0, |
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150 | }; |
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151 | |
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152 | With the default configuration of a 24MHz oscillator, the loopDivider has to be |
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153 | 88 for the 528MHz. |
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154 | |
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155 | Clock Driver |
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156 | ------------ |
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157 | |
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158 | The clock driver uses the generic `ARMv7-M Clock`. |
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159 | |
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160 | IOMUX |
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161 | ----- |
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162 | |
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163 | The i.MXRT IOMUXC is initialized based on the FDT. For that, the `pinctrl-0` |
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164 | fields of all devices with a status of `ok` or `okay` will be parsed. |
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165 | |
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166 | Console Driver |
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167 | -------------- |
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168 | |
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169 | LPUART drivers are registered based on the FDT. The special `rtems,path` |
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170 | attribute defines where the device file for the console is created. |
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171 | |
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172 | The `stdout-path` in the `chosen` node determines which LPUART is used for the |
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173 | console. |
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174 | |
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175 | I2C Driver |
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176 | ---------- |
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177 | |
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178 | I2C drivers are registered based on the FDT. The special `rtems,path` attribute |
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179 | defines where the device file for the I2C bus is created. |
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180 | |
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181 | Limitations: |
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182 | |
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183 | * Only basic I2C is implemented. This is mostly a driver limitation and not a |
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184 | hardware one. |
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185 | |
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186 | SPI Driver |
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187 | ---------- |
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188 | |
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189 | SPI drivers are registered based on the FDT. The special `rtems,path` attribute |
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190 | defines where the device file for the SPI bus is created. |
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191 | |
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192 | Note that the SPI-pins on the evaluation board are shared with the SD card. |
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193 | Populate R278, R279, R280, R281 on the IMXRT1050-EVKB (Rev A) to use the SPI |
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194 | pins on the Arduino connector. |
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195 | |
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196 | Limitations: |
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197 | |
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198 | * Only a basic SPI driver is implemented. This is mostly a driver limitation and |
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199 | not a hardware one. |
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200 | |
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201 | Network Interface Driver |
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202 | ------------------------ |
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203 | |
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204 | The network interface driver is provided by the `libbsd`. It is initialized |
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205 | according to the device tree. |
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206 | |
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207 | Note on the hardware: The i.MXRT1050 EVKB maybe has a wrong termination of the |
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208 | RXP, RXN, TXP and TXN lines. The resistors R126 through R129 maybe shouldn't be |
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209 | populated because the used KSZ8081RNB already has an internal termination. |
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210 | Ethernet does work on short distance anyway. But keep it in mind in case you |
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211 | have problems. Source: |
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212 | https://community.nxp.com/t5/i-MX-RT/Error-in-IMXRT1050-EVKB-and-1060-schematic-ethernet/m-p/835540#M1587 |
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213 | |
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214 | NXP SDK files |
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215 | ------------- |
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216 | |
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217 | A lot of peripherals are currently not yet supported by RTEMS drivers. The NXP |
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218 | SDK offers drivers for these. For convenience, the BSP compiles the drivers from |
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219 | the SDK. But please note that they are not tested and maybe won't work out of |
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220 | the box. Everything that works with interrupts most likely needs some special |
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221 | treatment. |
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222 | |
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223 | Caveats |
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224 | ------- |
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225 | |
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226 | The clock configuration support is quite rudimentary. The same is true for |
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227 | SDRAM. It mostly relies on the DCD and on a static clock configuration that is |
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228 | taken from the NXP SDK example projects. |
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229 | |
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230 | The MPU settings are currently quite permissive. |
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231 | |
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232 | There is no power management support. |
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