source: rtems-docs/networking/dec_21140.rst @ bc37517

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1DEC 21140 Driver
2################
3
4DEC 21240 Driver Introduction
5=============================
6
7.. COMMENT: XXX add back in cross reference to list of boards.
8
9One aim of our project is to port RTEMS on a standard PowerPC platform.  To
10achieve it, we have chosen a Motorola MCP750 board. This board includes an
11Ethernet controller based on a DEC21140 chip. Because RTEMS has a TCP/IP stack,
12we will have to develop the DEC21140 related ethernet driver for the PowerPC
13port of RTEMS. As this controller is able to support 100Mbps network and as
14there is a lot of PCI card using this DEC chip, we have decided to first
15implement this driver on an Intel PC386 target to provide a solution for using
16RTEMS on PC with the 100Mbps network and then to port this code on PowerPC in a
17second phase.
18
19The aim of this document is to give some PCI board generalities and to explain
20the software architecture of the RTEMS driver. Finally, we will see what will
21be done for ChorusOs and Netboot environment .
22
23Document Revision History
24=========================
25
26*Current release*:
27
28- Current applicable release is 1.0.
29
30*Existing releases*:
31
32- 1.0 : Released the 10/02/98. First version of this document.
33
34- 0.1 : First draft of this document
35
36*Planned releases*:
37
38- None planned today.
39
40DEC21140 PCI Board Generalities
41===============================
42
43.. COMMENT: XXX add crossreference to PCI Register Figure
44
45This chapter describes rapidely the PCI interface of this Ethernet controller.
46The board we have chosen for our PC386 implementation is a D-Link DFE-500TX.
47This is a dual-speed 10/100Mbps Ethernet PCI adapter with a DEC21140AF chip.
48Like other PCI devices, this board has a PCI device's header containing some
49required configuration registers, as shown in the PCI Register Figure.  By
50reading or writing these registers, a driver can obtain information about the
51type of the board, the interrupt it uses, the mapping of the chip specific
52registers, ...
53
54On Intel target, the chip specific registers can be accessed via 2 methods :
55I/O port access or PCI address mapped access. We have chosen to implement the
56PCI address access to obtain compatible source code to the port the driver on a
57PowerPC target.
58
59.. COMMENT: PCI Device's Configuration Header Space Format
60
61
62.. image:: images/PCIreg.jpg
63
64
65.. COMMENT: XXX add crossreference to PCI Register Figure
66
67On RTEMS, a PCI API exists. We have used it to configure the board. After
68initializing this PCI module via the ``pci_initialize()`` function, we try to
69detect the DEC21140 based ethernet board. This board is characterized by its
70Vendor ID (0x1011) and its Device ID (0x0009). We give these arguments to
71the``pcib_find_by_deviceid`` function which returns , if the device is present,
72a pointer to the configuration header space (see PCI Registers Fgure). Once
73this operation performed, the driver is able to extract the information it
74needs to configure the board internal registers, like the interrupt line, the
75base address,... The board internal registers will not be detailled here. You
76can find them in *DIGITAL Semiconductor 21140A PCI Fast Ethernet LAN Controller
77- Hardware Reference Manual*.
78
79.. COMMENT: fix citation
80
81RTEMS Driver Software Architecture
82==================================
83
84In this chapter will see the initialization phase, how the controller uses the
85host memory and the 2 threads launched at the initialization time.
86
87Initialization phase
88--------------------
89
90The DEC21140 Ethernet driver keeps the same software architecture than the
91other RTEMS ethernet drivers. The only API the programmer can use is the
92``rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *config)``
93function which detects the board and initializes the associated data structure
94(with registers base address, entry points to low-level initialization
95function,...), if the board is found.
96
97Once the attach function executed, the driver initializes the DEC chip. Then
98the driver connects an interrupt handler to the interrupt line driven by the
99Ethernet controller (the only interrupt which will be treated is the receive
100interrupt) and launches 2 threads : a receiver thread and a transmitter
101thread. Then the driver waits for incoming frame to give to the protocol stack
102or outcoming frame to send on the physical link.
103
104Memory Buffer
105-------------
106
107.. COMMENT: XXX add cross reference to Problem
108
109This DEC chip uses the host memory to store the incoming Ethernet frames and
110the descriptor of these frames. We have chosen to use 7 receive buffers and 1
111transmit buffer to optimize memory allocation due to cache and paging problem
112that will be explained in the section *Encountered Problems*.
113
114To reference these buffers to the DEC chip we use a buffer descriptors
115ring. The descriptor structure is defined in the Buffer Descriptor Figure.
116Each descriptor can reference one or two memory buffers. We choose to use only
117one buffer of 1520 bytes per descriptor.
118
119The difference between a receive and a transmit buffer descriptor is located in
120the status and control bits fields. We do not give details here, please refer
121to the DEC21140 Hardware Manual.
122
123.. COMMENT: Buffer Descriptor
124
125
126.. image:: images/recvbd.jpg
127
128
129Receiver Thread
130---------------
131
132This thread is event driven. Each time a DEC PCI board interrupt occurs, the
133handler checks if this is a receive interrupt and send an event "reception" to
134the receiver thread which looks into the entire buffer descriptors ring the
135ones that contain a valid incoming frame (bit OWN=0 means descriptor belongs to
136host processor). Each valid incoming ethernet frame is sent to the protocol
137stack and the buffer descriptor is given back to the DEC board (the host
138processor reset bit OWN, which means descriptor belongs to 21140).
139
140Transmitter Thread
141------------------
142
143This thread is also event driven. Each time an Ethernet frame is put in the
144transmit queue, an event is sent to the transmit thread, which empty the queue
145by sending each outcoming frame. Because we use only one transmit buffer, we
146are sure that the frame is well-sent before sending the next.
147
148Encountered Problems
149====================
150
151On Intel PC386 target, we were faced with a problem of memory cache management.
152Because the DEC chip uses the host memory to store the incoming frame and
153because the DEC21140 configuration registers are mapped into the PCI address
154space, we must ensure that the data read (or written) by the host processor are
155the ones written (or read) by the DEC21140 device in the host memory and not
156old data stored in the cache memory. Therefore, we had to provide a way to
157manage the cache. This module is described in the document *RTEMS Cache
158Management For Intel*. On Intel, the memory region cache management is
159available only if the paging unit is enabled.  We have used this paging
160mechanism, with 4Kb page. All the buffers allocated to store the incoming or
161outcoming frames, buffer descriptor and also the PCI address space of the DEC
162board are located in a memory space with cache disable.
163
164Concerning the buffers and their descriptors, we have tried to optimize the
165memory space in term of allocated page. One buffer has 1520 bytes, one
166descriptor has 16 bytes. We have 7 receive buffers and 1 transmit buffer, and
167for each, 1 descriptor : (7+1)*(1520+16) = 12288 bytes = 12Kb = 3 entire
168pages. This allows not to lose too much memory or not to disable cache memory
169for a page which contains other data than buffer, which could decrease
170performance.
171
172Netboot DEC driver
173==================
174
175We use Netboot tool to load our development from a server to the target via an
176ethernet network. Currently, this tool does not support the DEC board. We plan
177to port the DEC driver for the Netboot tool.
178
179But concerning the port of the DEC driver into Netboot, we are faced with a
180problem: in RTEMS environment, the DEC driver is interrupt or event driven, in
181Netboot environment, it must be used in polling mode. It means that we will
182have to re-write some mechanisms of this driver.
183
184List of Ethernet cards using the DEC chip
185=========================================
186
187Many Ethernet adapter cards use the Tulip chip. Here is a non exhaustive list
188of adapters which support this driver :
189
190- Accton EtherDuo PCI.
191
192- Accton EN1207 All three media types supported.
193
194- Adaptec ANA6911/TX 21140-AC.
195
196- Cogent EM110 21140-A with DP83840 N-Way MII transceiver.
197
198- Cogent EM400 EM100 with 4 21140 100mbps-only ports + PCI Bridge.
199
200- Danpex EN-9400P3.
201
202- D-Link DFE500-Tx 21140-A with DP83840 transceiver.
203
204- Kingston EtherX KNE100TX 21140AE.
205
206- Netgear FX310 TX 10/100 21140AE.
207
208- SMC EtherPower10/100 With DEC21140 and 68836 SYM transceiver.
209
210- SMC EtherPower10/100 With DEC21140-AC and DP83840 MII transceiver.
211  Note: The EtherPower II uses the EPIC chip, which requires a different driver.
212
213- Surecom EP-320X DEC 21140.
214
215- Thomas Conrad TC5048.
216
217- Znyx ZX345 21140-A, usually with the DP83840 N-Way MII transciever. Some ZX345
218  cards made in 1996 have an ICS 1890 transciver instead.
219
220- ZNYX ZX348 Two 21140-A chips using ICS 1890 transcievers and either a 21052
221  or 21152 bridge. Early versions used National 83840 transcievers, but later
222  versions are depopulated ZX346 boards.
223
224- ZNYX ZX351 21140 chip with a Broadcom 100BaseT4 transciever.
225
226Our DEC driver has not been tested with all these cards, only with the D-Link
227DFE500-TX.
228
229- DEC21140 Hardware Manual DIGITAL, DIGITAL Semiconductor 21140A PCI Fast
230  Ethernet LAN Controller - Hardware Reference Manual**.
231
232- *[99.TA.0021.M.ER]Emmanuel Raguet,*RTEMS Cache Management For Intel**.
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