[489740f] | 1 | .. comment SPDX-License-Identifier: CC-BY-SA-4.0 |
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| 2 | |
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[d755cbd] | 3 | .. COMMENT: COPYRIGHT (c) 1988-2002. |
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| 4 | .. COMMENT: On-Line Applications Research Corporation (OAR). |
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| 5 | .. COMMENT: All rights reserved. |
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| 6 | |
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[f233256] | 7 | Preface |
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[6916004] | 8 | ******* |
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[f233256] | 9 | |
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| 10 | The Real Time Executive for Multiprocessor Systems (RTEMS) is designed to be |
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| 11 | portable across multiple processor architectures. However, the nature of |
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| 12 | real-time systems makes it essential that the application designer understand |
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| 13 | certain processor dependent implementation details. These processor |
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| 14 | dependencies include calling convention, board support package issues, |
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| 15 | interrupt processing, exact RTEMS memory requirements, performance data, header |
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| 16 | files, and the assembly language interface to the executive. |
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| 17 | |
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| 18 | Each architecture represents a CPU family and usually there are a wide variety |
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| 19 | of CPU models within it. These models share a common Instruction Set |
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| 20 | Architecture (ISA) which often varies based upon some well-defined rules. |
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| 21 | There are often multiple implementations of the ISA and these may be from one |
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| 22 | or multiple vendors. |
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| 23 | |
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| 24 | On top of variations in the ISA, there may also be variations which occur when |
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| 25 | a CPU core implementation is combined with a set of peripherals to form a |
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| 26 | system on chip. For example, there are many ARM CPU models from numerous |
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| 27 | semiconductor vendors and a wide variety of peripherals. But at the ISA level, |
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| 28 | they share a common compatibility. |
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| 29 | |
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| 30 | RTEMS depends upon this core similarity across the CPU models and leverages |
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| 31 | that to minimize the source code that is specific to any particular CPU core |
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| 32 | implementation or CPU model. |
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| 33 | |
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| 34 | This manual is separate and distinct from the RTEMS Porting Guide. That manual |
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| 35 | is a guide on porting RTEMS to a new architecture. This manual is focused on |
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| 36 | the more mundane CPU architecture specific issues that may impact application |
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| 37 | development. For example, if you need to write a subroutine in assembly |
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| 38 | language, it is critical to understand the calling conventions for the target |
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| 39 | architecture. |
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| 40 | |
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| 41 | The first chapter in this manual describes these issues in general terms. In a |
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| 42 | sense, it is posing the questions one should be aware may need to be answered |
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| 43 | and understood when porting an RTEMS application to a new architecture. Each |
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| 44 | subsequent chapter gives the answers to those questions for a particular CPU |
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| 45 | architecture. |
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