source: rtems-docs/cpu-supplement/preface.rst @ 67195aa

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[489740f]1.. comment SPDX-License-Identifier: CC-BY-SA-4.0
[d755cbd]3.. COMMENT: COPYRIGHT (c) 1988-2002.
4.. COMMENT: On-Line Applications Research Corporation (OAR).
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10The Real Time Executive for Multiprocessor Systems (RTEMS) is designed to be
11portable across multiple processor architectures.  However, the nature of
12real-time systems makes it essential that the application designer understand
13certain processor dependent implementation details.  These processor
14dependencies include calling convention, board support package issues,
15interrupt processing, exact RTEMS memory requirements, performance data, header
16files, and the assembly language interface to the executive.
18Each architecture represents a CPU family and usually there are a wide variety
19of CPU models within it.  These models share a common Instruction Set
20Architecture (ISA) which often varies based upon some well-defined rules.
21There are often multiple implementations of the ISA and these may be from one
22or multiple vendors.
24On top of variations in the ISA, there may also be variations which occur when
25a CPU core implementation is combined with a set of peripherals to form a
26system on chip.  For example, there are many ARM CPU models from numerous
27semiconductor vendors and a wide variety of peripherals.  But at the ISA level,
28they share a common compatibility.
30RTEMS depends upon this core similarity across the CPU models and leverages
31that to minimize the source code that is specific to any particular CPU core
32implementation or CPU model.
34This manual is separate and distinct from the RTEMS Porting Guide.  That manual
35is a guide on porting RTEMS to a new architecture.  This manual is focused on
36the more mundane CPU architecture specific issues that may impact application
37development.  For example, if you need to write a subroutine in assembly
38language, it is critical to understand the calling conventions for the target
41The first chapter in this manual describes these issues in general terms.  In a
42sense, it is posing the questions one should be aware may need to be answered
43and understood when porting an RTEMS application to a new architecture.  Each
44subsequent chapter gives the answers to those questions for a particular CPU
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