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1Interrupt Manager
2#################
3
4Introduction
5============
6
7Any real-time executive must provide a mechanism for
8quick response to externally generated interrupts to satisfy the
9critical time constraints of the application.  The interrupt
10manager provides this mechanism for RTEMS.  This manager permits
11quick interrupt response times by providing the critical ability
12to alter task execution which allows a task to be preempted upon
13exit from an ISR.  The interrupt manager includes the following
14directive:
15
16- ``rtems_interrupt_catch`` - Establish an ISR
17
18- ``rtems_interrupt_disable`` - Disable Interrupts
19
20- ``rtems_interrupt_enable`` - Enable Interrupts
21
22- ``rtems_interrupt_flash`` - Flash Interrupt
23
24- ``rtems_interrupt_local_disable`` - Disable Interrupts on Current Processor
25
26- ``rtems_interrupt_local_enable`` - Enable Interrupts on Current Processor
27
28- ``rtems_interrupt_lock_initialize`` - Initialize an ISR Lock
29
30- ``rtems_interrupt_lock_acquire`` - Acquire an ISR Lock
31
32- ``rtems_interrupt_lock_release`` - Release an ISR Lock
33
34- ``rtems_interrupt_lock_acquire_isr`` - Acquire an ISR Lock from ISR
35
36- ``rtems_interrupt_lock_release_isr`` - Release an ISR Lock from ISR
37
38- ``rtems_interrupt_is_in_progress`` - Is an ISR in Progress
39
40Background
41==========
42
43Processing an Interrupt
44-----------------------
45.. index:: interrupt processing
46
47The interrupt manager allows the application to
48connect a function to a hardware interrupt vector.  When an
49interrupt occurs, the processor will automatically vector to
50RTEMS.  RTEMS saves and restores all registers which are not
51preserved by the normal C calling convention
52for the target
53processor and invokes the user's ISR.  The user's ISR is
54responsible for processing the interrupt, clearing the interrupt
55if necessary, and device specific manipulation... index:: rtems_vector_number
56
57The ``rtems_interrupt_catch``
58directive connects a procedure to
59an interrupt vector.  The vector number is managed using
60the ``rtems_vector_number`` data type.
61
62The interrupt service routine is assumed
63to abide by these conventions and have a prototype similar to
64the following:.. index:: rtems_isr
65
66.. code:: c
67
68    rtems_isr user_isr(
69    rtems_vector_number vector
70    );
71
72The vector number argument is provided by RTEMS to
73allow the application to identify the interrupt source.  This
74could be used to allow a single routine to service interrupts
75from multiple instances of the same device.  For example, a
76single routine could service interrupts from multiple serial
77ports and use the vector number to identify which port requires
78servicing.
79
80To minimize the masking of lower or equal priority
81level interrupts, the ISR should perform the minimum actions
82required to service the interrupt.  Other non-essential actions
83should be handled by application tasks.  Once the user's ISR has
84completed, it returns control to the RTEMS interrupt manager
85which will perform task dispatching and restore the registers
86saved before the ISR was invoked.
87
88The RTEMS interrupt manager guarantees that proper
89task scheduling and dispatching are performed at the conclusion
90of an ISR.  A system call made by the ISR may have readied a
91task of higher priority than the interrupted task.  Therefore,
92when the ISR completes, the postponed dispatch processing must
93be performed.  No dispatch processing is performed as part of
94directives which have been invoked by an ISR.
95
96Applications must adhere to the following rule if
97proper task scheduling and dispatching is to be performed:
98
99- ** *The interrupt manager must be used for all ISRs which
100  may be interrupted by the highest priority ISR which invokes an
101  RTEMS directive.*
102
103Consider a processor which allows a numerically low
104interrupt level to interrupt a numerically greater interrupt
105level.  In this example, if an RTEMS directive is used in a
106level 4 ISR, then all ISRs which execute at levels 0 through 4
107must use the interrupt manager.
108
109Interrupts are nested whenever an interrupt occurs
110during the execution of another ISR.  RTEMS supports efficient
111interrupt nesting by allowing the nested ISRs to terminate
112without performing any dispatch processing.  Only when the
113outermost ISR terminates will the postponed dispatching occur.
114
115RTEMS Interrupt Levels
116----------------------
117.. index:: interrupt levels
118
119Many processors support multiple interrupt levels or
120priorities.  The exact number of interrupt levels is processor
121dependent.  RTEMS internally supports 256 interrupt levels which
122are mapped to the processor's interrupt levels.  For specific
123information on the mapping between RTEMS and the target
124processor's interrupt levels, refer to the Interrupt Processing
125chapter of the Applications Supplement document for a specific
126target processor.
127
128Disabling of Interrupts by RTEMS
129--------------------------------
130.. index:: disabling interrupts
131
132During the execution of directive calls, critical
133sections of code may be executed.  When these sections are
134encountered, RTEMS disables all maskable interrupts before the
135execution of the section and restores them to the previous level
136upon completion of the section.  RTEMS has been optimized to
137ensure that interrupts are disabled for a minimum length of
138time.  The maximum length of time interrupts are disabled by
139RTEMS is processor dependent and is detailed in the Timing
140Specification chapter of the Applications Supplement document
141for a specific target processor.
142
143Non-maskable interrupts (NMI) cannot be disabled, and
144ISRs which execute at this level MUST NEVER issue RTEMS system
145calls.  If a directive is invoked, unpredictable results may
146occur due to the inability of RTEMS to protect its critical
147sections.  However, ISRs that make no system calls may safely
148execute as non-maskable interrupts.
149
150Operations
151==========
152
153Establishing an ISR
154-------------------
155
156The ``rtems_interrupt_catch``
157directive establishes an ISR for
158the system.  The address of the ISR and its associated CPU
159vector number are specified to this directive.  This directive
160installs the RTEMS interrupt wrapper in the processor's
161Interrupt Vector Table and the address of the user's ISR in the
162RTEMS' Vector Table.  This directive returns the previous
163contents of the specified vector in the RTEMS' Vector Table.
164
165Directives Allowed from an ISR
166------------------------------
167
168Using the interrupt manager ensures that RTEMS knows
169when a directive is being called from an ISR.  The ISR may then
170use system calls to synchronize itself with an application task.
171The synchronization may involve messages, events or signals
172being passed by the ISR to the desired task.  Directives invoked
173by an ISR must operate only on objects which reside on the local
174node.  The following is a list of RTEMS system calls that may be
175made from an ISR:
176
177- Task Management
178  Although it is acceptable to operate on the RTEMS_SELF task (e.g.
179  the currently executing task), while in an ISR, this will refer
180  to the interrupted task.  Most of the time, it is an application
181  implementation error to use RTEMS_SELF from an ISR.
182  - rtems_task_suspend
183  - rtems_task_resume
184
185- Interrupt Management
186  - rtems_interrupt_enable
187  - rtems_interrupt_disable
188  - rtems_interrupt_flash
189  - rtems_interrupt_lock_acquire
190  - rtems_interrupt_lock_release
191  - rtems_interrupt_lock_acquire_isr
192  - rtems_interrupt_lock_release_isr
193  - rtems_interrupt_is_in_progress
194  - rtems_interrupt_catch
195
196- Clock Management
197  - rtems_clock_set
198  - rtems_clock_get
199  - rtems_clock_get_tod
200  - rtems_clock_get_tod_timeval
201  - rtems_clock_get_seconds_since_epoch
202  - rtems_clock_get_ticks_per_second
203  - rtems_clock_get_ticks_since_boot
204  - rtems_clock_get_uptime
205  - rtems_clock_set_nanoseconds_extension
206  - rtems_clock_tick
207
208- Timer Management
209  - rtems_timer_cancel
210  - rtems_timer_reset
211  - rtems_timer_fire_after
212  - rtems_timer_fire_when
213  - rtems_timer_server_fire_after
214  - rtems_timer_server_fire_when
215
216- Event Management
217  - rtems_event_send
218  - rtems_event_system_send
219  - rtems_event_transient_send
220
221- Semaphore Management
222  - rtems_semaphore_release
223
224- Message Management
225  - rtems_message_queue_send
226  - rtems_message_queue_urgent
227
228- Signal Management
229  - rtems_signal_send
230
231- Dual-Ported Memory Management
232  - rtems_port_external_to_internal
233  - rtems_port_internal_to_external
234
235- IO Management
236  The following services are safe to call from an ISR if and only if
237  the device driver service invoked is also safe.  The IO Manager itself
238  is safe but the invoked driver entry point may or may not be.
239  - rtems_io_initialize
240  - rtems_io_open
241  - rtems_io_close
242  - rtems_io_read
243  - rtems_io_write
244  - rtems_io_control
245
246- Fatal Error Management
247  - rtems_fatal
248  - rtems_fatal_error_occurred
249
250- Multiprocessing
251  - rtems_multiprocessing_announce
252
253Directives
254==========
255
256This section details the interrupt manager's
257directives.  A subsection is dedicated to each of this manager's
258directives and describes the calling sequence, related
259constants, usage, and status codes.
260
261INTERRUPT_CATCH - Establish an ISR
262----------------------------------
263.. index:: establish an ISR
264.. index:: install an ISR
265
266**CALLING SEQUENCE:**
267
268.. index:: rtems_interrupt_catch
269
270.. code:: c
271
272    rtems_status_code rtems_interrupt_catch(
273    rtems_isr_entry      new_isr_handler,
274    rtems_vector_number  vector,
275    rtems_isr_entry     \*old_isr_handler
276    );
277
278**DIRECTIVE STATUS CODES:**
279
280``RTEMS_SUCCESSFUL`` - ISR established successfully
281``RTEMS_INVALID_NUMBER`` - illegal vector number
282``RTEMS_INVALID_ADDRESS`` - illegal ISR entry point or invalid ``old_isr_handler``
283
284**DESCRIPTION:**
285
286This directive establishes an interrupt service
287routine (ISR) for the specified interrupt vector number.  The``new_isr_handler`` parameter specifies the entry point of the ISR.
288The entry point of the previous ISR for the specified vector is
289returned in ``old_isr_handler``.
290
291To release an interrupt vector, pass the old handler's address obtained
292when the vector was first capture.
293
294**NOTES:**
295
296This directive will not cause the calling task to be preempted.
297
298INTERRUPT_DISABLE - Disable Interrupts
299--------------------------------------
300.. index:: disable interrupts
301
302**CALLING SEQUENCE:**
303
304.. index:: rtems_interrupt_disable
305
306.. code:: c
307
308    void rtems_interrupt_disable(
309    rtems_interrupt_level  level
310    );
311    /* this is implemented as a macro and sets level as a side-effect \*/
312
313**DIRECTIVE STATUS CODES:**
314
315NONE
316
317**DESCRIPTION:**
318
319This directive disables all maskable interrupts and returns
320the previous ``level``.  A later invocation of the``rtems_interrupt_enable`` directive should be used to
321restore the interrupt level.
322
323**NOTES:**
324
325This directive will not cause the calling task to be preempted.
326
327*This directive is implemented as a macro which modifies the ``level``
328parameter.*
329
330This directive is only available on uni-processor configurations.  The
331directive ``rtems_interrupt_local_disable`` is available on all
332configurations.
333
334INTERRUPT_ENABLE - Enable Interrupts
335------------------------------------
336.. index:: enable interrupts
337
338**CALLING SEQUENCE:**
339
340.. index:: rtems_interrupt_enable
341
342.. code:: c
343
344    void rtems_interrupt_enable(
345    rtems_interrupt_level  level
346    );
347
348**DIRECTIVE STATUS CODES:**
349
350NONE
351
352**DESCRIPTION:**
353
354This directive enables maskable interrupts to the ``level``
355which was returned by a previous call to``rtems_interrupt_disable``.
356Immediately prior to invoking this directive, maskable interrupts should
357be disabled by a call to ``rtems_interrupt_disable``
358and will be enabled when this directive returns to the caller.
359
360**NOTES:**
361
362This directive will not cause the calling task to be preempted.
363
364This directive is only available on uni-processor configurations.  The
365directive ``rtems_interrupt_local_enable`` is available on all
366configurations.
367
368INTERRUPT_FLASH - Flash Interrupts
369----------------------------------
370.. index:: flash interrupts
371
372**CALLING SEQUENCE:**
373
374.. index:: rtems_interrupt_flash
375
376.. code:: c
377
378    void rtems_interrupt_flash(
379    rtems_interrupt_level level
380    );
381
382**DIRECTIVE STATUS CODES:**
383
384NONE
385
386**DESCRIPTION:**
387
388This directive temporarily enables maskable interrupts to the ``level``
389which was returned by a previous call to``rtems_interrupt_disable``.
390Immediately prior to invoking this directive, maskable interrupts should
391be disabled by a call to ``rtems_interrupt_disable``
392and will be redisabled when this directive returns to the caller.
393
394**NOTES:**
395
396This directive will not cause the calling task to be preempted.
397
398This directive is only available on uni-processor configurations.  The
399directives ``rtems_interrupt_local_disable`` and``rtems_interrupt_local_enable`` is available on all
400configurations.
401
402INTERRUPT_LOCAL_DISABLE - Disable Interrupts on Current Processor
403-----------------------------------------------------------------
404.. index:: disable interrupts
405
406**CALLING SEQUENCE:**
407
408.. index:: rtems_interrupt_local_disable
409
410.. code:: c
411
412    void rtems_interrupt_local_disable(
413    rtems_interrupt_level  level
414    );
415    /* this is implemented as a macro and sets level as a side-effect \*/
416
417**DIRECTIVE STATUS CODES:**
418
419NONE
420
421**DESCRIPTION:**
422
423This directive disables all maskable interrupts and returns
424the previous ``level``.  A later invocation of the``rtems_interrupt_local_enable`` directive should be used to
425restore the interrupt level.
426
427**NOTES:**
428
429This directive will not cause the calling task to be preempted.
430
431*This directive is implemented as a macro which modifies the ``level``
432parameter.*
433
434On SMP configurations this will not ensure system wide mutual exclusion.  Use
435interrupt locks instead.
436
437INTERRUPT_LOCAL_ENABLE - Enable Interrupts on Current Processor
438---------------------------------------------------------------
439.. index:: enable interrupts
440
441**CALLING SEQUENCE:**
442
443.. index:: rtems_interrupt_local_enable
444
445.. code:: c
446
447    void rtems_interrupt_local_enable(
448    rtems_interrupt_level  level
449    );
450
451**DIRECTIVE STATUS CODES:**
452
453NONE
454
455**DESCRIPTION:**
456
457This directive enables maskable interrupts to the ``level``
458which was returned by a previous call to``rtems_interrupt_local_disable``.
459Immediately prior to invoking this directive, maskable interrupts should
460be disabled by a call to ``rtems_interrupt_local_disable``
461and will be enabled when this directive returns to the caller.
462
463**NOTES:**
464
465This directive will not cause the calling task to be preempted.
466
467INTERRUPT_LOCK_INITIALIZE - Initialize an ISR Lock
468--------------------------------------------------
469
470**CALLING SEQUENCE:**
471
472.. index:: rtems_interrupt_lock_initialize
473
474.. code:: c
475
476    void rtems_interrupt_lock_initialize(
477    rtems_interrupt_lock \*lock
478    );
479
480**DIRECTIVE STATUS CODES:**
481
482NONE
483
484**DESCRIPTION:**
485
486Initializes an interrupt lock.
487
488**NOTES:**
489
490Concurrent initialization leads to unpredictable results.
491
492INTERRUPT_LOCK_ACQUIRE - Acquire an ISR Lock
493--------------------------------------------
494
495**CALLING SEQUENCE:**
496
497.. index:: rtems_interrupt_lock_acquire
498
499.. code:: c
500
501    void rtems_interrupt_lock_acquire(
502    rtems_interrupt_lock \*lock,
503    rtems_interrupt_level level
504    );
505
506**DIRECTIVE STATUS CODES:**
507
508NONE
509
510**DESCRIPTION:**
511
512Interrupts will be disabled.  On SMP configurations this directive acquires a
513SMP lock.
514
515**NOTES:**
516
517This directive will not cause the calling thread to be preempted.  This
518directive can be used in thread and interrupt context.
519
520INTERRUPT_LOCK_RELEASE - Release an ISR Lock
521--------------------------------------------
522
523**CALLING SEQUENCE:**
524
525.. index:: rtems_interrupt_lock_release
526
527.. code:: c
528
529    void rtems_interrupt_lock_release(
530    rtems_interrupt_lock \*lock,
531    rtems_interrupt_level level
532    );
533
534**DIRECTIVE STATUS CODES:**
535
536NONE
537
538**DESCRIPTION:**
539
540The interrupt status will be restored.  On SMP configurations this directive
541releases a SMP lock.
542
543**NOTES:**
544
545This directive will not cause the calling thread to be preempted.  This
546directive can be used in thread and interrupt context.
547
548INTERRUPT_LOCK_ACQUIRE_ISR - Acquire an ISR Lock from ISR
549---------------------------------------------------------
550
551**CALLING SEQUENCE:**
552
553.. index:: rtems_interrupt_lock_acquire_isr
554
555.. code:: c
556
557    void rtems_interrupt_lock_acquire_isr(
558    rtems_interrupt_lock \*lock,
559    rtems_interrupt_level level
560    );
561
562**DIRECTIVE STATUS CODES:**
563
564NONE
565
566**DESCRIPTION:**
567
568The interrupt status will remain unchanged.  On SMP configurations this
569directive acquires a SMP lock.
570
571In case the corresponding interrupt service routine can be interrupted by
572higher priority interrupts and these interrupts enter the critical section
573protected by this lock, then the result is unpredictable.
574
575**NOTES:**
576
577This directive should be called from the corresponding interrupt service
578routine.
579
580INTERRUPT_LOCK_RELEASE_ISR - Release an ISR Lock from ISR
581---------------------------------------------------------
582
583**CALLING SEQUENCE:**
584
585.. index:: rtems_interrupt_lock_release_isr
586
587.. code:: c
588
589    void rtems_interrupt_lock_release_isr(
590    rtems_interrupt_lock \*lock,
591    rtems_interrupt_level level
592    );
593
594**DIRECTIVE STATUS CODES:**
595
596NONE
597
598**DESCRIPTION:**
599
600The interrupt status will remain unchanged.  On SMP configurations this
601directive releases a SMP lock.
602
603**NOTES:**
604
605This directive should be called from the corresponding interrupt service
606routine.
607
608INTERRUPT_IS_IN_PROGRESS - Is an ISR in Progress
609------------------------------------------------
610.. index:: is interrupt in progress
611
612**CALLING SEQUENCE:**
613
614.. index:: rtems_interrupt_is_in_progress
615
616.. code:: c
617
618    bool rtems_interrupt_is_in_progress( void );
619
620**DIRECTIVE STATUS CODES:**
621
622NONE
623
624**DESCRIPTION:**
625
626This directive returns ``TRUE`` if the processor is currently
627servicing an interrupt and ``FALSE`` otherwise.  A return value
628of ``TRUE`` indicates that the caller is an interrupt service
629routine, *NOT* a task.  The directives available to an interrupt
630service routine are restricted.
631
632**NOTES:**
633
634This directive will not cause the calling task to be preempted.
635
636.. COMMENT: COPYRIGHT (c) 1988-2008
637
638.. COMMENT: On-Line Applications Research Corporation (OAR).
639
640.. COMMENT: All rights reserved.
641
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