1 | .. COMMENT: COPYRIGHT (c) 1988-2008. |
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2 | .. COMMENT: On-Line Applications Research Corporation (OAR). |
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3 | .. COMMENT: All rights reserved. |
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4 | |
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5 | Interrupt Manager |
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6 | ################# |
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7 | |
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8 | Introduction |
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9 | ============ |
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10 | |
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11 | Any real-time executive must provide a mechanism for quick response to |
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12 | externally generated interrupts to satisfy the critical time constraints of the |
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13 | application. The interrupt manager provides this mechanism for RTEMS. This |
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14 | manager permits quick interrupt response times by providing the critical |
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15 | ability to alter task execution which allows a task to be preempted upon exit |
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16 | from an ISR. The interrupt manager includes the following directive: |
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17 | |
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18 | - rtems_interrupt_catch_ - Establish an ISR |
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19 | |
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20 | - rtems_interrupt_disable_ - Disable Interrupts |
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21 | |
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22 | - rtems_interrupt_enable_ - Enable Interrupts |
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23 | |
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24 | - rtems_interrupt_flash_ - Flash Interrupt |
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25 | |
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26 | - rtems_interrupt_local_disable_ - Disable Interrupts on Current Processor |
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27 | |
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28 | - rtems_interrupt_local_enable_ - Enable Interrupts on Current Processor |
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29 | |
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30 | - rtems_interrupt_lock_initialize_ - Initialize an ISR Lock |
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31 | |
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32 | - rtems_interrupt_lock_acquire_ - Acquire an ISR Lock |
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33 | |
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34 | - rtems_interrupt_lock_release_ - Release an ISR Lock |
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35 | |
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36 | - rtems_interrupt_lock_acquire_isr_ - Acquire an ISR Lock from ISR |
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37 | |
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38 | - rtems_interrupt_lock_release_isr_ - Release an ISR Lock from ISR |
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39 | |
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40 | - rtems_interrupt_is_in_progress_ - Is an ISR in Progress |
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41 | |
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42 | Background |
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43 | ========== |
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44 | |
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45 | Processing an Interrupt |
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46 | ----------------------- |
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47 | .. index:: interrupt processing |
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48 | |
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49 | The interrupt manager allows the application to connect a function to a |
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50 | hardware interrupt vector. When an interrupt occurs, the processor will |
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51 | automatically vector to RTEMS. RTEMS saves and restores all registers which |
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52 | are not preserved by the normal C calling convention for the target processor |
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53 | and invokes the user's ISR. The user's ISR is responsible for processing the |
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54 | interrupt, clearing the interrupt if necessary, and device specific |
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55 | manipulation. |
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56 | |
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57 | .. index:: rtems_vector_number |
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58 | |
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59 | The ``rtems_interrupt_catch`` directive connects a procedure to an interrupt |
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60 | vector. The vector number is managed using the ``rtems_vector_number`` data |
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61 | type. |
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62 | |
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63 | The interrupt service routine is assumed to abide by these conventions and have |
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64 | a prototype similar to the following: |
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65 | |
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66 | .. index:: rtems_isr |
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67 | |
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68 | .. code:: c |
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69 | |
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70 | rtems_isr user_isr( |
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71 | rtems_vector_number vector |
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72 | ); |
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73 | |
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74 | The vector number argument is provided by RTEMS to allow the application to |
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75 | identify the interrupt source. This could be used to allow a single routine to |
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76 | service interrupts from multiple instances of the same device. For example, a |
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77 | single routine could service interrupts from multiple serial ports and use the |
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78 | vector number to identify which port requires servicing. |
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79 | |
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80 | To minimize the masking of lower or equal priority level interrupts, the ISR |
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81 | should perform the minimum actions required to service the interrupt. Other |
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82 | non-essential actions should be handled by application tasks. Once the user's |
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83 | ISR has completed, it returns control to the RTEMS interrupt manager which will |
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84 | perform task dispatching and restore the registers saved before the ISR was |
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85 | invoked. |
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86 | |
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87 | The RTEMS interrupt manager guarantees that proper task scheduling and |
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88 | dispatching are performed at the conclusion of an ISR. A system call made by |
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89 | the ISR may have readied a task of higher priority than the interrupted task. |
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90 | Therefore, when the ISR completes, the postponed dispatch processing must be |
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91 | performed. No dispatch processing is performed as part of directives which |
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92 | have been invoked by an ISR. |
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93 | |
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94 | Applications must adhere to the following rule if proper task scheduling and |
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95 | dispatching is to be performed: |
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96 | |
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97 | .. note:: |
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98 | |
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99 | The interrupt manager must be used for all ISRs which may be interrupted by |
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100 | the highest priority ISR which invokes an RTEMS directive. |
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101 | |
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102 | Consider a processor which allows a numerically low interrupt level to |
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103 | interrupt a numerically greater interrupt level. In this example, if an RTEMS |
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104 | directive is used in a level 4 ISR, then all ISRs which execute at levels 0 |
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105 | through 4 must use the interrupt manager. |
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106 | |
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107 | Interrupts are nested whenever an interrupt occurs during the execution of |
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108 | another ISR. RTEMS supports efficient interrupt nesting by allowing the nested |
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109 | ISRs to terminate without performing any dispatch processing. Only when the |
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110 | outermost ISR terminates will the postponed dispatching occur. |
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111 | |
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112 | RTEMS Interrupt Levels |
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113 | ---------------------- |
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114 | .. index:: interrupt levels |
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115 | |
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116 | Many processors support multiple interrupt levels or priorities. The exact |
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117 | number of interrupt levels is processor dependent. RTEMS internally supports |
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118 | 256 interrupt levels which are mapped to the processor's interrupt levels. For |
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119 | specific information on the mapping between RTEMS and the target processor's |
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120 | interrupt levels, refer to the Interrupt Processing chapter of the Applications |
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121 | Supplement document for a specific target processor. |
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122 | |
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123 | Disabling of Interrupts by RTEMS |
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124 | -------------------------------- |
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125 | .. index:: disabling interrupts |
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126 | |
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127 | During the execution of directive calls, critical sections of code may be |
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128 | executed. When these sections are encountered, RTEMS disables all maskable |
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129 | interrupts before the execution of the section and restores them to the |
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130 | previous level upon completion of the section. RTEMS has been optimized to |
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131 | ensure that interrupts are disabled for a minimum length of time. The maximum |
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132 | length of time interrupts are disabled by RTEMS is processor dependent and is |
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133 | detailed in the Timing Specification chapter of the Applications Supplement |
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134 | document for a specific target processor. |
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135 | |
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136 | Non-maskable interrupts (NMI) cannot be disabled, and ISRs which execute at |
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137 | this level MUST NEVER issue RTEMS system calls. If a directive is invoked, |
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138 | unpredictable results may occur due to the inability of RTEMS to protect its |
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139 | critical sections. However, ISRs that make no system calls may safely execute |
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140 | as non-maskable interrupts. |
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141 | |
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142 | Operations |
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143 | ========== |
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144 | |
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145 | Establishing an ISR |
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146 | ------------------- |
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147 | |
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148 | The ``rtems_interrupt_catch`` directive establishes an ISR for the system. The |
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149 | address of the ISR and its associated CPU vector number are specified to this |
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150 | directive. This directive installs the RTEMS interrupt wrapper in the |
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151 | processor's Interrupt Vector Table and the address of the user's ISR in the |
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152 | RTEMS' Vector Table. This directive returns the previous contents of the |
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153 | specified vector in the RTEMS' Vector Table. |
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154 | |
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155 | Directives Allowed from an ISR |
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156 | ------------------------------ |
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157 | |
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158 | Using the interrupt manager ensures that RTEMS knows when a directive is being |
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159 | called from an ISR. The ISR may then use system calls to synchronize itself |
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160 | with an application task. The synchronization may involve messages, events or |
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161 | signals being passed by the ISR to the desired task. Directives invoked by an |
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162 | ISR must operate only on objects which reside on the local node. The following |
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163 | is a list of RTEMS system calls that may be made from an ISR: |
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164 | |
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165 | - Task Management |
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166 | Although it is acceptable to operate on the RTEMS_SELF task (e.g. the |
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167 | currently executing task), while in an ISR, this will refer to the |
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168 | interrupted task. Most of the time, it is an application implementation |
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169 | error to use RTEMS_SELF from an ISR. |
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170 | - rtems_task_suspend |
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171 | - rtems_task_resume |
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172 | |
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173 | - Interrupt Management |
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174 | - rtems_interrupt_enable |
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175 | - rtems_interrupt_disable |
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176 | - rtems_interrupt_flash |
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177 | - rtems_interrupt_lock_acquire |
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178 | - rtems_interrupt_lock_release |
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179 | - rtems_interrupt_lock_acquire_isr |
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180 | - rtems_interrupt_lock_release_isr |
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181 | - rtems_interrupt_is_in_progress |
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182 | - rtems_interrupt_catch |
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183 | |
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184 | - Clock Management |
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185 | - rtems_clock_set |
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186 | - rtems_clock_get |
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187 | - rtems_clock_get_tod |
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188 | - rtems_clock_get_tod_timeval |
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189 | - rtems_clock_get_seconds_since_epoch |
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190 | - rtems_clock_get_ticks_per_second |
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191 | - rtems_clock_get_ticks_since_boot |
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192 | - rtems_clock_get_uptime |
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193 | - rtems_clock_set_nanoseconds_extension |
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194 | - rtems_clock_tick |
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195 | |
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196 | - Timer Management |
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197 | - rtems_timer_cancel |
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198 | - rtems_timer_reset |
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199 | - rtems_timer_fire_after |
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200 | - rtems_timer_fire_when |
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201 | - rtems_timer_server_fire_after |
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202 | - rtems_timer_server_fire_when |
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203 | |
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204 | - Event Management |
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205 | - rtems_event_send |
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206 | - rtems_event_system_send |
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207 | - rtems_event_transient_send |
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208 | |
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209 | - Semaphore Management |
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210 | - rtems_semaphore_release |
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211 | |
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212 | - Message Management |
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213 | - rtems_message_queue_send |
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214 | - rtems_message_queue_urgent |
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215 | |
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216 | - Signal Management |
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217 | - rtems_signal_send |
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218 | |
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219 | - Dual-Ported Memory Management |
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220 | - rtems_port_external_to_internal |
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221 | - rtems_port_internal_to_external |
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222 | |
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223 | - IO Management |
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224 | The following services are safe to call from an ISR if and only if |
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225 | the device driver service invoked is also safe. The IO Manager itself |
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226 | is safe but the invoked driver entry point may or may not be. |
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227 | - rtems_io_initialize |
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228 | - rtems_io_open |
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229 | - rtems_io_close |
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230 | - rtems_io_read |
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231 | - rtems_io_write |
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232 | - rtems_io_control |
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233 | |
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234 | - Fatal Error Management |
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235 | - rtems_fatal |
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236 | - rtems_fatal_error_occurred |
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237 | |
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238 | - Multiprocessing |
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239 | - rtems_multiprocessing_announce |
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240 | |
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241 | Directives |
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242 | ========== |
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243 | |
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244 | This section details the interrupt manager's directives. A subsection is |
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245 | dedicated to each of this manager's directives and describes the calling |
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246 | sequence, related constants, usage, and status codes. |
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247 | |
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248 | .. _rtems_interrupt_catch: |
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249 | |
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250 | INTERRUPT_CATCH - Establish an ISR |
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251 | ---------------------------------- |
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252 | .. index:: establish an ISR |
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253 | .. index:: install an ISR |
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254 | |
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255 | **CALLING SEQUENCE:** |
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256 | |
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257 | .. index:: rtems_interrupt_catch |
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258 | |
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259 | .. code:: c |
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260 | |
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261 | rtems_status_code rtems_interrupt_catch( |
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262 | rtems_isr_entry new_isr_handler, |
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263 | rtems_vector_number vector, |
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264 | rtems_isr_entry *old_isr_handler |
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265 | ); |
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266 | |
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267 | **DIRECTIVE STATUS CODES:** |
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268 | |
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269 | ``RTEMS_SUCCESSFUL`` |
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270 | ISR established successfully |
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271 | |
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272 | ``RTEMS_INVALID_NUMBER`` |
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273 | illegal vector number |
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274 | |
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275 | ``RTEMS_INVALID_ADDRESS`` |
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276 | illegal ISR entry point or invalid ``old_isr_handler`` |
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277 | |
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278 | **DESCRIPTION:** |
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279 | |
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280 | This directive establishes an interrupt service routine (ISR) for the specified |
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281 | interrupt vector number. The ``new_isr_handler`` parameter specifies the entry |
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282 | point of the ISR. The entry point of the previous ISR for the specified vector |
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283 | is returned in ``old_isr_handler``. |
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284 | |
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285 | To release an interrupt vector, pass the old handler's address obtained when |
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286 | the vector was first capture. |
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287 | |
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288 | **NOTES:** |
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289 | |
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290 | This directive will not cause the calling task to be preempted. |
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291 | |
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292 | .. _rtems_interrupt_disable: |
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293 | |
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294 | INTERRUPT_DISABLE - Disable Interrupts |
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295 | -------------------------------------- |
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296 | .. index:: disable interrupts |
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297 | |
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298 | **CALLING SEQUENCE:** |
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299 | |
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300 | .. index:: rtems_interrupt_disable |
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301 | |
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302 | .. code:: c |
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303 | |
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304 | void rtems_interrupt_disable( |
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305 | rtems_interrupt_level level |
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306 | ); |
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307 | |
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308 | **DIRECTIVE STATUS CODES:** |
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309 | |
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310 | NONE |
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311 | |
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312 | **DESCRIPTION:** |
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313 | |
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314 | .. sidebar:: *Macro* |
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315 | |
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316 | This directive is implemented as a macro which modifies the ``level`` |
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317 | parameter. |
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318 | |
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319 | This directive disables all maskable interrupts and returns the previous |
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320 | ``level``. A later invocation of the ``rtems_interrupt_enable`` directive |
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321 | should be used to restore the interrupt level. |
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322 | |
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323 | **NOTES:** |
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324 | |
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325 | This directive will not cause the calling task to be preempted. |
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326 | |
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327 | This directive is only available on uni-processor configurations. The |
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328 | directive ``rtems_interrupt_local_disable`` is available on all configurations. |
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329 | |
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330 | .. _rtems_interrupt_enable: |
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331 | |
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332 | INTERRUPT_ENABLE - Enable Interrupts |
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333 | ------------------------------------ |
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334 | .. index:: enable interrupts |
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335 | |
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336 | **CALLING SEQUENCE:** |
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337 | |
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338 | .. index:: rtems_interrupt_enable |
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339 | |
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340 | .. code:: c |
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341 | |
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342 | void rtems_interrupt_enable( |
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343 | rtems_interrupt_level level |
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344 | ); |
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345 | |
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346 | **DIRECTIVE STATUS CODES:** |
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347 | |
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348 | NONE |
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349 | |
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350 | **DESCRIPTION:** |
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351 | |
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352 | This directive enables maskable interrupts to the ``level`` which was returned |
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353 | by a previous call to ``rtems_interrupt_disable``. Immediately prior to |
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354 | invoking this directive, maskable interrupts should be disabled by a call to |
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355 | ``rtems_interrupt_disable`` and will be enabled when this directive returns to |
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356 | the caller. |
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357 | |
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358 | **NOTES:** |
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359 | |
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360 | This directive will not cause the calling task to be preempted. |
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361 | |
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362 | This directive is only available on uni-processor configurations. The |
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363 | directive ``rtems_interrupt_local_enable`` is available on all configurations. |
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364 | |
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365 | .. _rtems_interrupt_flash: |
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366 | |
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367 | INTERRUPT_FLASH - Flash Interrupts |
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368 | ---------------------------------- |
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369 | .. index:: flash interrupts |
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370 | |
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371 | **CALLING SEQUENCE:** |
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372 | |
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373 | .. index:: rtems_interrupt_flash |
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374 | |
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375 | .. code:: c |
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376 | |
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377 | void rtems_interrupt_flash( |
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378 | rtems_interrupt_level level |
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379 | ); |
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380 | |
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381 | **DIRECTIVE STATUS CODES:** |
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382 | |
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383 | NONE |
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384 | |
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385 | **DESCRIPTION:** |
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386 | |
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387 | This directive temporarily enables maskable interrupts to the ``level`` which |
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388 | was returned by a previous call to ``rtems_interrupt_disable``. Immediately |
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389 | prior to invoking this directive, maskable interrupts should be disabled by a |
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390 | call to ``rtems_interrupt_disable`` and will be redisabled when this directive |
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391 | returns to the caller. |
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392 | |
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393 | **NOTES:** |
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394 | |
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395 | This directive will not cause the calling task to be preempted. |
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396 | |
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397 | This directive is only available on uni-processor configurations. The |
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398 | directives ``rtems_interrupt_local_disable`` |
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399 | and``rtems_interrupt_local_enable`` is available on all configurations. |
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400 | |
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401 | .. _rtems_interrupt_local_disable: |
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402 | |
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403 | INTERRUPT_LOCAL_DISABLE - Disable Interrupts on Current Processor |
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404 | ----------------------------------------------------------------- |
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405 | .. index:: disable interrupts |
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406 | |
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407 | **CALLING SEQUENCE:** |
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408 | |
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409 | .. index:: rtems_interrupt_local_disable |
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410 | |
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411 | .. code:: c |
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412 | |
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413 | void rtems_interrupt_local_disable( |
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414 | rtems_interrupt_level level |
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415 | ); |
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416 | |
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417 | **DIRECTIVE STATUS CODES:** |
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418 | |
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419 | NONE |
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420 | |
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421 | **DESCRIPTION:** |
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422 | |
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423 | .. sidebar:: *Macro* |
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424 | |
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425 | This directive is implemented as a macro which modifies the ``level`` |
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426 | parameter. |
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427 | |
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428 | This directive disables all maskable interrupts and returns the previous |
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429 | ``level``. A later invocation of the ``rtems_interrupt_local_enable`` directive |
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430 | should be used to restore the interrupt level. |
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431 | |
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432 | **NOTES:** |
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433 | |
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434 | This directive will not cause the calling task to be preempted. |
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435 | |
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436 | On SMP configurations this will not ensure system wide mutual exclusion. Use |
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437 | interrupt locks instead. |
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438 | |
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439 | .. _rtems_interrupt_local_enable: |
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440 | |
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441 | INTERRUPT_LOCAL_ENABLE - Enable Interrupts on Current Processor |
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442 | --------------------------------------------------------------- |
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443 | .. index:: enable interrupts |
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444 | |
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445 | **CALLING SEQUENCE:** |
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446 | |
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447 | .. index:: rtems_interrupt_local_enable |
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448 | |
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449 | .. code:: c |
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450 | |
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451 | void rtems_interrupt_local_enable( |
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452 | rtems_interrupt_level level |
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453 | ); |
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454 | |
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455 | **DIRECTIVE STATUS CODES:** |
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456 | |
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457 | NONE |
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458 | |
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459 | **DESCRIPTION:** |
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460 | |
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461 | This directive enables maskable interrupts to the ``level`` which was returned |
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462 | by a previous call to ``rtems_interrupt_local_disable``. Immediately prior to |
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463 | invoking this directive, maskable interrupts should be disabled by a call to |
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464 | ``rtems_interrupt_local_disable`` and will be enabled when this directive |
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465 | returns to the caller. |
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466 | |
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467 | **NOTES:** |
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468 | |
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469 | This directive will not cause the calling task to be preempted. |
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470 | |
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471 | .. _rtems_interrupt_lock_initialize: |
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472 | |
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473 | INTERRUPT_LOCK_INITIALIZE - Initialize an ISR Lock |
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474 | -------------------------------------------------- |
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475 | |
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476 | **CALLING SEQUENCE:** |
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477 | |
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478 | .. index:: rtems_interrupt_lock_initialize |
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479 | |
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480 | .. code:: c |
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481 | |
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482 | void rtems_interrupt_lock_initialize( |
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483 | rtems_interrupt_lock *lock |
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484 | ); |
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485 | |
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486 | **DIRECTIVE STATUS CODES:** |
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487 | |
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488 | NONE |
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489 | |
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490 | **DESCRIPTION:** |
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491 | |
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492 | Initializes an interrupt lock. |
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493 | |
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494 | **NOTES:** |
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495 | |
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496 | Concurrent initialization leads to unpredictable results. |
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497 | |
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498 | .. _rtems_interrupt_lock_acquire: |
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499 | |
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500 | INTERRUPT_LOCK_ACQUIRE - Acquire an ISR Lock |
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501 | -------------------------------------------- |
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502 | |
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503 | **CALLING SEQUENCE:** |
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504 | |
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505 | .. index:: rtems_interrupt_lock_acquire |
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506 | |
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507 | .. code:: c |
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508 | |
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509 | void rtems_interrupt_lock_acquire( |
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510 | rtems_interrupt_lock *lock, |
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511 | rtems_interrupt_level level |
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512 | ); |
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513 | |
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514 | **DIRECTIVE STATUS CODES:** |
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515 | |
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516 | NONE |
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517 | |
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518 | **DESCRIPTION:** |
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519 | |
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520 | Interrupts will be disabled. On SMP configurations this directive acquires a |
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521 | SMP lock. |
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522 | |
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523 | **NOTES:** |
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524 | |
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525 | This directive will not cause the calling thread to be preempted. This |
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526 | directive can be used in thread and interrupt context. |
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527 | |
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528 | .. _rtems_interrupt_lock_release: |
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529 | |
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530 | INTERRUPT_LOCK_RELEASE - Release an ISR Lock |
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531 | -------------------------------------------- |
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532 | |
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533 | **CALLING SEQUENCE:** |
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534 | |
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535 | .. index:: rtems_interrupt_lock_release |
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536 | |
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537 | .. code:: c |
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538 | |
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539 | void rtems_interrupt_lock_release( |
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540 | rtems_interrupt_lock *lock, |
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541 | rtems_interrupt_level level |
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542 | ); |
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543 | |
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544 | **DIRECTIVE STATUS CODES:** |
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545 | |
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546 | NONE |
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547 | |
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548 | **DESCRIPTION:** |
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549 | |
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550 | The interrupt status will be restored. On SMP configurations this directive |
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551 | releases a SMP lock. |
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552 | |
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553 | **NOTES:** |
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554 | |
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555 | This directive will not cause the calling thread to be preempted. This |
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556 | directive can be used in thread and interrupt context. |
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557 | |
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558 | .. _rtems_interrupt_lock_acquire_isr: |
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559 | |
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560 | INTERRUPT_LOCK_ACQUIRE_ISR - Acquire an ISR Lock from ISR |
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561 | --------------------------------------------------------- |
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562 | |
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563 | **CALLING SEQUENCE:** |
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564 | |
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565 | .. index:: rtems_interrupt_lock_acquire_isr |
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566 | |
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567 | .. code:: c |
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568 | |
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569 | void rtems_interrupt_lock_acquire_isr( |
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570 | rtems_interrupt_lock *lock, |
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571 | rtems_interrupt_level level |
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572 | ); |
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573 | |
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574 | **DIRECTIVE STATUS CODES:** |
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575 | |
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576 | NONE |
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577 | |
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578 | **DESCRIPTION:** |
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579 | |
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580 | The interrupt status will remain unchanged. On SMP configurations this |
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581 | directive acquires a SMP lock. |
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582 | |
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583 | In case the corresponding interrupt service routine can be interrupted by |
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584 | higher priority interrupts and these interrupts enter the critical section |
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585 | protected by this lock, then the result is unpredictable. |
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586 | |
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587 | **NOTES:** |
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588 | |
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589 | This directive should be called from the corresponding interrupt service |
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590 | routine. |
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591 | |
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592 | .. _rtems_interrupt_lock_release_isr: |
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593 | |
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594 | INTERRUPT_LOCK_RELEASE_ISR - Release an ISR Lock from ISR |
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595 | --------------------------------------------------------- |
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596 | |
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597 | **CALLING SEQUENCE:** |
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598 | |
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599 | .. index:: rtems_interrupt_lock_release_isr |
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600 | |
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601 | .. code:: c |
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602 | |
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603 | void rtems_interrupt_lock_release_isr( |
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604 | rtems_interrupt_lock *lock, |
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605 | rtems_interrupt_level level |
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606 | ); |
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607 | |
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608 | **DIRECTIVE STATUS CODES:** |
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609 | |
---|
610 | NONE |
---|
611 | |
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612 | **DESCRIPTION:** |
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613 | |
---|
614 | The interrupt status will remain unchanged. On SMP configurations this |
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615 | directive releases a SMP lock. |
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616 | |
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617 | **NOTES:** |
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618 | |
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619 | This directive should be called from the corresponding interrupt service |
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620 | routine. |
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621 | |
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622 | .. _rtems_interrupt_is_in_progress: |
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623 | |
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624 | INTERRUPT_IS_IN_PROGRESS - Is an ISR in Progress |
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625 | ------------------------------------------------ |
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626 | .. index:: is interrupt in progress |
---|
627 | |
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628 | **CALLING SEQUENCE:** |
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629 | |
---|
630 | .. index:: rtems_interrupt_is_in_progress |
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631 | |
---|
632 | .. code:: c |
---|
633 | |
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634 | bool rtems_interrupt_is_in_progress(void); |
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635 | |
---|
636 | **DIRECTIVE STATUS CODES:** |
---|
637 | |
---|
638 | NONE |
---|
639 | |
---|
640 | **DESCRIPTION:** |
---|
641 | |
---|
642 | This directive returns ``TRUE`` if the processor is currently servicing an |
---|
643 | interrupt and ``FALSE`` otherwise. A return value of ``TRUE`` indicates that |
---|
644 | the caller is an interrupt service routine, *NOT* a task. The directives |
---|
645 | available to an interrupt service routine are restricted. |
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646 | |
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647 | **NOTES:** |
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648 | |
---|
649 | This directive will not cause the calling task to be preempted. |
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