source: rtems-docs/c-user/interrupt_manager.rst @ e2a1a3a

5
Last change on this file since e2a1a3a was e2a1a3a, checked in by Sebastian Huber <sebastian.huber@…>, on 11/17/17 at 12:46:52

c-user: Clarify rtems_interrupt_flash()

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1.. comment SPDX-License-Identifier: CC-BY-SA-4.0
2
3.. COMMENT: COPYRIGHT (c) 1988-2008.
4.. COMMENT: On-Line Applications Research Corporation (OAR).
5.. COMMENT: All rights reserved.
6
7.. index:: interrupts
8
9Interrupt Manager
10*****************
11
12Introduction
13============
14
15Any real-time executive must provide a mechanism for quick response to
16externally generated interrupts to satisfy the critical time constraints of the
17application.  The interrupt manager provides this mechanism for RTEMS.  This
18manager permits quick interrupt response times by providing the critical
19ability to alter task execution which allows a task to be preempted upon exit
20from an ISR.  The interrupt manager includes the following directive:
21
22- rtems_interrupt_catch_ - Establish an ISR
23
24- rtems_interrupt_disable_ - Disable Interrupts
25
26- rtems_interrupt_enable_ - Enable Interrupts
27
28- rtems_interrupt_flash_ - Flash Interrupt
29
30- rtems_interrupt_local_disable_ - Disable Interrupts on Current Processor
31
32- rtems_interrupt_local_enable_ - Enable Interrupts on Current Processor
33
34- rtems_interrupt_lock_initialize_ - Initialize an ISR Lock
35
36- rtems_interrupt_lock_acquire_ - Acquire an ISR Lock
37
38- rtems_interrupt_lock_release_ - Release an ISR Lock
39
40- rtems_interrupt_lock_acquire_isr_ - Acquire an ISR Lock from ISR
41
42- rtems_interrupt_lock_release_isr_ - Release an ISR Lock from ISR
43
44- rtems_interrupt_is_in_progress_ - Is an ISR in Progress
45
46Background
47==========
48
49.. index:: interrupt processing
50
51Processing an Interrupt
52-----------------------
53
54The interrupt manager allows the application to connect a function to a
55hardware interrupt vector.  When an interrupt occurs, the processor will
56automatically vector to RTEMS.  RTEMS saves and restores all registers which
57are not preserved by the normal C calling convention for the target processor
58and invokes the user's ISR.  The user's ISR is responsible for processing the
59interrupt, clearing the interrupt if necessary, and device specific
60manipulation.
61
62.. index:: rtems_vector_number
63
64The ``rtems_interrupt_catch`` directive connects a procedure to an interrupt
65vector.  The vector number is managed using the ``rtems_vector_number`` data
66type.
67
68The interrupt service routine is assumed to abide by these conventions and have
69a prototype similar to the following:
70
71.. index:: rtems_isr
72
73.. code-block:: c
74
75    rtems_isr user_isr(
76        rtems_vector_number vector
77    );
78
79The vector number argument is provided by RTEMS to allow the application to
80identify the interrupt source.  This could be used to allow a single routine to
81service interrupts from multiple instances of the same device.  For example, a
82single routine could service interrupts from multiple serial ports and use the
83vector number to identify which port requires servicing.
84
85To minimize the masking of lower or equal priority level interrupts, the ISR
86should perform the minimum actions required to service the interrupt.  Other
87non-essential actions should be handled by application tasks.  Once the user's
88ISR has completed, it returns control to the RTEMS interrupt manager which will
89perform task dispatching and restore the registers saved before the ISR was
90invoked.
91
92The RTEMS interrupt manager guarantees that proper task scheduling and
93dispatching are performed at the conclusion of an ISR.  A system call made by
94the ISR may have readied a task of higher priority than the interrupted task.
95Therefore, when the ISR completes, the postponed dispatch processing must be
96performed.  No dispatch processing is performed as part of directives which
97have been invoked by an ISR.
98
99Applications must adhere to the following rule if proper task scheduling and
100dispatching is to be performed:
101
102.. note::
103
104  The interrupt manager must be used for all ISRs which may be interrupted by
105  the highest priority ISR which invokes an RTEMS directive.
106
107Consider a processor which allows a numerically low interrupt level to
108interrupt a numerically greater interrupt level.  In this example, if an RTEMS
109directive is used in a level 4 ISR, then all ISRs which execute at levels 0
110through 4 must use the interrupt manager.
111
112Interrupts are nested whenever an interrupt occurs during the execution of
113another ISR.  RTEMS supports efficient interrupt nesting by allowing the nested
114ISRs to terminate without performing any dispatch processing.  Only when the
115outermost ISR terminates will the postponed dispatching occur.
116
117.. index:: interrupt levels
118
119RTEMS Interrupt Levels
120----------------------
121
122Many processors support multiple interrupt levels or priorities.  The exact
123number of interrupt levels is processor dependent.  RTEMS internally supports
124256 interrupt levels which are mapped to the processor's interrupt levels.  For
125specific information on the mapping between RTEMS and the target processor's
126interrupt levels, refer to the Interrupt Processing chapter of the Applications
127Supplement document for a specific target processor.
128
129.. index:: disabling interrupts
130
131Disabling of Interrupts by RTEMS
132--------------------------------
133
134During the execution of directive calls, critical sections of code may be
135executed.  When these sections are encountered, RTEMS disables all maskable
136interrupts before the execution of the section and restores them to the
137previous level upon completion of the section.  RTEMS has been optimized to
138ensure that interrupts are disabled for a minimum length of time.  The maximum
139length of time interrupts are disabled by RTEMS is processor dependent and is
140detailed in the Timing Specification chapter of the Applications Supplement
141document for a specific target processor.
142
143Non-maskable interrupts (NMI) cannot be disabled, and ISRs which execute at
144this level MUST NEVER issue RTEMS system calls.  If a directive is invoked,
145unpredictable results may occur due to the inability of RTEMS to protect its
146critical sections.  However, ISRs that make no system calls may safely execute
147as non-maskable interrupts.
148
149Operations
150==========
151
152Establishing an ISR
153-------------------
154
155The ``rtems_interrupt_catch`` directive establishes an ISR for the system.  The
156address of the ISR and its associated CPU vector number are specified to this
157directive.  This directive installs the RTEMS interrupt wrapper in the
158processor's Interrupt Vector Table and the address of the user's ISR in the
159RTEMS' Vector Table.  This directive returns the previous contents of the
160specified vector in the RTEMS' Vector Table.
161
162Directives Allowed from an ISR
163------------------------------
164
165Using the interrupt manager ensures that RTEMS knows when a directive is being
166called from an ISR.  The ISR may then use system calls to synchronize itself
167with an application task.  The synchronization may involve messages, events or
168signals being passed by the ISR to the desired task.  Directives invoked by an
169ISR must operate only on objects which reside on the local node.  The following
170is a list of RTEMS system calls that may be made from an ISR:
171
172- Task Management
173  Although it is acceptable to operate on the RTEMS_SELF task (e.g.  the
174  currently executing task), while in an ISR, this will refer to the
175  interrupted task.  Most of the time, it is an application implementation
176  error to use RTEMS_SELF from an ISR.
177
178  - rtems_task_suspend
179  - rtems_task_resume
180
181- Interrupt Management
182
183  - rtems_interrupt_enable
184  - rtems_interrupt_disable
185  - rtems_interrupt_flash
186  - rtems_interrupt_lock_acquire
187  - rtems_interrupt_lock_release
188  - rtems_interrupt_lock_acquire_isr
189  - rtems_interrupt_lock_release_isr
190  - rtems_interrupt_is_in_progress
191  - rtems_interrupt_catch
192
193- Clock Management
194
195  - rtems_clock_set
196  - rtems_clock_get_tod
197  - rtems_clock_get_tod_timeval
198  - rtems_clock_get_seconds_since_epoch
199  - rtems_clock_get_ticks_per_second
200  - rtems_clock_get_ticks_since_boot
201  - rtems_clock_get_uptime
202
203- Timer Management
204
205  - rtems_timer_cancel
206  - rtems_timer_reset
207  - rtems_timer_fire_after
208  - rtems_timer_fire_when
209  - rtems_timer_server_fire_after
210  - rtems_timer_server_fire_when
211
212- Event Management
213
214  - rtems_event_send
215  - rtems_event_system_send
216  - rtems_event_transient_send
217
218- Semaphore Management
219
220  - rtems_semaphore_release
221
222- Message Management
223
224  - rtems_message_queue_send
225  - rtems_message_queue_urgent
226
227- Signal Management
228
229  - rtems_signal_send
230
231- Dual-Ported Memory Management
232
233  - rtems_port_external_to_internal
234  - rtems_port_internal_to_external
235
236- IO Management
237  The following services are safe to call from an ISR if and only if
238  the device driver service invoked is also safe.  The IO Manager itself
239  is safe but the invoked driver entry point may or may not be.
240
241  - rtems_io_initialize
242  - rtems_io_open
243  - rtems_io_close
244  - rtems_io_read
245  - rtems_io_write
246  - rtems_io_control
247
248- Fatal Error Management
249
250  - rtems_fatal
251  - rtems_fatal_error_occurred
252
253- Multiprocessing
254
255  - rtems_multiprocessing_announce
256
257Directives
258==========
259
260This section details the interrupt manager's directives.  A subsection is
261dedicated to each of this manager's directives and describes the calling
262sequence, related constants, usage, and status codes.
263
264.. raw:: latex
265
266   \clearpage
267
268.. index:: establish an ISR
269.. index:: install an ISR
270.. index:: rtems_interrupt_catch
271
272.. _rtems_interrupt_catch:
273
274INTERRUPT_CATCH - Establish an ISR
275----------------------------------
276
277CALLING SEQUENCE:
278    .. code-block:: c
279
280        rtems_status_code rtems_interrupt_catch(
281            rtems_isr_entry      new_isr_handler,
282            rtems_vector_number  vector,
283            rtems_isr_entry     *old_isr_handler
284        );
285
286DIRECTIVE STATUS CODES:
287    .. list-table::
288     :class: rtems-wrap
289
290     * - ``RTEMS_SUCCESSFUL``
291       -  ISR established successfully
292     * - ``RTEMS_INVALID_NUMBER``
293       -  illegal vector number
294     * - ``RTEMS_INVALID_ADDRESS``
295       -  illegal ISR entry point or invalid ``old_isr_handler``
296
297DESCRIPTION:
298    This directive establishes an interrupt service routine (ISR) for the
299    specified interrupt vector number.  The ``new_isr_handler`` parameter
300    specifies the entry point of the ISR.  The entry point of the previous ISR
301    for the specified vector is returned in ``old_isr_handler``.
302
303    To release an interrupt vector, pass the old handler's address obtained
304    when the vector was first capture.
305
306NOTES:
307    This directive will not cause the calling task to be preempted.
308
309.. raw:: latex
310
311   \clearpage
312
313.. index:: disable interrupts
314.. index:: rtems_interrupt_disable
315
316.. _rtems_interrupt_disable:
317
318INTERRUPT_DISABLE - Disable Interrupts
319--------------------------------------
320
321CALLING SEQUENCE:
322    .. code-block:: c
323
324        void rtems_interrupt_disable(
325            rtems_interrupt_level  level
326        );
327
328DIRECTIVE STATUS CODES:
329    NONE
330
331DESCRIPTION:
332    This directive disables all maskable interrupts and returns the previous
333    ``level``.  A later invocation of the ``rtems_interrupt_enable`` directive
334    should be used to restore the interrupt level.
335
336.. sidebar:: *Macro*
337
338  This directive is implemented as a macro which modifies the ``level``
339  parameter.
340
341NOTES:
342    This directive will not cause the calling task to be preempted.
343
344    This directive is only available on uni-processor configurations.  The
345    directive ``rtems_interrupt_local_disable`` is available on all
346    configurations.
347
348.. raw:: latex
349
350   \clearpage
351
352.. index:: enable interrupts
353.. index:: rtems_interrupt_enable
354
355.. _rtems_interrupt_enable:
356
357INTERRUPT_ENABLE - Enable Interrupts
358------------------------------------
359
360CALLING SEQUENCE:
361    .. code-block:: c
362
363        void rtems_interrupt_enable(
364           rtems_interrupt_level  level
365        );
366
367DIRECTIVE STATUS CODES:
368    NONE
369
370DESCRIPTION:
371    This directive enables maskable interrupts to the ``level`` which was
372    returned by a previous call to ``rtems_interrupt_disable``.  Immediately
373    prior to invoking this directive, maskable interrupts should be disabled by
374    a call to ``rtems_interrupt_disable`` and will be enabled when this
375    directive returns to the caller.
376
377NOTES:
378    This directive will not cause the calling task to be preempted.
379
380    This directive is only available on uni-processor configurations.  The
381    directive ``rtems_interrupt_local_enable`` is available on all
382    configurations.
383
384.. raw:: latex
385
386   \clearpage
387
388.. index:: flash interrupts
389.. index:: rtems_interrupt_flash
390
391.. _rtems_interrupt_flash:
392
393INTERRUPT_FLASH - Flash Interrupts
394----------------------------------
395
396CALLING SEQUENCE:
397    .. code-block:: c
398
399        void rtems_interrupt_flash(
400            rtems_interrupt_level level
401        );
402
403DIRECTIVE STATUS CODES:
404    NONE
405
406DESCRIPTION:
407    This directive is functionally equivalent to a
408    ``rtems_interrupt_enable( level )`` immediately followed by a
409    ``rtems_interrupt_disable( level )``.  On some
410    architectures it is possible to provide an optimized implementation for
411    this sequence.
412
413NOTES:
414    This directive will not cause the calling task to be preempted.
415
416    This directive is only available in uni-processor configurations.  The
417    directives ``rtems_interrupt_local_disable`` and
418    ``rtems_interrupt_local_enable`` are available in all configurations.
419
420    Historically, the interrupt flash directive was heavily used in the
421    operating system implementation.  However, this is no longer the case.  The
422    interrupt flash directive is provided for backward compatibility reasons.
423
424.. raw:: latex
425
426   \clearpage
427
428.. index:: disable interrupts
429.. index:: rtems_interrupt_local_disable
430
431.. _rtems_interrupt_local_disable:
432
433INTERRUPT_LOCAL_DISABLE - Disable Interrupts on Current Processor
434-----------------------------------------------------------------
435
436CALLING SEQUENCE:
437    .. code-block:: c
438
439        void rtems_interrupt_local_disable(
440            rtems_interrupt_level  level
441        );
442
443DIRECTIVE STATUS CODES:
444    NONE
445
446DESCRIPTION:
447    This directive disables all maskable interrupts and returns the previous
448    ``level``.  A later invocation of the ``rtems_interrupt_local_enable``
449    directive should be used to restore the interrupt level.
450
451.. sidebar:: *Macro*
452
453  This directive is implemented as a macro which modifies the ``level``
454  parameter.
455
456NOTES:
457    This directive will not cause the calling task to be preempted.
458
459    In SMP configurations, this will not ensure system wide mutual exclusion.
460    Use interrupt locks instead.
461
462.. raw:: latex
463
464   \clearpage
465
466.. index:: enable interrupts
467.. index:: rtems_interrupt_local_enable
468
469.. _rtems_interrupt_local_enable:
470
471INTERRUPT_LOCAL_ENABLE - Enable Interrupts on Current Processor
472---------------------------------------------------------------
473
474CALLING SEQUENCE:
475    .. code-block:: c
476
477        void rtems_interrupt_local_enable(
478            rtems_interrupt_level  level
479        );
480
481DIRECTIVE STATUS CODES:
482    NONE
483
484DESCRIPTION:
485    This directive enables maskable interrupts to the ``level`` which was
486    returned by a previous call to ``rtems_interrupt_local_disable``.
487    Immediately prior to invoking this directive, maskable interrupts should be
488    disabled by a call to ``rtems_interrupt_local_disable`` and will be enabled
489    when this directive returns to the caller.
490
491NOTES:
492    This directive will not cause the calling task to be preempted.
493
494.. raw:: latex
495
496   \clearpage
497
498.. index:: rtems_interrupt_lock_initialize
499
500.. _rtems_interrupt_lock_initialize:
501
502INTERRUPT_LOCK_INITIALIZE - Initialize an ISR Lock
503--------------------------------------------------
504
505CALLING SEQUENCE:
506    .. code-block:: c
507
508        void rtems_interrupt_lock_initialize(
509            rtems_interrupt_lock *lock,
510            const char           *name
511        );
512
513DIRECTIVE STATUS CODES:
514    NONE
515
516DESCRIPTION:
517    Initializes an interrupt lock.  The name must be persistent throughout the
518    lifetime of the lock.
519
520NOTES:
521    Concurrent initialization leads to unpredictable results.
522
523.. raw:: latex
524
525   \clearpage
526
527.. index:: rtems_interrupt_lock_acquire
528
529.. _rtems_interrupt_lock_acquire:
530
531INTERRUPT_LOCK_ACQUIRE - Acquire an ISR Lock
532--------------------------------------------
533
534CALLING SEQUENCE:
535    .. code-block:: c
536
537        void rtems_interrupt_lock_acquire(
538            rtems_interrupt_lock         *lock,
539            rtems_interrupt_lock_context *lock_context
540        );
541
542DIRECTIVE STATUS CODES:
543    NONE
544
545DESCRIPTION:
546    Interrupts will be disabled.  In SMP configurations, this directive
547    acquires an SMP lock.
548
549NOTES:
550    A separate lock context must be provided for each acquire/release pair, for
551    example an automatic variable.
552
553    An attempt to recursively acquire the lock may result in an infinite loop
554    with interrupts disabled.
555
556    This directive will not cause the calling thread to be preempted.  This
557    directive can be used in thread and interrupt context.
558
559.. raw:: latex
560
561   \clearpage
562
563.. index:: rtems_interrupt_lock_release
564
565.. _rtems_interrupt_lock_release:
566
567INTERRUPT_LOCK_RELEASE - Release an ISR Lock
568--------------------------------------------
569
570CALLING SEQUENCE:
571    .. code-block:: c
572
573        void rtems_interrupt_lock_release(
574            rtems_interrupt_lock         *lock,
575            rtems_interrupt_lock_context *lock_context
576        );
577
578DIRECTIVE STATUS CODES:
579    NONE
580
581DESCRIPTION:
582    The interrupt status will be restored.  In SMP configurations, this
583    directive releases an SMP lock.
584
585NOTES:
586    The lock context must be the one used to acquire the lock, otherwise the
587    result is unpredictable.
588
589    This directive will not cause the calling thread to be preempted.  This
590    directive can be used in thread and interrupt context.
591
592.. raw:: latex
593
594   \clearpage
595
596.. index:: rtems_interrupt_lock_acquire_isr
597
598.. _rtems_interrupt_lock_acquire_isr:
599
600INTERRUPT_LOCK_ACQUIRE_ISR - Acquire an ISR Lock from ISR
601---------------------------------------------------------
602
603CALLING SEQUENCE:
604    .. code-block:: c
605
606        void rtems_interrupt_lock_acquire_isr(
607            rtems_interrupt_lock         *lock,
608            rtems_interrupt_lock_context *lock_context
609        );
610
611DIRECTIVE STATUS CODES:
612    NONE
613
614DESCRIPTION:
615    The interrupt status will remain unchanged.  In SMP configurations, this
616    directive acquires an SMP lock.
617
618NOTES:
619    A separate lock context must be provided for each acquire/release pair, for
620    example an automatic variable.
621
622    An attempt to recursively acquire the lock may result in an infinite loop.
623
624    This directive is intended for device drivers and should be called from the
625    corresponding interrupt service routine.
626
627    In case the corresponding interrupt service routine can be interrupted by
628    higher priority interrupts and these interrupts enter the critical section
629    protected by this lock, then the result is unpredictable.
630
631.. raw:: latex
632
633   \clearpage
634
635.. index:: rtems_interrupt_lock_release_isr
636
637.. _rtems_interrupt_lock_release_isr:
638
639INTERRUPT_LOCK_RELEASE_ISR - Release an ISR Lock from ISR
640---------------------------------------------------------
641
642CALLING SEQUENCE:
643    .. code-block:: c
644
645        void rtems_interrupt_lock_release_isr(
646            rtems_interrupt_lock         *lock,
647            rtems_interrupt_lock_context *lock_context
648        );
649
650DIRECTIVE STATUS CODES:
651    NONE
652
653DESCRIPTION:
654    The interrupt status will remain unchanged.  In SMP configurations, this
655    directive releases an SMP lock.
656
657NOTES:
658    The lock context must be the one used to acquire the lock, otherwise the
659    result is unpredictable.
660
661    This directive is intended for device drivers and should be called from the
662    corresponding interrupt service routine.
663
664.. raw:: latex
665
666   \clearpage
667
668.. index:: is interrupt in progress
669.. index:: rtems_interrupt_is_in_progress
670
671.. _rtems_interrupt_is_in_progress:
672
673INTERRUPT_IS_IN_PROGRESS - Is an ISR in Progress
674------------------------------------------------
675
676CALLING SEQUENCE:
677    .. code-block:: c
678
679        bool rtems_interrupt_is_in_progress(void);
680
681DIRECTIVE STATUS CODES:
682    NONE
683
684DESCRIPTION:
685    This directive returns ``TRUE`` if the processor is currently servicing an
686    interrupt and ``FALSE`` otherwise.  A return value of ``TRUE`` indicates
687    that the caller is an interrupt service routine, *NOT* a task.  The
688    directives available to an interrupt service routine are restricted.
689
690NOTES:
691    This directive will not cause the calling task to be preempted.
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