source: rtems-docs/c-user/interrupt_manager.rst @ a0d2eee

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1.. comment SPDX-License-Identifier: CC-BY-SA-4.0
2
3.. COMMENT: COPYRIGHT (c) 1988-2008.
4.. COMMENT: On-Line Applications Research Corporation (OAR).
5.. COMMENT: All rights reserved.
6
7Interrupt Manager
8*****************
9
10Introduction
11============
12
13Any real-time executive must provide a mechanism for quick response to
14externally generated interrupts to satisfy the critical time constraints of the
15application.  The interrupt manager provides this mechanism for RTEMS.  This
16manager permits quick interrupt response times by providing the critical
17ability to alter task execution which allows a task to be preempted upon exit
18from an ISR.  The interrupt manager includes the following directive:
19
20- rtems_interrupt_catch_ - Establish an ISR
21
22- rtems_interrupt_disable_ - Disable Interrupts
23
24- rtems_interrupt_enable_ - Enable Interrupts
25
26- rtems_interrupt_flash_ - Flash Interrupt
27
28- rtems_interrupt_local_disable_ - Disable Interrupts on Current Processor
29
30- rtems_interrupt_local_enable_ - Enable Interrupts on Current Processor
31
32- rtems_interrupt_lock_initialize_ - Initialize an ISR Lock
33
34- rtems_interrupt_lock_acquire_ - Acquire an ISR Lock
35
36- rtems_interrupt_lock_release_ - Release an ISR Lock
37
38- rtems_interrupt_lock_acquire_isr_ - Acquire an ISR Lock from ISR
39
40- rtems_interrupt_lock_release_isr_ - Release an ISR Lock from ISR
41
42- rtems_interrupt_is_in_progress_ - Is an ISR in Progress
43
44Background
45==========
46
47Processing an Interrupt
48-----------------------
49.. index:: interrupt processing
50
51The interrupt manager allows the application to connect a function to a
52hardware interrupt vector.  When an interrupt occurs, the processor will
53automatically vector to RTEMS.  RTEMS saves and restores all registers which
54are not preserved by the normal C calling convention for the target processor
55and invokes the user's ISR.  The user's ISR is responsible for processing the
56interrupt, clearing the interrupt if necessary, and device specific
57manipulation.
58
59.. index:: rtems_vector_number
60
61The ``rtems_interrupt_catch`` directive connects a procedure to an interrupt
62vector.  The vector number is managed using the ``rtems_vector_number`` data
63type.
64
65The interrupt service routine is assumed to abide by these conventions and have
66a prototype similar to the following:
67
68.. index:: rtems_isr
69
70.. code-block:: c
71
72    rtems_isr user_isr(
73        rtems_vector_number vector
74    );
75
76The vector number argument is provided by RTEMS to allow the application to
77identify the interrupt source.  This could be used to allow a single routine to
78service interrupts from multiple instances of the same device.  For example, a
79single routine could service interrupts from multiple serial ports and use the
80vector number to identify which port requires servicing.
81
82To minimize the masking of lower or equal priority level interrupts, the ISR
83should perform the minimum actions required to service the interrupt.  Other
84non-essential actions should be handled by application tasks.  Once the user's
85ISR has completed, it returns control to the RTEMS interrupt manager which will
86perform task dispatching and restore the registers saved before the ISR was
87invoked.
88
89The RTEMS interrupt manager guarantees that proper task scheduling and
90dispatching are performed at the conclusion of an ISR.  A system call made by
91the ISR may have readied a task of higher priority than the interrupted task.
92Therefore, when the ISR completes, the postponed dispatch processing must be
93performed.  No dispatch processing is performed as part of directives which
94have been invoked by an ISR.
95
96Applications must adhere to the following rule if proper task scheduling and
97dispatching is to be performed:
98
99.. note::
100
101  The interrupt manager must be used for all ISRs which may be interrupted by
102  the highest priority ISR which invokes an RTEMS directive.
103
104Consider a processor which allows a numerically low interrupt level to
105interrupt a numerically greater interrupt level.  In this example, if an RTEMS
106directive is used in a level 4 ISR, then all ISRs which execute at levels 0
107through 4 must use the interrupt manager.
108
109Interrupts are nested whenever an interrupt occurs during the execution of
110another ISR.  RTEMS supports efficient interrupt nesting by allowing the nested
111ISRs to terminate without performing any dispatch processing.  Only when the
112outermost ISR terminates will the postponed dispatching occur.
113
114RTEMS Interrupt Levels
115----------------------
116.. index:: interrupt levels
117
118Many processors support multiple interrupt levels or priorities.  The exact
119number of interrupt levels is processor dependent.  RTEMS internally supports
120256 interrupt levels which are mapped to the processor's interrupt levels.  For
121specific information on the mapping between RTEMS and the target processor's
122interrupt levels, refer to the Interrupt Processing chapter of the Applications
123Supplement document for a specific target processor.
124
125Disabling of Interrupts by RTEMS
126--------------------------------
127.. index:: disabling interrupts
128
129During the execution of directive calls, critical sections of code may be
130executed.  When these sections are encountered, RTEMS disables all maskable
131interrupts before the execution of the section and restores them to the
132previous level upon completion of the section.  RTEMS has been optimized to
133ensure that interrupts are disabled for a minimum length of time.  The maximum
134length of time interrupts are disabled by RTEMS is processor dependent and is
135detailed in the Timing Specification chapter of the Applications Supplement
136document for a specific target processor.
137
138Non-maskable interrupts (NMI) cannot be disabled, and ISRs which execute at
139this level MUST NEVER issue RTEMS system calls.  If a directive is invoked,
140unpredictable results may occur due to the inability of RTEMS to protect its
141critical sections.  However, ISRs that make no system calls may safely execute
142as non-maskable interrupts.
143
144Operations
145==========
146
147Establishing an ISR
148-------------------
149
150The ``rtems_interrupt_catch`` directive establishes an ISR for the system.  The
151address of the ISR and its associated CPU vector number are specified to this
152directive.  This directive installs the RTEMS interrupt wrapper in the
153processor's Interrupt Vector Table and the address of the user's ISR in the
154RTEMS' Vector Table.  This directive returns the previous contents of the
155specified vector in the RTEMS' Vector Table.
156
157Directives Allowed from an ISR
158------------------------------
159
160Using the interrupt manager ensures that RTEMS knows when a directive is being
161called from an ISR.  The ISR may then use system calls to synchronize itself
162with an application task.  The synchronization may involve messages, events or
163signals being passed by the ISR to the desired task.  Directives invoked by an
164ISR must operate only on objects which reside on the local node.  The following
165is a list of RTEMS system calls that may be made from an ISR:
166
167- Task Management
168  Although it is acceptable to operate on the RTEMS_SELF task (e.g.  the
169  currently executing task), while in an ISR, this will refer to the
170  interrupted task.  Most of the time, it is an application implementation
171  error to use RTEMS_SELF from an ISR.
172
173  - rtems_task_suspend
174  - rtems_task_resume
175
176- Interrupt Management
177
178  - rtems_interrupt_enable
179  - rtems_interrupt_disable
180  - rtems_interrupt_flash
181  - rtems_interrupt_lock_acquire
182  - rtems_interrupt_lock_release
183  - rtems_interrupt_lock_acquire_isr
184  - rtems_interrupt_lock_release_isr
185  - rtems_interrupt_is_in_progress
186  - rtems_interrupt_catch
187
188- Clock Management
189
190  - rtems_clock_set
191  - rtems_clock_get
192  - rtems_clock_get_tod
193  - rtems_clock_get_tod_timeval
194  - rtems_clock_get_seconds_since_epoch
195  - rtems_clock_get_ticks_per_second
196  - rtems_clock_get_ticks_since_boot
197  - rtems_clock_get_uptime
198  - rtems_timecounter_tick
199  - rtems_timecounter_simple_downcounter_tick
200  - rtems_timecounter_simple_upcounter_tick
201
202- Timer Management
203
204  - rtems_timer_cancel
205  - rtems_timer_reset
206  - rtems_timer_fire_after
207  - rtems_timer_fire_when
208  - rtems_timer_server_fire_after
209  - rtems_timer_server_fire_when
210
211- Event Management
212
213  - rtems_event_send
214  - rtems_event_system_send
215  - rtems_event_transient_send
216
217- Semaphore Management
218
219  - rtems_semaphore_release
220
221- Message Management
222
223  - rtems_message_queue_send
224  - rtems_message_queue_urgent
225
226- Signal Management
227
228  - rtems_signal_send
229
230- Dual-Ported Memory Management
231
232  - rtems_port_external_to_internal
233  - rtems_port_internal_to_external
234
235- IO Management
236  The following services are safe to call from an ISR if and only if
237  the device driver service invoked is also safe.  The IO Manager itself
238  is safe but the invoked driver entry point may or may not be.
239
240  - rtems_io_initialize
241  - rtems_io_open
242  - rtems_io_close
243  - rtems_io_read
244  - rtems_io_write
245  - rtems_io_control
246
247- Fatal Error Management
248
249  - rtems_fatal
250  - rtems_fatal_error_occurred
251
252- Multiprocessing
253
254  - rtems_multiprocessing_announce
255
256Directives
257==========
258
259This section details the interrupt manager's directives.  A subsection is
260dedicated to each of this manager's directives and describes the calling
261sequence, related constants, usage, and status codes.
262
263.. raw:: latex
264
265   \clearpage
266
267.. _rtems_interrupt_catch:
268
269INTERRUPT_CATCH - Establish an ISR
270----------------------------------
271.. index:: establish an ISR
272.. index:: install an ISR
273.. index:: rtems_interrupt_catch
274
275CALLING SEQUENCE:
276    .. code-block:: c
277
278        rtems_status_code rtems_interrupt_catch(
279            rtems_isr_entry      new_isr_handler,
280            rtems_vector_number  vector,
281            rtems_isr_entry     *old_isr_handler
282        );
283
284DIRECTIVE STATUS CODES:
285    .. list-table::
286     :class: rtems-wrap
287
288     * - ``RTEMS_SUCCESSFUL``
289       -  ISR established successfully
290     * - ``RTEMS_INVALID_NUMBER``
291       -  illegal vector number
292     * - ``RTEMS_INVALID_ADDRESS``
293       -  illegal ISR entry point or invalid ``old_isr_handler``
294
295DESCRIPTION:
296    This directive establishes an interrupt service routine (ISR) for the
297    specified interrupt vector number.  The ``new_isr_handler`` parameter
298    specifies the entry point of the ISR.  The entry point of the previous ISR
299    for the specified vector is returned in ``old_isr_handler``.
300
301    To release an interrupt vector, pass the old handler's address obtained
302    when the vector was first capture.
303
304NOTES:
305    This directive will not cause the calling task to be preempted.
306
307.. raw:: latex
308
309   \clearpage
310
311.. _rtems_interrupt_disable:
312
313INTERRUPT_DISABLE - Disable Interrupts
314--------------------------------------
315.. index:: disable interrupts
316.. index:: rtems_interrupt_disable
317
318CALLING SEQUENCE:
319    .. code-block:: c
320
321        void rtems_interrupt_disable(
322            rtems_interrupt_level  level
323        );
324
325DIRECTIVE STATUS CODES:
326    NONE
327
328DESCRIPTION:
329    This directive disables all maskable interrupts and returns the previous
330    ``level``.  A later invocation of the ``rtems_interrupt_enable`` directive
331    should be used to restore the interrupt level.
332
333.. sidebar:: *Macro*
334
335  This directive is implemented as a macro which modifies the ``level``
336  parameter.
337
338NOTES:
339    This directive will not cause the calling task to be preempted.
340
341    This directive is only available on uni-processor configurations.  The
342    directive ``rtems_interrupt_local_disable`` is available on all
343    configurations.
344
345.. raw:: latex
346
347   \clearpage
348
349.. _rtems_interrupt_enable:
350
351INTERRUPT_ENABLE - Enable Interrupts
352------------------------------------
353.. index:: enable interrupts
354.. index:: rtems_interrupt_enable
355
356CALLING SEQUENCE:
357    .. code-block:: c
358
359        void rtems_interrupt_enable(
360           rtems_interrupt_level  level
361        );
362
363DIRECTIVE STATUS CODES:
364    NONE
365
366DESCRIPTION:
367    This directive enables maskable interrupts to the ``level`` which was
368    returned by a previous call to ``rtems_interrupt_disable``.  Immediately
369    prior to invoking this directive, maskable interrupts should be disabled by
370    a call to ``rtems_interrupt_disable`` and will be enabled when this
371    directive returns to the caller.
372
373NOTES:
374    This directive will not cause the calling task to be preempted.
375
376    This directive is only available on uni-processor configurations.  The
377    directive ``rtems_interrupt_local_enable`` is available on all
378    configurations.
379
380.. raw:: latex
381
382   \clearpage
383
384.. _rtems_interrupt_flash:
385
386INTERRUPT_FLASH - Flash Interrupts
387----------------------------------
388.. index:: flash interrupts
389.. index:: rtems_interrupt_flash
390
391CALLING SEQUENCE:
392    .. code-block:: c
393
394        void rtems_interrupt_flash(
395            rtems_interrupt_level level
396        );
397
398DIRECTIVE STATUS CODES:
399    NONE
400
401DESCRIPTION:
402    This directive temporarily enables maskable interrupts to the ``level``
403    which was returned by a previous call to ``rtems_interrupt_disable``.
404    Immediately prior to invoking this directive, maskable interrupts should be
405    disabled by a call to ``rtems_interrupt_disable`` and will be redisabled
406    when this directive returns to the caller.
407
408NOTES:
409    This directive will not cause the calling task to be preempted.
410
411    This directive is only available on uni-processor configurations.  The
412    directives ``rtems_interrupt_local_disable`` and
413    ``rtems_interrupt_local_enable`` is available on all configurations.
414
415.. raw:: latex
416
417   \clearpage
418
419.. _rtems_interrupt_local_disable:
420
421INTERRUPT_LOCAL_DISABLE - Disable Interrupts on Current Processor
422-----------------------------------------------------------------
423.. index:: disable interrupts
424.. index:: rtems_interrupt_local_disable
425
426CALLING SEQUENCE:
427    .. code-block:: c
428
429        void rtems_interrupt_local_disable(
430            rtems_interrupt_level  level
431        );
432
433DIRECTIVE STATUS CODES:
434    NONE
435
436DESCRIPTION:
437    This directive disables all maskable interrupts and returns the previous
438    ``level``.  A later invocation of the ``rtems_interrupt_local_enable``
439    directive should be used to restore the interrupt level.
440
441.. sidebar:: *Macro*
442
443  This directive is implemented as a macro which modifies the ``level``
444  parameter.
445
446NOTES:
447    This directive will not cause the calling task to be preempted.
448
449    In SMP configurations, this will not ensure system wide mutual exclusion.
450    Use interrupt locks instead.
451
452.. raw:: latex
453
454   \clearpage
455
456.. _rtems_interrupt_local_enable:
457
458INTERRUPT_LOCAL_ENABLE - Enable Interrupts on Current Processor
459---------------------------------------------------------------
460.. index:: enable interrupts
461.. index:: rtems_interrupt_local_enable
462
463CALLING SEQUENCE:
464    .. code-block:: c
465
466        void rtems_interrupt_local_enable(
467            rtems_interrupt_level  level
468        );
469
470DIRECTIVE STATUS CODES:
471    NONE
472
473DESCRIPTION:
474    This directive enables maskable interrupts to the ``level`` which was
475    returned by a previous call to ``rtems_interrupt_local_disable``.
476    Immediately prior to invoking this directive, maskable interrupts should be
477    disabled by a call to ``rtems_interrupt_local_disable`` and will be enabled
478    when this directive returns to the caller.
479
480NOTES:
481    This directive will not cause the calling task to be preempted.
482
483.. raw:: latex
484
485   \clearpage
486
487.. _rtems_interrupt_lock_initialize:
488
489INTERRUPT_LOCK_INITIALIZE - Initialize an ISR Lock
490--------------------------------------------------
491.. index:: rtems_interrupt_lock_initialize
492
493CALLING SEQUENCE:
494    .. code-block:: c
495
496        void rtems_interrupt_lock_initialize(
497            rtems_interrupt_lock *lock
498        );
499
500DIRECTIVE STATUS CODES:
501    NONE
502
503DESCRIPTION:
504    Initializes an interrupt lock.
505
506NOTES:
507    Concurrent initialization leads to unpredictable results.
508
509.. raw:: latex
510
511   \clearpage
512
513.. _rtems_interrupt_lock_acquire:
514
515INTERRUPT_LOCK_ACQUIRE - Acquire an ISR Lock
516--------------------------------------------
517.. index:: rtems_interrupt_lock_acquire
518
519CALLING SEQUENCE:
520    .. code-block:: c
521
522        void rtems_interrupt_lock_acquire(
523            rtems_interrupt_lock *lock,
524            rtems_interrupt_level level
525        );
526
527DIRECTIVE STATUS CODES:
528    NONE
529
530DESCRIPTION:
531    Interrupts will be disabled.  In SMP configurations, this directive
532    acquires an SMP lock.
533
534NOTES:
535    This directive will not cause the calling thread to be preempted.  This
536    directive can be used in thread and interrupt context.
537
538.. raw:: latex
539
540   \clearpage
541
542.. _rtems_interrupt_lock_release:
543
544INTERRUPT_LOCK_RELEASE - Release an ISR Lock
545--------------------------------------------
546.. index:: rtems_interrupt_lock_release
547
548CALLING SEQUENCE:
549    .. code-block:: c
550
551        void rtems_interrupt_lock_release(
552            rtems_interrupt_lock *lock,
553            rtems_interrupt_level level
554        );
555
556DIRECTIVE STATUS CODES:
557    NONE
558
559DESCRIPTION:
560    The interrupt status will be restored.  In SMP configurations, this
561    directive releases an SMP lock.
562
563NOTES:
564    This directive will not cause the calling thread to be preempted.  This
565    directive can be used in thread and interrupt context.
566
567.. raw:: latex
568
569   \clearpage
570
571.. _rtems_interrupt_lock_acquire_isr:
572
573INTERRUPT_LOCK_ACQUIRE_ISR - Acquire an ISR Lock from ISR
574---------------------------------------------------------
575.. index:: rtems_interrupt_lock_acquire_isr
576
577CALLING SEQUENCE:
578    .. code-block:: c
579
580        void rtems_interrupt_lock_acquire_isr(
581            rtems_interrupt_lock *lock,
582            rtems_interrupt_level level
583        );
584
585DIRECTIVE STATUS CODES:
586    NONE
587
588DESCRIPTION:
589    The interrupt status will remain unchanged.  In SMP configurations, this
590    directive acquires an SMP lock.
591
592    In case the corresponding interrupt service routine can be interrupted by
593    higher priority interrupts and these interrupts enter the critical section
594    protected by this lock, then the result is unpredictable.
595
596NOTES:
597    This directive should be called from the corresponding interrupt service
598    routine.
599
600.. raw:: latex
601
602   \clearpage
603
604.. _rtems_interrupt_lock_release_isr:
605
606INTERRUPT_LOCK_RELEASE_ISR - Release an ISR Lock from ISR
607---------------------------------------------------------
608.. index:: rtems_interrupt_lock_release_isr
609
610CALLING SEQUENCE:
611    .. code-block:: c
612
613        void rtems_interrupt_lock_release_isr(
614            rtems_interrupt_lock *lock,
615            rtems_interrupt_level level
616        );
617
618DIRECTIVE STATUS CODES:
619    NONE
620
621DESCRIPTION:
622
623    The interrupt status will remain unchanged.  In SMP configurations, this
624    directive releases an SMP lock.
625
626NOTES:
627    This directive should be called from the corresponding interrupt service
628    routine.
629
630.. raw:: latex
631
632   \clearpage
633
634.. _rtems_interrupt_is_in_progress:
635
636INTERRUPT_IS_IN_PROGRESS - Is an ISR in Progress
637------------------------------------------------
638.. index:: is interrupt in progress
639.. index:: rtems_interrupt_is_in_progress
640
641CALLING SEQUENCE:
642    .. code-block:: c
643
644        bool rtems_interrupt_is_in_progress(void);
645
646DIRECTIVE STATUS CODES:
647    NONE
648
649DESCRIPTION:
650    This directive returns ``TRUE`` if the processor is currently servicing an
651    interrupt and ``FALSE`` otherwise.  A return value of ``TRUE`` indicates
652    that the caller is an interrupt service routine, *NOT* a task.  The
653    directives available to an interrupt service routine are restricted.
654
655NOTES:
656    This directive will not cause the calling task to be preempted.
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