1 | .. comment SPDX-License-Identifier: CC-BY-SA-4.0 |
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2 | |
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3 | .. COMMENT: COPYRIGHT (c) 1988-2008. |
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4 | .. COMMENT: On-Line Applications Research Corporation (OAR). |
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5 | .. COMMENT: All rights reserved. |
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6 | |
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7 | Interrupt Manager |
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8 | ################# |
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9 | |
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10 | Introduction |
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11 | ============ |
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12 | |
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13 | Any real-time executive must provide a mechanism for quick response to |
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14 | externally generated interrupts to satisfy the critical time constraints of the |
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15 | application. The interrupt manager provides this mechanism for RTEMS. This |
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16 | manager permits quick interrupt response times by providing the critical |
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17 | ability to alter task execution which allows a task to be preempted upon exit |
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18 | from an ISR. The interrupt manager includes the following directive: |
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19 | |
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20 | - rtems_interrupt_catch_ - Establish an ISR |
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21 | |
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22 | - rtems_interrupt_disable_ - Disable Interrupts |
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23 | |
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24 | - rtems_interrupt_enable_ - Enable Interrupts |
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25 | |
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26 | - rtems_interrupt_flash_ - Flash Interrupt |
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27 | |
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28 | - rtems_interrupt_local_disable_ - Disable Interrupts on Current Processor |
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29 | |
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30 | - rtems_interrupt_local_enable_ - Enable Interrupts on Current Processor |
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31 | |
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32 | - rtems_interrupt_lock_initialize_ - Initialize an ISR Lock |
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33 | |
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34 | - rtems_interrupt_lock_acquire_ - Acquire an ISR Lock |
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35 | |
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36 | - rtems_interrupt_lock_release_ - Release an ISR Lock |
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37 | |
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38 | - rtems_interrupt_lock_acquire_isr_ - Acquire an ISR Lock from ISR |
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39 | |
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40 | - rtems_interrupt_lock_release_isr_ - Release an ISR Lock from ISR |
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41 | |
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42 | - rtems_interrupt_is_in_progress_ - Is an ISR in Progress |
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43 | |
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44 | Background |
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45 | ========== |
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46 | |
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47 | Processing an Interrupt |
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48 | ----------------------- |
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49 | .. index:: interrupt processing |
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50 | |
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51 | The interrupt manager allows the application to connect a function to a |
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52 | hardware interrupt vector. When an interrupt occurs, the processor will |
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53 | automatically vector to RTEMS. RTEMS saves and restores all registers which |
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54 | are not preserved by the normal C calling convention for the target processor |
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55 | and invokes the user's ISR. The user's ISR is responsible for processing the |
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56 | interrupt, clearing the interrupt if necessary, and device specific |
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57 | manipulation. |
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58 | |
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59 | .. index:: rtems_vector_number |
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60 | |
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61 | The ``rtems_interrupt_catch`` directive connects a procedure to an interrupt |
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62 | vector. The vector number is managed using the ``rtems_vector_number`` data |
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63 | type. |
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64 | |
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65 | The interrupt service routine is assumed to abide by these conventions and have |
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66 | a prototype similar to the following: |
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67 | |
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68 | .. index:: rtems_isr |
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69 | |
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70 | .. code-block:: c |
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71 | |
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72 | rtems_isr user_isr( |
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73 | rtems_vector_number vector |
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74 | ); |
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75 | |
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76 | The vector number argument is provided by RTEMS to allow the application to |
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77 | identify the interrupt source. This could be used to allow a single routine to |
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78 | service interrupts from multiple instances of the same device. For example, a |
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79 | single routine could service interrupts from multiple serial ports and use the |
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80 | vector number to identify which port requires servicing. |
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81 | |
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82 | To minimize the masking of lower or equal priority level interrupts, the ISR |
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83 | should perform the minimum actions required to service the interrupt. Other |
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84 | non-essential actions should be handled by application tasks. Once the user's |
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85 | ISR has completed, it returns control to the RTEMS interrupt manager which will |
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86 | perform task dispatching and restore the registers saved before the ISR was |
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87 | invoked. |
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88 | |
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89 | The RTEMS interrupt manager guarantees that proper task scheduling and |
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90 | dispatching are performed at the conclusion of an ISR. A system call made by |
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91 | the ISR may have readied a task of higher priority than the interrupted task. |
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92 | Therefore, when the ISR completes, the postponed dispatch processing must be |
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93 | performed. No dispatch processing is performed as part of directives which |
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94 | have been invoked by an ISR. |
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95 | |
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96 | Applications must adhere to the following rule if proper task scheduling and |
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97 | dispatching is to be performed: |
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98 | |
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99 | .. note:: |
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100 | |
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101 | The interrupt manager must be used for all ISRs which may be interrupted by |
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102 | the highest priority ISR which invokes an RTEMS directive. |
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103 | |
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104 | Consider a processor which allows a numerically low interrupt level to |
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105 | interrupt a numerically greater interrupt level. In this example, if an RTEMS |
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106 | directive is used in a level 4 ISR, then all ISRs which execute at levels 0 |
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107 | through 4 must use the interrupt manager. |
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108 | |
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109 | Interrupts are nested whenever an interrupt occurs during the execution of |
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110 | another ISR. RTEMS supports efficient interrupt nesting by allowing the nested |
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111 | ISRs to terminate without performing any dispatch processing. Only when the |
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112 | outermost ISR terminates will the postponed dispatching occur. |
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113 | |
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114 | RTEMS Interrupt Levels |
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115 | ---------------------- |
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116 | .. index:: interrupt levels |
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117 | |
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118 | Many processors support multiple interrupt levels or priorities. The exact |
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119 | number of interrupt levels is processor dependent. RTEMS internally supports |
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120 | 256 interrupt levels which are mapped to the processor's interrupt levels. For |
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121 | specific information on the mapping between RTEMS and the target processor's |
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122 | interrupt levels, refer to the Interrupt Processing chapter of the Applications |
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123 | Supplement document for a specific target processor. |
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124 | |
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125 | Disabling of Interrupts by RTEMS |
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126 | -------------------------------- |
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127 | .. index:: disabling interrupts |
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128 | |
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129 | During the execution of directive calls, critical sections of code may be |
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130 | executed. When these sections are encountered, RTEMS disables all maskable |
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131 | interrupts before the execution of the section and restores them to the |
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132 | previous level upon completion of the section. RTEMS has been optimized to |
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133 | ensure that interrupts are disabled for a minimum length of time. The maximum |
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134 | length of time interrupts are disabled by RTEMS is processor dependent and is |
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135 | detailed in the Timing Specification chapter of the Applications Supplement |
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136 | document for a specific target processor. |
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137 | |
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138 | Non-maskable interrupts (NMI) cannot be disabled, and ISRs which execute at |
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139 | this level MUST NEVER issue RTEMS system calls. If a directive is invoked, |
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140 | unpredictable results may occur due to the inability of RTEMS to protect its |
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141 | critical sections. However, ISRs that make no system calls may safely execute |
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142 | as non-maskable interrupts. |
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143 | |
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144 | Operations |
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145 | ========== |
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146 | |
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147 | Establishing an ISR |
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148 | ------------------- |
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149 | |
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150 | The ``rtems_interrupt_catch`` directive establishes an ISR for the system. The |
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151 | address of the ISR and its associated CPU vector number are specified to this |
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152 | directive. This directive installs the RTEMS interrupt wrapper in the |
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153 | processor's Interrupt Vector Table and the address of the user's ISR in the |
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154 | RTEMS' Vector Table. This directive returns the previous contents of the |
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155 | specified vector in the RTEMS' Vector Table. |
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156 | |
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157 | Directives Allowed from an ISR |
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158 | ------------------------------ |
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159 | |
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160 | Using the interrupt manager ensures that RTEMS knows when a directive is being |
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161 | called from an ISR. The ISR may then use system calls to synchronize itself |
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162 | with an application task. The synchronization may involve messages, events or |
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163 | signals being passed by the ISR to the desired task. Directives invoked by an |
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164 | ISR must operate only on objects which reside on the local node. The following |
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165 | is a list of RTEMS system calls that may be made from an ISR: |
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166 | |
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167 | - Task Management |
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168 | Although it is acceptable to operate on the RTEMS_SELF task (e.g. the |
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169 | currently executing task), while in an ISR, this will refer to the |
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170 | interrupted task. Most of the time, it is an application implementation |
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171 | error to use RTEMS_SELF from an ISR. |
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172 | |
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173 | - rtems_task_suspend |
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174 | - rtems_task_resume |
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175 | |
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176 | - Interrupt Management |
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177 | |
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178 | - rtems_interrupt_enable |
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179 | - rtems_interrupt_disable |
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180 | - rtems_interrupt_flash |
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181 | - rtems_interrupt_lock_acquire |
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182 | - rtems_interrupt_lock_release |
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183 | - rtems_interrupt_lock_acquire_isr |
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184 | - rtems_interrupt_lock_release_isr |
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185 | - rtems_interrupt_is_in_progress |
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186 | - rtems_interrupt_catch |
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187 | |
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188 | - Clock Management |
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189 | |
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190 | - rtems_clock_set |
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191 | - rtems_clock_get |
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192 | - rtems_clock_get_tod |
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193 | - rtems_clock_get_tod_timeval |
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194 | - rtems_clock_get_seconds_since_epoch |
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195 | - rtems_clock_get_ticks_per_second |
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196 | - rtems_clock_get_ticks_since_boot |
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197 | - rtems_clock_get_uptime |
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198 | - rtems_clock_set_nanoseconds_extension |
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199 | - rtems_clock_tick |
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200 | |
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201 | - Timer Management |
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202 | |
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203 | - rtems_timer_cancel |
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204 | - rtems_timer_reset |
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205 | - rtems_timer_fire_after |
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206 | - rtems_timer_fire_when |
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207 | - rtems_timer_server_fire_after |
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208 | - rtems_timer_server_fire_when |
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209 | |
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210 | - Event Management |
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211 | |
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212 | - rtems_event_send |
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213 | - rtems_event_system_send |
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214 | - rtems_event_transient_send |
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215 | |
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216 | - Semaphore Management |
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217 | |
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218 | - rtems_semaphore_release |
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219 | |
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220 | - Message Management |
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221 | |
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222 | - rtems_message_queue_send |
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223 | - rtems_message_queue_urgent |
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224 | |
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225 | - Signal Management |
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226 | |
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227 | - rtems_signal_send |
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228 | |
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229 | - Dual-Ported Memory Management |
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230 | |
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231 | - rtems_port_external_to_internal |
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232 | - rtems_port_internal_to_external |
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233 | |
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234 | - IO Management |
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235 | The following services are safe to call from an ISR if and only if |
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236 | the device driver service invoked is also safe. The IO Manager itself |
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237 | is safe but the invoked driver entry point may or may not be. |
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238 | |
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239 | - rtems_io_initialize |
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240 | - rtems_io_open |
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241 | - rtems_io_close |
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242 | - rtems_io_read |
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243 | - rtems_io_write |
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244 | - rtems_io_control |
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245 | |
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246 | - Fatal Error Management |
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247 | |
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248 | - rtems_fatal |
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249 | - rtems_fatal_error_occurred |
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250 | |
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251 | - Multiprocessing |
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252 | |
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253 | - rtems_multiprocessing_announce |
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254 | |
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255 | Directives |
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256 | ========== |
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257 | |
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258 | This section details the interrupt manager's directives. A subsection is |
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259 | dedicated to each of this manager's directives and describes the calling |
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260 | sequence, related constants, usage, and status codes. |
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261 | |
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262 | .. _rtems_interrupt_catch: |
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263 | |
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264 | INTERRUPT_CATCH - Establish an ISR |
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265 | ---------------------------------- |
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266 | .. index:: establish an ISR |
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267 | .. index:: install an ISR |
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268 | |
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269 | **CALLING SEQUENCE:** |
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270 | |
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271 | .. index:: rtems_interrupt_catch |
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272 | |
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273 | .. code-block:: c |
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274 | |
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275 | rtems_status_code rtems_interrupt_catch( |
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276 | rtems_isr_entry new_isr_handler, |
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277 | rtems_vector_number vector, |
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278 | rtems_isr_entry *old_isr_handler |
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279 | ); |
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280 | |
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281 | **DIRECTIVE STATUS CODES:** |
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282 | |
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283 | .. list-table:: |
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284 | :class: rtems-wrap |
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285 | |
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286 | * - ``RTEMS_SUCCESSFUL`` |
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287 | - ISR established successfully |
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288 | * - ``RTEMS_INVALID_NUMBER`` |
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289 | - illegal vector number |
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290 | * - ``RTEMS_INVALID_ADDRESS`` |
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291 | - illegal ISR entry point or invalid ``old_isr_handler`` |
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292 | |
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293 | **DESCRIPTION:** |
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294 | |
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295 | This directive establishes an interrupt service routine (ISR) for the specified |
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296 | interrupt vector number. The ``new_isr_handler`` parameter specifies the entry |
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297 | point of the ISR. The entry point of the previous ISR for the specified vector |
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298 | is returned in ``old_isr_handler``. |
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299 | |
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300 | To release an interrupt vector, pass the old handler's address obtained when |
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301 | the vector was first capture. |
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302 | |
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303 | **NOTES:** |
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304 | |
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305 | This directive will not cause the calling task to be preempted. |
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306 | |
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307 | .. _rtems_interrupt_disable: |
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308 | |
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309 | INTERRUPT_DISABLE - Disable Interrupts |
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310 | -------------------------------------- |
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311 | .. index:: disable interrupts |
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312 | |
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313 | **CALLING SEQUENCE:** |
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314 | |
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315 | .. index:: rtems_interrupt_disable |
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316 | |
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317 | .. code-block:: c |
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318 | |
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319 | void rtems_interrupt_disable( |
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320 | rtems_interrupt_level level |
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321 | ); |
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322 | |
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323 | **DIRECTIVE STATUS CODES:** |
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324 | |
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325 | NONE |
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326 | |
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327 | **DESCRIPTION:** |
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328 | |
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329 | .. sidebar:: *Macro* |
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330 | |
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331 | This directive is implemented as a macro which modifies the ``level`` |
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332 | parameter. |
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333 | |
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334 | This directive disables all maskable interrupts and returns the previous |
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335 | ``level``. A later invocation of the ``rtems_interrupt_enable`` directive |
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336 | should be used to restore the interrupt level. |
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337 | |
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338 | **NOTES:** |
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339 | |
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340 | This directive will not cause the calling task to be preempted. |
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341 | |
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342 | This directive is only available on uni-processor configurations. The |
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343 | directive ``rtems_interrupt_local_disable`` is available on all configurations. |
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344 | |
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345 | .. _rtems_interrupt_enable: |
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346 | |
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347 | INTERRUPT_ENABLE - Enable Interrupts |
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348 | ------------------------------------ |
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349 | .. index:: enable interrupts |
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350 | |
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351 | **CALLING SEQUENCE:** |
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352 | |
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353 | .. index:: rtems_interrupt_enable |
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354 | |
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355 | .. code-block:: c |
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356 | |
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357 | void rtems_interrupt_enable( |
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358 | rtems_interrupt_level level |
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359 | ); |
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360 | |
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361 | **DIRECTIVE STATUS CODES:** |
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362 | |
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363 | NONE |
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364 | |
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365 | **DESCRIPTION:** |
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366 | |
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367 | This directive enables maskable interrupts to the ``level`` which was returned |
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368 | by a previous call to ``rtems_interrupt_disable``. Immediately prior to |
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369 | invoking this directive, maskable interrupts should be disabled by a call to |
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370 | ``rtems_interrupt_disable`` and will be enabled when this directive returns to |
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371 | the caller. |
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372 | |
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373 | **NOTES:** |
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374 | |
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375 | This directive will not cause the calling task to be preempted. |
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376 | |
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377 | This directive is only available on uni-processor configurations. The |
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378 | directive ``rtems_interrupt_local_enable`` is available on all configurations. |
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379 | |
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380 | .. _rtems_interrupt_flash: |
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381 | |
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382 | INTERRUPT_FLASH - Flash Interrupts |
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383 | ---------------------------------- |
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384 | .. index:: flash interrupts |
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385 | |
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386 | **CALLING SEQUENCE:** |
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387 | |
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388 | .. index:: rtems_interrupt_flash |
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389 | |
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390 | .. code-block:: c |
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391 | |
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392 | void rtems_interrupt_flash( |
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393 | rtems_interrupt_level level |
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394 | ); |
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395 | |
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396 | **DIRECTIVE STATUS CODES:** |
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397 | |
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398 | NONE |
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399 | |
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400 | **DESCRIPTION:** |
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401 | |
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402 | This directive temporarily enables maskable interrupts to the ``level`` which |
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403 | was returned by a previous call to ``rtems_interrupt_disable``. Immediately |
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404 | prior to invoking this directive, maskable interrupts should be disabled by a |
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405 | call to ``rtems_interrupt_disable`` and will be redisabled when this directive |
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406 | returns to the caller. |
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407 | |
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408 | **NOTES:** |
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409 | |
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410 | This directive will not cause the calling task to be preempted. |
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411 | |
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412 | This directive is only available on uni-processor configurations. The |
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413 | directives ``rtems_interrupt_local_disable`` and |
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414 | ``rtems_interrupt_local_enable`` is available on all configurations. |
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415 | |
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416 | .. _rtems_interrupt_local_disable: |
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417 | |
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418 | INTERRUPT_LOCAL_DISABLE - Disable Interrupts on Current Processor |
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419 | ----------------------------------------------------------------- |
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420 | .. index:: disable interrupts |
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421 | |
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422 | **CALLING SEQUENCE:** |
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423 | |
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424 | .. index:: rtems_interrupt_local_disable |
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425 | |
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426 | .. code-block:: c |
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427 | |
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428 | void rtems_interrupt_local_disable( |
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429 | rtems_interrupt_level level |
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430 | ); |
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431 | |
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432 | **DIRECTIVE STATUS CODES:** |
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433 | |
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434 | NONE |
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435 | |
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436 | **DESCRIPTION:** |
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437 | |
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438 | .. sidebar:: *Macro* |
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439 | |
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440 | This directive is implemented as a macro which modifies the ``level`` |
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441 | parameter. |
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442 | |
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443 | This directive disables all maskable interrupts and returns the previous |
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444 | ``level``. A later invocation of the ``rtems_interrupt_local_enable`` directive |
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445 | should be used to restore the interrupt level. |
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446 | |
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447 | **NOTES:** |
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448 | |
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449 | This directive will not cause the calling task to be preempted. |
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450 | |
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451 | On SMP configurations this will not ensure system wide mutual exclusion. Use |
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452 | interrupt locks instead. |
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453 | |
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454 | .. _rtems_interrupt_local_enable: |
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455 | |
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456 | INTERRUPT_LOCAL_ENABLE - Enable Interrupts on Current Processor |
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457 | --------------------------------------------------------------- |
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458 | .. index:: enable interrupts |
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459 | |
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460 | **CALLING SEQUENCE:** |
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461 | |
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462 | .. index:: rtems_interrupt_local_enable |
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463 | |
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464 | .. code-block:: c |
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465 | |
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466 | void rtems_interrupt_local_enable( |
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467 | rtems_interrupt_level level |
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468 | ); |
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469 | |
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470 | **DIRECTIVE STATUS CODES:** |
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471 | |
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472 | NONE |
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473 | |
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474 | **DESCRIPTION:** |
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475 | |
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476 | This directive enables maskable interrupts to the ``level`` which was returned |
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477 | by a previous call to ``rtems_interrupt_local_disable``. Immediately prior to |
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478 | invoking this directive, maskable interrupts should be disabled by a call to |
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479 | ``rtems_interrupt_local_disable`` and will be enabled when this directive |
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480 | returns to the caller. |
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481 | |
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482 | **NOTES:** |
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483 | |
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484 | This directive will not cause the calling task to be preempted. |
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485 | |
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486 | .. _rtems_interrupt_lock_initialize: |
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487 | |
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488 | INTERRUPT_LOCK_INITIALIZE - Initialize an ISR Lock |
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489 | -------------------------------------------------- |
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490 | |
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491 | **CALLING SEQUENCE:** |
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492 | |
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493 | .. index:: rtems_interrupt_lock_initialize |
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494 | |
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495 | .. code-block:: c |
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496 | |
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497 | void rtems_interrupt_lock_initialize( |
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498 | rtems_interrupt_lock *lock |
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499 | ); |
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500 | |
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501 | **DIRECTIVE STATUS CODES:** |
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502 | |
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503 | NONE |
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504 | |
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505 | **DESCRIPTION:** |
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506 | |
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507 | Initializes an interrupt lock. |
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508 | |
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509 | **NOTES:** |
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510 | |
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511 | Concurrent initialization leads to unpredictable results. |
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512 | |
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513 | .. _rtems_interrupt_lock_acquire: |
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514 | |
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515 | INTERRUPT_LOCK_ACQUIRE - Acquire an ISR Lock |
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516 | -------------------------------------------- |
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517 | |
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518 | **CALLING SEQUENCE:** |
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519 | |
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520 | .. index:: rtems_interrupt_lock_acquire |
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521 | |
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522 | .. code-block:: c |
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523 | |
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524 | void rtems_interrupt_lock_acquire( |
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525 | rtems_interrupt_lock *lock, |
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526 | rtems_interrupt_level level |
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527 | ); |
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528 | |
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529 | **DIRECTIVE STATUS CODES:** |
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530 | |
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531 | NONE |
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532 | |
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533 | **DESCRIPTION:** |
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534 | |
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535 | Interrupts will be disabled. On SMP configurations this directive acquires a |
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536 | SMP lock. |
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537 | |
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538 | **NOTES:** |
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539 | |
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540 | This directive will not cause the calling thread to be preempted. This |
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541 | directive can be used in thread and interrupt context. |
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542 | |
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543 | .. _rtems_interrupt_lock_release: |
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544 | |
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545 | INTERRUPT_LOCK_RELEASE - Release an ISR Lock |
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546 | -------------------------------------------- |
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547 | |
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548 | **CALLING SEQUENCE:** |
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549 | |
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550 | .. index:: rtems_interrupt_lock_release |
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551 | |
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552 | .. code-block:: c |
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553 | |
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554 | void rtems_interrupt_lock_release( |
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555 | rtems_interrupt_lock *lock, |
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556 | rtems_interrupt_level level |
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557 | ); |
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558 | |
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559 | **DIRECTIVE STATUS CODES:** |
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560 | |
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561 | NONE |
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562 | |
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563 | **DESCRIPTION:** |
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564 | |
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565 | The interrupt status will be restored. On SMP configurations this directive |
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566 | releases a SMP lock. |
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567 | |
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568 | **NOTES:** |
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569 | |
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570 | This directive will not cause the calling thread to be preempted. This |
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571 | directive can be used in thread and interrupt context. |
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572 | |
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573 | .. _rtems_interrupt_lock_acquire_isr: |
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574 | |
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575 | INTERRUPT_LOCK_ACQUIRE_ISR - Acquire an ISR Lock from ISR |
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576 | --------------------------------------------------------- |
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577 | |
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578 | **CALLING SEQUENCE:** |
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579 | |
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580 | .. index:: rtems_interrupt_lock_acquire_isr |
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581 | |
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582 | .. code-block:: c |
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583 | |
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584 | void rtems_interrupt_lock_acquire_isr( |
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585 | rtems_interrupt_lock *lock, |
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586 | rtems_interrupt_level level |
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587 | ); |
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588 | |
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589 | **DIRECTIVE STATUS CODES:** |
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590 | |
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591 | NONE |
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592 | |
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593 | **DESCRIPTION:** |
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594 | |
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595 | The interrupt status will remain unchanged. On SMP configurations this |
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596 | directive acquires a SMP lock. |
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597 | |
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598 | In case the corresponding interrupt service routine can be interrupted by |
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599 | higher priority interrupts and these interrupts enter the critical section |
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600 | protected by this lock, then the result is unpredictable. |
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601 | |
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602 | **NOTES:** |
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603 | |
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604 | This directive should be called from the corresponding interrupt service |
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605 | routine. |
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606 | |
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607 | .. _rtems_interrupt_lock_release_isr: |
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608 | |
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609 | INTERRUPT_LOCK_RELEASE_ISR - Release an ISR Lock from ISR |
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610 | --------------------------------------------------------- |
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611 | |
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612 | **CALLING SEQUENCE:** |
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613 | |
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614 | .. index:: rtems_interrupt_lock_release_isr |
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615 | |
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616 | .. code-block:: c |
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617 | |
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618 | void rtems_interrupt_lock_release_isr( |
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619 | rtems_interrupt_lock *lock, |
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620 | rtems_interrupt_level level |
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621 | ); |
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622 | |
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623 | **DIRECTIVE STATUS CODES:** |
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624 | |
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625 | NONE |
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626 | |
---|
627 | **DESCRIPTION:** |
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628 | |
---|
629 | The interrupt status will remain unchanged. On SMP configurations this |
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630 | directive releases a SMP lock. |
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631 | |
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632 | **NOTES:** |
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633 | |
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634 | This directive should be called from the corresponding interrupt service |
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635 | routine. |
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636 | |
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637 | .. _rtems_interrupt_is_in_progress: |
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638 | |
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639 | INTERRUPT_IS_IN_PROGRESS - Is an ISR in Progress |
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640 | ------------------------------------------------ |
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641 | .. index:: is interrupt in progress |
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642 | |
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643 | **CALLING SEQUENCE:** |
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644 | |
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645 | .. index:: rtems_interrupt_is_in_progress |
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646 | |
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647 | .. code-block:: c |
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648 | |
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649 | bool rtems_interrupt_is_in_progress(void); |
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650 | |
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651 | **DIRECTIVE STATUS CODES:** |
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652 | |
---|
653 | NONE |
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654 | |
---|
655 | **DESCRIPTION:** |
---|
656 | |
---|
657 | This directive returns ``TRUE`` if the processor is currently servicing an |
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658 | interrupt and ``FALSE`` otherwise. A return value of ``TRUE`` indicates that |
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659 | the caller is an interrupt service routine, *NOT* a task. The directives |
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660 | available to an interrupt service routine are restricted. |
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661 | |
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662 | **NOTES:** |
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663 | |
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664 | This directive will not cause the calling task to be preempted. |
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