source: rtems-docs/c-user/interrupt_manager.rst @ 21e0fcd

5
Last change on this file since 21e0fcd was 21e0fcd, checked in by Joel Sherrill <joel@…>, on 10/11/17 at 23:41:41

c-user: Update to reflect rtems_clock_get() being obsoleted.

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1.. comment SPDX-License-Identifier: CC-BY-SA-4.0
2
3.. COMMENT: COPYRIGHT (c) 1988-2008.
4.. COMMENT: On-Line Applications Research Corporation (OAR).
5.. COMMENT: All rights reserved.
6
7Interrupt Manager
8*****************
9
10Introduction
11============
12
13Any real-time executive must provide a mechanism for quick response to
14externally generated interrupts to satisfy the critical time constraints of the
15application.  The interrupt manager provides this mechanism for RTEMS.  This
16manager permits quick interrupt response times by providing the critical
17ability to alter task execution which allows a task to be preempted upon exit
18from an ISR.  The interrupt manager includes the following directive:
19
20- rtems_interrupt_catch_ - Establish an ISR
21
22- rtems_interrupt_disable_ - Disable Interrupts
23
24- rtems_interrupt_enable_ - Enable Interrupts
25
26- rtems_interrupt_flash_ - Flash Interrupt
27
28- rtems_interrupt_local_disable_ - Disable Interrupts on Current Processor
29
30- rtems_interrupt_local_enable_ - Enable Interrupts on Current Processor
31
32- rtems_interrupt_lock_initialize_ - Initialize an ISR Lock
33
34- rtems_interrupt_lock_acquire_ - Acquire an ISR Lock
35
36- rtems_interrupt_lock_release_ - Release an ISR Lock
37
38- rtems_interrupt_lock_acquire_isr_ - Acquire an ISR Lock from ISR
39
40- rtems_interrupt_lock_release_isr_ - Release an ISR Lock from ISR
41
42- rtems_interrupt_is_in_progress_ - Is an ISR in Progress
43
44Background
45==========
46
47Processing an Interrupt
48-----------------------
49.. index:: interrupt processing
50
51The interrupt manager allows the application to connect a function to a
52hardware interrupt vector.  When an interrupt occurs, the processor will
53automatically vector to RTEMS.  RTEMS saves and restores all registers which
54are not preserved by the normal C calling convention for the target processor
55and invokes the user's ISR.  The user's ISR is responsible for processing the
56interrupt, clearing the interrupt if necessary, and device specific
57manipulation.
58
59.. index:: rtems_vector_number
60
61The ``rtems_interrupt_catch`` directive connects a procedure to an interrupt
62vector.  The vector number is managed using the ``rtems_vector_number`` data
63type.
64
65The interrupt service routine is assumed to abide by these conventions and have
66a prototype similar to the following:
67
68.. index:: rtems_isr
69
70.. code-block:: c
71
72    rtems_isr user_isr(
73        rtems_vector_number vector
74    );
75
76The vector number argument is provided by RTEMS to allow the application to
77identify the interrupt source.  This could be used to allow a single routine to
78service interrupts from multiple instances of the same device.  For example, a
79single routine could service interrupts from multiple serial ports and use the
80vector number to identify which port requires servicing.
81
82To minimize the masking of lower or equal priority level interrupts, the ISR
83should perform the minimum actions required to service the interrupt.  Other
84non-essential actions should be handled by application tasks.  Once the user's
85ISR has completed, it returns control to the RTEMS interrupt manager which will
86perform task dispatching and restore the registers saved before the ISR was
87invoked.
88
89The RTEMS interrupt manager guarantees that proper task scheduling and
90dispatching are performed at the conclusion of an ISR.  A system call made by
91the ISR may have readied a task of higher priority than the interrupted task.
92Therefore, when the ISR completes, the postponed dispatch processing must be
93performed.  No dispatch processing is performed as part of directives which
94have been invoked by an ISR.
95
96Applications must adhere to the following rule if proper task scheduling and
97dispatching is to be performed:
98
99.. note::
100
101  The interrupt manager must be used for all ISRs which may be interrupted by
102  the highest priority ISR which invokes an RTEMS directive.
103
104Consider a processor which allows a numerically low interrupt level to
105interrupt a numerically greater interrupt level.  In this example, if an RTEMS
106directive is used in a level 4 ISR, then all ISRs which execute at levels 0
107through 4 must use the interrupt manager.
108
109Interrupts are nested whenever an interrupt occurs during the execution of
110another ISR.  RTEMS supports efficient interrupt nesting by allowing the nested
111ISRs to terminate without performing any dispatch processing.  Only when the
112outermost ISR terminates will the postponed dispatching occur.
113
114RTEMS Interrupt Levels
115----------------------
116.. index:: interrupt levels
117
118Many processors support multiple interrupt levels or priorities.  The exact
119number of interrupt levels is processor dependent.  RTEMS internally supports
120256 interrupt levels which are mapped to the processor's interrupt levels.  For
121specific information on the mapping between RTEMS and the target processor's
122interrupt levels, refer to the Interrupt Processing chapter of the Applications
123Supplement document for a specific target processor.
124
125Disabling of Interrupts by RTEMS
126--------------------------------
127.. index:: disabling interrupts
128
129During the execution of directive calls, critical sections of code may be
130executed.  When these sections are encountered, RTEMS disables all maskable
131interrupts before the execution of the section and restores them to the
132previous level upon completion of the section.  RTEMS has been optimized to
133ensure that interrupts are disabled for a minimum length of time.  The maximum
134length of time interrupts are disabled by RTEMS is processor dependent and is
135detailed in the Timing Specification chapter of the Applications Supplement
136document for a specific target processor.
137
138Non-maskable interrupts (NMI) cannot be disabled, and ISRs which execute at
139this level MUST NEVER issue RTEMS system calls.  If a directive is invoked,
140unpredictable results may occur due to the inability of RTEMS to protect its
141critical sections.  However, ISRs that make no system calls may safely execute
142as non-maskable interrupts.
143
144Operations
145==========
146
147Establishing an ISR
148-------------------
149
150The ``rtems_interrupt_catch`` directive establishes an ISR for the system.  The
151address of the ISR and its associated CPU vector number are specified to this
152directive.  This directive installs the RTEMS interrupt wrapper in the
153processor's Interrupt Vector Table and the address of the user's ISR in the
154RTEMS' Vector Table.  This directive returns the previous contents of the
155specified vector in the RTEMS' Vector Table.
156
157Directives Allowed from an ISR
158------------------------------
159
160Using the interrupt manager ensures that RTEMS knows when a directive is being
161called from an ISR.  The ISR may then use system calls to synchronize itself
162with an application task.  The synchronization may involve messages, events or
163signals being passed by the ISR to the desired task.  Directives invoked by an
164ISR must operate only on objects which reside on the local node.  The following
165is a list of RTEMS system calls that may be made from an ISR:
166
167- Task Management
168  Although it is acceptable to operate on the RTEMS_SELF task (e.g.  the
169  currently executing task), while in an ISR, this will refer to the
170  interrupted task.  Most of the time, it is an application implementation
171  error to use RTEMS_SELF from an ISR.
172
173  - rtems_task_suspend
174  - rtems_task_resume
175
176- Interrupt Management
177
178  - rtems_interrupt_enable
179  - rtems_interrupt_disable
180  - rtems_interrupt_flash
181  - rtems_interrupt_lock_acquire
182  - rtems_interrupt_lock_release
183  - rtems_interrupt_lock_acquire_isr
184  - rtems_interrupt_lock_release_isr
185  - rtems_interrupt_is_in_progress
186  - rtems_interrupt_catch
187
188- Clock Management
189
190  - rtems_clock_set
191  - rtems_clock_get_tod
192  - rtems_clock_get_tod_timeval
193  - rtems_clock_get_seconds_since_epoch
194  - rtems_clock_get_ticks_per_second
195  - rtems_clock_get_ticks_since_boot
196  - rtems_clock_get_uptime
197  - rtems_timecounter_tick
198  - rtems_timecounter_simple_downcounter_tick
199  - rtems_timecounter_simple_upcounter_tick
200
201- Timer Management
202
203  - rtems_timer_cancel
204  - rtems_timer_reset
205  - rtems_timer_fire_after
206  - rtems_timer_fire_when
207  - rtems_timer_server_fire_after
208  - rtems_timer_server_fire_when
209
210- Event Management
211
212  - rtems_event_send
213  - rtems_event_system_send
214  - rtems_event_transient_send
215
216- Semaphore Management
217
218  - rtems_semaphore_release
219
220- Message Management
221
222  - rtems_message_queue_send
223  - rtems_message_queue_urgent
224
225- Signal Management
226
227  - rtems_signal_send
228
229- Dual-Ported Memory Management
230
231  - rtems_port_external_to_internal
232  - rtems_port_internal_to_external
233
234- IO Management
235  The following services are safe to call from an ISR if and only if
236  the device driver service invoked is also safe.  The IO Manager itself
237  is safe but the invoked driver entry point may or may not be.
238
239  - rtems_io_initialize
240  - rtems_io_open
241  - rtems_io_close
242  - rtems_io_read
243  - rtems_io_write
244  - rtems_io_control
245
246- Fatal Error Management
247
248  - rtems_fatal
249  - rtems_fatal_error_occurred
250
251- Multiprocessing
252
253  - rtems_multiprocessing_announce
254
255Directives
256==========
257
258This section details the interrupt manager's directives.  A subsection is
259dedicated to each of this manager's directives and describes the calling
260sequence, related constants, usage, and status codes.
261
262.. raw:: latex
263
264   \clearpage
265
266.. _rtems_interrupt_catch:
267
268INTERRUPT_CATCH - Establish an ISR
269----------------------------------
270.. index:: establish an ISR
271.. index:: install an ISR
272.. index:: rtems_interrupt_catch
273
274CALLING SEQUENCE:
275    .. code-block:: c
276
277        rtems_status_code rtems_interrupt_catch(
278            rtems_isr_entry      new_isr_handler,
279            rtems_vector_number  vector,
280            rtems_isr_entry     *old_isr_handler
281        );
282
283DIRECTIVE STATUS CODES:
284    .. list-table::
285     :class: rtems-wrap
286
287     * - ``RTEMS_SUCCESSFUL``
288       -  ISR established successfully
289     * - ``RTEMS_INVALID_NUMBER``
290       -  illegal vector number
291     * - ``RTEMS_INVALID_ADDRESS``
292       -  illegal ISR entry point or invalid ``old_isr_handler``
293
294DESCRIPTION:
295    This directive establishes an interrupt service routine (ISR) for the
296    specified interrupt vector number.  The ``new_isr_handler`` parameter
297    specifies the entry point of the ISR.  The entry point of the previous ISR
298    for the specified vector is returned in ``old_isr_handler``.
299
300    To release an interrupt vector, pass the old handler's address obtained
301    when the vector was first capture.
302
303NOTES:
304    This directive will not cause the calling task to be preempted.
305
306.. raw:: latex
307
308   \clearpage
309
310.. _rtems_interrupt_disable:
311
312INTERRUPT_DISABLE - Disable Interrupts
313--------------------------------------
314.. index:: disable interrupts
315.. index:: rtems_interrupt_disable
316
317CALLING SEQUENCE:
318    .. code-block:: c
319
320        void rtems_interrupt_disable(
321            rtems_interrupt_level  level
322        );
323
324DIRECTIVE STATUS CODES:
325    NONE
326
327DESCRIPTION:
328    This directive disables all maskable interrupts and returns the previous
329    ``level``.  A later invocation of the ``rtems_interrupt_enable`` directive
330    should be used to restore the interrupt level.
331
332.. sidebar:: *Macro*
333
334  This directive is implemented as a macro which modifies the ``level``
335  parameter.
336
337NOTES:
338    This directive will not cause the calling task to be preempted.
339
340    This directive is only available on uni-processor configurations.  The
341    directive ``rtems_interrupt_local_disable`` is available on all
342    configurations.
343
344.. raw:: latex
345
346   \clearpage
347
348.. _rtems_interrupt_enable:
349
350INTERRUPT_ENABLE - Enable Interrupts
351------------------------------------
352.. index:: enable interrupts
353.. index:: rtems_interrupt_enable
354
355CALLING SEQUENCE:
356    .. code-block:: c
357
358        void rtems_interrupt_enable(
359           rtems_interrupt_level  level
360        );
361
362DIRECTIVE STATUS CODES:
363    NONE
364
365DESCRIPTION:
366    This directive enables maskable interrupts to the ``level`` which was
367    returned by a previous call to ``rtems_interrupt_disable``.  Immediately
368    prior to invoking this directive, maskable interrupts should be disabled by
369    a call to ``rtems_interrupt_disable`` and will be enabled when this
370    directive returns to the caller.
371
372NOTES:
373    This directive will not cause the calling task to be preempted.
374
375    This directive is only available on uni-processor configurations.  The
376    directive ``rtems_interrupt_local_enable`` is available on all
377    configurations.
378
379.. raw:: latex
380
381   \clearpage
382
383.. _rtems_interrupt_flash:
384
385INTERRUPT_FLASH - Flash Interrupts
386----------------------------------
387.. index:: flash interrupts
388.. index:: rtems_interrupt_flash
389
390CALLING SEQUENCE:
391    .. code-block:: c
392
393        void rtems_interrupt_flash(
394            rtems_interrupt_level level
395        );
396
397DIRECTIVE STATUS CODES:
398    NONE
399
400DESCRIPTION:
401    This directive temporarily enables maskable interrupts to the ``level``
402    which was returned by a previous call to ``rtems_interrupt_disable``.
403    Immediately prior to invoking this directive, maskable interrupts should be
404    disabled by a call to ``rtems_interrupt_disable`` and will be redisabled
405    when this directive returns to the caller.
406
407NOTES:
408    This directive will not cause the calling task to be preempted.
409
410    This directive is only available on uni-processor configurations.  The
411    directives ``rtems_interrupt_local_disable`` and
412    ``rtems_interrupt_local_enable`` is available on all configurations.
413
414.. raw:: latex
415
416   \clearpage
417
418.. _rtems_interrupt_local_disable:
419
420INTERRUPT_LOCAL_DISABLE - Disable Interrupts on Current Processor
421-----------------------------------------------------------------
422.. index:: disable interrupts
423.. index:: rtems_interrupt_local_disable
424
425CALLING SEQUENCE:
426    .. code-block:: c
427
428        void rtems_interrupt_local_disable(
429            rtems_interrupt_level  level
430        );
431
432DIRECTIVE STATUS CODES:
433    NONE
434
435DESCRIPTION:
436    This directive disables all maskable interrupts and returns the previous
437    ``level``.  A later invocation of the ``rtems_interrupt_local_enable``
438    directive should be used to restore the interrupt level.
439
440.. sidebar:: *Macro*
441
442  This directive is implemented as a macro which modifies the ``level``
443  parameter.
444
445NOTES:
446    This directive will not cause the calling task to be preempted.
447
448    In SMP configurations, this will not ensure system wide mutual exclusion.
449    Use interrupt locks instead.
450
451.. raw:: latex
452
453   \clearpage
454
455.. _rtems_interrupt_local_enable:
456
457INTERRUPT_LOCAL_ENABLE - Enable Interrupts on Current Processor
458---------------------------------------------------------------
459.. index:: enable interrupts
460.. index:: rtems_interrupt_local_enable
461
462CALLING SEQUENCE:
463    .. code-block:: c
464
465        void rtems_interrupt_local_enable(
466            rtems_interrupt_level  level
467        );
468
469DIRECTIVE STATUS CODES:
470    NONE
471
472DESCRIPTION:
473    This directive enables maskable interrupts to the ``level`` which was
474    returned by a previous call to ``rtems_interrupt_local_disable``.
475    Immediately prior to invoking this directive, maskable interrupts should be
476    disabled by a call to ``rtems_interrupt_local_disable`` and will be enabled
477    when this directive returns to the caller.
478
479NOTES:
480    This directive will not cause the calling task to be preempted.
481
482.. raw:: latex
483
484   \clearpage
485
486.. _rtems_interrupt_lock_initialize:
487
488INTERRUPT_LOCK_INITIALIZE - Initialize an ISR Lock
489--------------------------------------------------
490.. index:: rtems_interrupt_lock_initialize
491
492CALLING SEQUENCE:
493    .. code-block:: c
494
495        void rtems_interrupt_lock_initialize(
496            rtems_interrupt_lock *lock,
497            const char           *name
498        );
499
500DIRECTIVE STATUS CODES:
501    NONE
502
503DESCRIPTION:
504    Initializes an interrupt lock.  The name must be persistent throughout the
505    lifetime of the lock.
506
507NOTES:
508    Concurrent initialization leads to unpredictable results.
509
510.. raw:: latex
511
512   \clearpage
513
514.. _rtems_interrupt_lock_acquire:
515
516INTERRUPT_LOCK_ACQUIRE - Acquire an ISR Lock
517--------------------------------------------
518.. index:: rtems_interrupt_lock_acquire
519
520CALLING SEQUENCE:
521    .. code-block:: c
522
523        void rtems_interrupt_lock_acquire(
524            rtems_interrupt_lock         *lock,
525            rtems_interrupt_lock_context *lock_context
526        );
527
528DIRECTIVE STATUS CODES:
529    NONE
530
531DESCRIPTION:
532    Interrupts will be disabled.  In SMP configurations, this directive
533    acquires an SMP lock.
534
535NOTES:
536    A separate lock context must be provided for each acquire/release pair, for
537    example an automatic variable.
538
539    An attempt to recursively acquire the lock may result in an infinite loop
540    with interrupts disabled.
541
542    This directive will not cause the calling thread to be preempted.  This
543    directive can be used in thread and interrupt context.
544
545.. raw:: latex
546
547   \clearpage
548
549.. _rtems_interrupt_lock_release:
550
551INTERRUPT_LOCK_RELEASE - Release an ISR Lock
552--------------------------------------------
553.. index:: rtems_interrupt_lock_release
554
555CALLING SEQUENCE:
556    .. code-block:: c
557
558        void rtems_interrupt_lock_release(
559            rtems_interrupt_lock         *lock,
560            rtems_interrupt_lock_context *lock_context
561        );
562
563DIRECTIVE STATUS CODES:
564    NONE
565
566DESCRIPTION:
567    The interrupt status will be restored.  In SMP configurations, this
568    directive releases an SMP lock.
569
570NOTES:
571    The lock context must be the one used to acquire the lock, otherwise the
572    result is unpredictable.
573
574    This directive will not cause the calling thread to be preempted.  This
575    directive can be used in thread and interrupt context.
576
577.. raw:: latex
578
579   \clearpage
580
581.. _rtems_interrupt_lock_acquire_isr:
582
583INTERRUPT_LOCK_ACQUIRE_ISR - Acquire an ISR Lock from ISR
584---------------------------------------------------------
585.. index:: rtems_interrupt_lock_acquire_isr
586
587CALLING SEQUENCE:
588    .. code-block:: c
589
590        void rtems_interrupt_lock_acquire_isr(
591            rtems_interrupt_lock         *lock,
592            rtems_interrupt_lock_context *lock_context
593        );
594
595DIRECTIVE STATUS CODES:
596    NONE
597
598DESCRIPTION:
599    The interrupt status will remain unchanged.  In SMP configurations, this
600    directive acquires an SMP lock.
601
602NOTES:
603    A separate lock context must be provided for each acquire/release pair, for
604    example an automatic variable.
605
606    An attempt to recursively acquire the lock may result in an infinite loop.
607
608    This directive is intended for device drivers and should be called from the
609    corresponding interrupt service routine.
610
611    In case the corresponding interrupt service routine can be interrupted by
612    higher priority interrupts and these interrupts enter the critical section
613    protected by this lock, then the result is unpredictable.
614
615.. raw:: latex
616
617   \clearpage
618
619.. _rtems_interrupt_lock_release_isr:
620
621INTERRUPT_LOCK_RELEASE_ISR - Release an ISR Lock from ISR
622---------------------------------------------------------
623.. index:: rtems_interrupt_lock_release_isr
624
625CALLING SEQUENCE:
626    .. code-block:: c
627
628        void rtems_interrupt_lock_release_isr(
629            rtems_interrupt_lock         *lock,
630            rtems_interrupt_lock_context *lock_context
631        );
632
633DIRECTIVE STATUS CODES:
634    NONE
635
636DESCRIPTION:
637    The interrupt status will remain unchanged.  In SMP configurations, this
638    directive releases an SMP lock.
639
640NOTES:
641    The lock context must be the one used to acquire the lock, otherwise the
642    result is unpredictable.
643
644    This directive is intended for device drivers and should be called from the
645    corresponding interrupt service routine.
646
647.. raw:: latex
648
649   \clearpage
650
651.. _rtems_interrupt_is_in_progress:
652
653INTERRUPT_IS_IN_PROGRESS - Is an ISR in Progress
654------------------------------------------------
655.. index:: is interrupt in progress
656.. index:: rtems_interrupt_is_in_progress
657
658CALLING SEQUENCE:
659    .. code-block:: c
660
661        bool rtems_interrupt_is_in_progress(void);
662
663DIRECTIVE STATUS CODES:
664    NONE
665
666DESCRIPTION:
667    This directive returns ``TRUE`` if the processor is currently servicing an
668    interrupt and ``FALSE`` otherwise.  A return value of ``TRUE`` indicates
669    that the caller is an interrupt service routine, *NOT* a task.  The
670    directives available to an interrupt service routine are restricted.
671
672NOTES:
673    This directive will not cause the calling task to be preempted.
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