source: rtems-docs/bsp_howto/shared_memory_support.rst @ f916fca

4.115
Last change on this file since f916fca was d389819, checked in by Amar Takhar <amar@…>, on 01/18/16 at 05:37:40

Convert all Unicode to ASCII(128)

  • Property mode set to 100644
File size: 7.5 KB
Line 
1Shared Memory Support Driver
2############################
3
4The Shared Memory Support Driver is responsible for providing glue
5routines and configuration information required by the Shared
6Memory Multiprocessor Communications Interface (MPCI).  The
7Shared Memory Support Driver tailors the portable Shared
8Memory Driver to a particular target platform.
9
10This driver is only required in shared memory multiprocessing
11systems that use the RTEMS mulitprocessing support.  For more
12information on RTEMS multiprocessing capabilities and the
13MPCI, refer to the *Multiprocessing Manager* chapter
14of the *RTEMS Application C User's Guide*.
15
16Shared Memory Configuration Table
17=================================
18
19The Shared Memory Configuration Table is defined in the following
20structure:
21.. code:: c
22
23    typedef volatile uint32_t vol_u32;
24    typedef struct {
25    vol_u32 \*address;        /* write here for interrupt    \*/
26    vol_u32  value;          /* this value causes interrupt \*/
27    vol_u32  length;         /* for this length (0,1,2,4)   \*/
28    } Shm_Interrupt_information;
29    struct shm_config_info {
30    vol_u32           \*base;       /* base address of SHM         \*/
31    vol_u32            length;     /* length (in bytes) of SHM    \*/
32    vol_u32            format;     /* SHM is big or little endian \*/
33    vol_u32          (\*convert)(); /* neutral conversion routine  \*/
34    vol_u32            poll_intr;  /* POLLED or INTR driven mode  \*/
35    void             (\*cause_intr)( uint32_t );
36    Shm_Interrupt_information   Intr; /* cause intr information   \*/
37    };
38    typedef struct shm_config_info shm_config_table;
39
40where the fields are defined as follows:
41
42*base*
43    is the base address of the shared memory buffer used to pass
44    messages between the nodes in the system.
45
46*length*
47    is the length (in bytes) of the shared memory buffer used to pass
48    messages between the nodes in the system.
49
50*format*
51    is either SHM_BIG or SHM_LITTLE to indicate that the neutral format
52    of the shared memory area is big or little endian.  The format
53    of the memory should be chosen to match most of the inter-node traffic.
54
55*convert*
56    is the address of a routine which converts from native format to
57    neutral format.   Ideally, the neutral format is the same as the
58    native format so this routine is quite simple.
59
60*poll_intr*
61    is either INTR_MODE or POLLED_MODE to indicate how the node will be
62    informed of incoming messages.
63
64*cause_intr*
65
66*Intr*
67
68    is the information required to cause an interrupt on a node.  This
69    structure contains the following fields:
70
71    *address*
72
73        is the address to write at to cause an interrupt on that node.
74        For a polled node, this should be NULL.
75
76    *value*
77
78        is the value to write to cause an interrupt.
79
80    *length*
81
82        is the length of the entity to write on the node to cause an interrupt.
83        This can be 0 to indicate polled operation, 1 to write a byte, 2 to
84        write a sixteen-bit entity, and 4 to write a thirty-two bit entity.
85
86Primitives
87==========
88
89Convert Address
90---------------
91
92The ``Shm_Convert_address`` is responsible for converting an address
93of an entity in the shared memory area into the address that should be
94used from this node.  Most targets will simply return the address
95passed to this routine.  However, some target boards will have a special
96window onto the shared memory.  For example, some VMEbus boards have
97special address windows to access addresses that are normally reserved
98in the CPU's address space.
99.. code:: c
100
101    void \*Shm_Convert_address( void \*address )
102    {
103    return the local address version of this bus address
104    }
105
106Get Configuration
107-----------------
108
109The ``Shm_Get_configuration`` routine is responsible for filling in the
110Shared Memory Configuration Table passed to it.
111.. code:: c
112
113    void Shm_Get_configuration(
114    uint32_t           localnode,
115    shm_config_table \**shmcfg
116    )
117    {
118    fill in the Shared Memory Configuration Table
119    }
120
121Locking Primitives
122------------------
123
124This is a collection of routines that are invoked by the portable
125part of the Shared Memory Driver to manage locks in the shared
126memory buffer area.  Accesses to the shared memory must be
127atomic.  Two nodes in a multiprocessor system must not be manipulating
128the shared data structures simultaneously.  The locking primitives
129are used to insure this.
130
131To avoid deadlock, local processor interrupts should be disabled the entire
132time the locked queue is locked.
133
134The locking primitives operate on the lock``field`` of the ``Shm_Locked_queue_Control``
135data structure.  This structure is defined as follows:
136.. code:: c
137
138    typedef struct {
139    vol_u32 lock;  /* lock field for this queue    \*/
140    vol_u32 front; /* first envelope on queue      \*/
141    vol_u32 rear;  /* last envelope on queue       \*/
142    vol_u32 owner; /* receiving (i.e. owning) node \*/
143    } Shm_Locked_queue_Control;
144
145where each field is defined as follows:
146
147*lock*
148    is the lock field.  Every node in the system must agree on how this
149    field will be used.  Many processor families provide an atomic
150    "test and set" instruction that is used to manage this field.
151
152*front*
153    is the index of the first message on this locked queue.
154
155*rear*
156    is the index of the last message on this locked queue.
157
158*owner*
159    is the node number of the node that currently has this structure locked.
160
161Initializing a Shared Lock
162~~~~~~~~~~~~~~~~~~~~~~~~~~
163
164The ``Shm_Initialize_lock`` routine is responsible for
165initializing the lock field.  This routines usually is implemented
166as follows:
167.. code:: c
168
169    void Shm_Initialize_lock(
170    Shm_Locked_queue_Control \*lq_cb
171    )
172    {
173    lq_cb->lock = LQ_UNLOCKED;
174    }
175
176Acquiring a Shared Lock
177~~~~~~~~~~~~~~~~~~~~~~~
178
179The ``Shm_Lock`` routine is responsible for
180acquiring the lock field.  Interrupts should be
181disabled while that lock is acquired.  If the lock
182is currently unavailble, then the locking routine
183should delay a few microseconds to allow the other
184node to release the lock.  Doing this reduces bus contention
185for the lock.  This routines usually is implemented as follows:
186.. code:: c
187
188    void Shm_Lock(
189    Shm_Locked_queue_Control \*lq_cb
190    )
191    {
192    disable processor interrupts
193    set Shm_isrstat to previous interrupt disable level
194    while ( TRUE ) {
195    atomically attempt to acquire the lock
196    if the lock was acquired
197    return
198    delay some small period of time
199    }
200    }
201
202Releasing a Shared Lock
203~~~~~~~~~~~~~~~~~~~~~~~
204
205The ``Shm_Unlock`` routine is responsible for
206releasing the lock field and reenabling processor
207interrupts.  This routines usually is implemented as follows:
208.. code:: c
209
210    void Shm_Unlock(
211    Shm_Locked_queue_Control \*lq_cb
212    )
213    {
214    set the lock to the unlocked value
215    reenable processor interrupts to their level prior
216    to the lock being acquired.  This value was saved
217    in the global variable Shm_isrstat
218    }
219
220Installing the MPCI ISR
221=======================
222
223The ``Shm_setvec`` is invoked by the portable portion
224of the shared memory to install the interrupt service routine
225that is invoked when an incoming message is announced.  Some
226target boards support an interprocessor interrupt or mailbox
227scheme and this is where the ISR for that interrupt would be
228installed.
229
230On an interrupt driven node, this routine would be implemented
231as follows:
232.. code:: c
233
234    void Shm_setvec( void )
235    {
236    install the interprocessor communications ISR
237    }
238
239On a polled node, this routine would be empty.
240
241.. COMMENT: COPYRIGHT (c) 1988-2009.
242
243.. COMMENT: On-Line Applications Research Corporation (OAR).
244
245.. COMMENT: All rights reserved.
246
Note: See TracBrowser for help on using the repository browser.