1 | .. comment SPDX-License-Identifier: CC-BY-SA-4.0 |
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2 | |
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3 | .. COMMENT: COPYRIGHT (c) 1988-2009. |
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4 | .. COMMENT: On-Line Applications Research Corporation (OAR). |
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5 | .. COMMENT: All rights reserved. |
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6 | |
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7 | Shared Memory Support Driver |
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8 | **************************** |
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9 | |
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10 | The Shared Memory Support Driver is responsible for providing glue routines and |
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11 | configuration information required by the Shared Memory Multiprocessor |
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12 | Communications Interface (MPCI). The Shared Memory Support Driver tailors the |
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13 | portable Shared Memory Driver to a particular target platform. |
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14 | |
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15 | This driver is only required in shared memory multiprocessing systems that use |
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16 | the RTEMS mulitprocessing support. For more information on RTEMS |
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17 | multiprocessing capabilities and the MPCI, refer to the *Multiprocessing |
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18 | Manager* chapter of the *RTEMS Application C User's Guide*. |
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19 | |
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20 | Shared Memory Configuration Table |
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21 | ================================= |
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22 | |
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23 | The Shared Memory Configuration Table is defined in the following structure: |
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24 | |
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25 | .. code-block:: c |
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26 | |
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27 | typedef volatile uint32_t vol_u32; |
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28 | |
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29 | typedef struct { |
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30 | vol_u32 *address; /* write here for interrupt */ |
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31 | vol_u32 value; /* this value causes interrupt */ |
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32 | vol_u32 length; /* for this length (0,1,2,4) */ |
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33 | } Shm_Interrupt_information; |
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34 | |
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35 | struct shm_config_info { |
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36 | vol_u32 *base; /* base address of SHM */ |
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37 | vol_u32 length; /* length (in bytes) of SHM */ |
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38 | vol_u32 format; /* SHM is big or little endian */ |
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39 | vol_u32 (*convert)(); /* neutral conversion routine */ |
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40 | vol_u32 poll_intr; /* POLLED or INTR driven mode */ |
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41 | void (*cause_intr)( uint32_t ); |
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42 | Shm_Interrupt_information Intr; /* cause intr information */ |
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43 | }; |
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44 | |
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45 | typedef struct shm_config_info shm_config_table; |
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46 | |
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47 | where the fields are defined as follows: |
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48 | |
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49 | ``base`` |
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50 | is the base address of the shared memory buffer used to pass messages |
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51 | between the nodes in the system. |
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52 | |
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53 | ``length`` |
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54 | is the length (in bytes) of the shared memory buffer used to pass messages |
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55 | between the nodes in the system. |
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56 | |
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57 | ``format`` |
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58 | is either ``SHM_BIG`` or ``SHM_LITTLE`` to indicate that the neutral format |
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59 | of the shared memory area is big or little endian. The format of the |
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60 | memory should be chosen to match most of the inter-node traffic. |
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61 | |
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62 | ``convert`` |
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63 | is the address of a routine which converts from native format to neutral |
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64 | format. Ideally, the neutral format is the same as the native format so |
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65 | this routine is quite simple. |
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66 | |
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67 | ``poll_intr``, ``cause_intr`` |
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68 | is either ``INTR_MODE`` or ``POLLED_MODE`` to indicate how the node will be |
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69 | informed of incoming messages. |
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70 | |
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71 | ``Intr`` |
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72 | is the information required to cause an interrupt on a node. This |
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73 | structure contains the following fields: |
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74 | |
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75 | ``address`` |
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76 | is the address to write at to cause an interrupt on that node. For a |
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77 | polled node, this should be NULL. |
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78 | |
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79 | ``value`` |
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80 | is the value to write to cause an interrupt. |
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81 | |
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82 | ``length`` |
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83 | is the length of the entity to write on the node to cause an interrupt. |
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84 | This can be 0 to indicate polled operation, 1 to write a byte, 2 to |
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85 | write a sixteen-bit entity, and 4 to write a thirty-two bit entity. |
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86 | |
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87 | Primitives |
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88 | ========== |
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89 | |
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90 | Convert Address |
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91 | --------------- |
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92 | |
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93 | The ``Shm_Convert_address`` is responsible for converting an address of an |
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94 | entity in the shared memory area into the address that should be used from this |
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95 | node. Most targets will simply return the address passed to this routine. |
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96 | However, some target boards will have a special window onto the shared memory. |
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97 | For example, some VMEbus boards have special address windows to access |
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98 | addresses that are normally reserved in the CPU's address space. |
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99 | |
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100 | .. code-block:: c |
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101 | |
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102 | void *Shm_Convert_address( void *address ) |
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103 | { |
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104 | return the local address version of this bus address |
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105 | } |
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106 | |
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107 | Get Configuration |
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108 | ----------------- |
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109 | |
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110 | The ``Shm_Get_configuration`` routine is responsible for filling in the Shared |
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111 | Memory Configuration Table passed to it. |
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112 | |
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113 | .. code-block:: c |
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114 | |
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115 | void Shm_Get_configuration( |
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116 | uint32_t localnode, |
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117 | shm_config_table **shmcfg |
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118 | ) |
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119 | { |
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120 | fill in the Shared Memory Configuration Table |
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121 | } |
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122 | |
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123 | Locking Primitives |
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124 | ------------------ |
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125 | |
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126 | This is a collection of routines that are invoked by the portable part of the |
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127 | Shared Memory Driver to manage locks in the shared memory buffer area. |
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128 | Accesses to the shared memory must be atomic. Two nodes in a multiprocessor |
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129 | system must not be manipulating the shared data structures simultaneously. The |
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130 | locking primitives are used to insure this. |
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131 | |
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132 | To avoid deadlock, local processor interrupts should be disabled the entire |
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133 | time the locked queue is locked. |
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134 | |
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135 | The locking primitives operate on the lock ``field`` of the |
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136 | ``Shm_Locked_queue_Control`` data structure. This structure is defined as |
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137 | follows: |
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138 | |
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139 | .. code-block:: c |
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140 | |
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141 | typedef struct { |
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142 | vol_u32 lock; /* lock field for this queue */ |
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143 | vol_u32 front; /* first envelope on queue */ |
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144 | vol_u32 rear; /* last envelope on queue */ |
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145 | vol_u32 owner; /* receiving (i.e. owning) node */ |
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146 | } Shm_Locked_queue_Control; |
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147 | |
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148 | where each field is defined as follows: |
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149 | |
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150 | ``lock`` |
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151 | is the lock field. Every node in the system must agree on how this field |
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152 | will be used. Many processor families provide an atomic "test and set" |
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153 | instruction that is used to manage this field. |
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154 | |
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155 | ``front`` |
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156 | is the index of the first message on this locked queue. |
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157 | |
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158 | ``rear`` |
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159 | is the index of the last message on this locked queue. |
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160 | |
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161 | ``owner`` |
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162 | is the node number of the node that currently has this structure locked. |
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163 | |
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164 | Initializing a Shared Lock |
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165 | ~~~~~~~~~~~~~~~~~~~~~~~~~~ |
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166 | |
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167 | The ``Shm_Initialize_lock`` routine is responsible for initializing the lock |
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168 | field. This routines usually is implemented as follows: |
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169 | |
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170 | .. code-block:: c |
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171 | |
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172 | void Shm_Initialize_lock( |
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173 | Shm_Locked_queue_Control *lq_cb |
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174 | ) |
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175 | { |
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176 | lq_cb->lock = LQ_UNLOCKED; |
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177 | } |
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178 | |
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179 | Acquiring a Shared Lock |
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180 | ~~~~~~~~~~~~~~~~~~~~~~~ |
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181 | |
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182 | The ``Shm_Lock`` routine is responsible for acquiring the lock field. |
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183 | Interrupts should be disabled while that lock is acquired. If the lock is |
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184 | currently unavailble, then the locking routine should delay a few microseconds |
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185 | to allow the other node to release the lock. Doing this reduces bus contention |
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186 | for the lock. This routines usually is implemented as follows: |
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187 | |
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188 | .. code-block:: c |
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189 | |
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190 | void Shm_Lock( |
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191 | Shm_Locked_queue_Control *lq_cb |
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192 | ) |
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193 | { |
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194 | disable processor interrupts |
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195 | set Shm_isrstat to previous interrupt disable level |
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196 | |
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197 | while ( TRUE ) { |
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198 | atomically attempt to acquire the lock |
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199 | if the lock was acquired |
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200 | return |
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201 | delay some small period of time |
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202 | } |
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203 | } |
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204 | |
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205 | Releasing a Shared Lock |
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206 | ~~~~~~~~~~~~~~~~~~~~~~~ |
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207 | |
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208 | The ``Shm_Unlock`` routine is responsible for releasing the lock field and |
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209 | reenabling processor interrupts. This routines usually is implemented as |
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210 | follows: |
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211 | |
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212 | .. code-block:: c |
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213 | |
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214 | void Shm_Unlock( |
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215 | Shm_Locked_queue_Control *lq_cb |
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216 | ) |
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217 | { |
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218 | set the lock to the unlocked value |
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219 | reenable processor interrupts to their level prior |
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220 | to the lock being acquired. This value was saved |
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221 | in the global variable Shm_isrstat |
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222 | } |
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223 | |
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224 | Installing the MPCI ISR |
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225 | ======================= |
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226 | |
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227 | The ``Shm_setvec`` is invoked by the portable portion of the shared memory to |
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228 | install the interrupt service routine that is invoked when an incoming message |
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229 | is announced. Some target boards support an interprocessor interrupt or |
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230 | mailbox scheme and this is where the ISR for that interrupt would be installed. |
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231 | |
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232 | On an interrupt driven node, this routine would be implemented |
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233 | as follows: |
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234 | |
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235 | .. code-block:: c |
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236 | |
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237 | void Shm_setvec( void ) |
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238 | { |
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239 | install the interprocessor communications ISR |
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240 | } |
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241 | |
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242 | On a polled node, this routine would be empty. |
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