source: libbsdport/bsd_eth_drivers/libbsdport/bus.h @ 89376b7

B_20100615baselibbsdport-4-10-branch initial
Last change on this file since 89376b7 was 89376b7, checked in by Joel Sherrill <joel.sherrill@…>, on Feb 19, 2009 at 7:55:40 PM

Initial import.

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1#ifndef LIBBSDPORT_SYS_BUS_H
2#define LIBBSDPORT_SYS_BUS_H
3
4#include <rtems.h>
5#include <sys/errno.h>
6#include <bsp.h>
7#include <devicet.h>
8#include <sys/mbuf.h>
9
10typedef uint32_t bus_addr_t;
11typedef size_t   bus_size_t;
12
13typedef enum {
14        bus_space_mem = 0,
15        bus_space_io  = 1
16} bus_space_tag_t;
17
18struct resource;
19
20typedef bus_addr_t bus_space_handle_t;
21
22/* The 'bus_space_xxx()' inlines can be helped if the
23 * tag is hardcoded in the driver so that the compiler
24 * can optimize part of the implementation away.
25 */
26
27#define BUS_SPACE_BARRIER_WRITE 1
28#define BUS_SPACE_BARRIER_READ  2
29
30#if defined(__i386__)
31
32#include <rtems/score/cpu.h>
33
34static inline void
35bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, int width, int type)
36{
37}
38
39#define BUS_SPACE_DECL(type, width, nwidth) \
40static inline type \
41bus_space_read_##nwidth(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o) \
42{ \
43type v; \
44        if ( bus_space_io == t ) { \
45                /* this is a macro setting the second argument */ \
46                inport_##width( h+o, v ); \
47        } else { \
48                v = *(volatile type __attribute__((may_alias)) *)(h+o); \
49        } \
50        return v; \
51} \
52  \
53static inline void \
54bus_space_write_##nwidth(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, type v) \
55{ \
56        if ( bus_space_io == t ) { \
57                outport_##width( h+o, v ); \
58        } else { \
59                *(volatile type __attribute__((may_alias)) *)(h+o) = v; \
60        }\
61}
62
63BUS_SPACE_DECL(u_int32_t, long, 4)
64BUS_SPACE_DECL(u_int16_t, word, 2)
65BUS_SPACE_DECL(u_int8_t,  byte, 1)
66
67#elif defined(__PPC__)
68
69#include <libcpu/io.h>
70
71#if defined(_IO_BASE) && _IO_BASE == 0
72#define BUS_SPACE_ALWAYS_MEM 1
73#else
74#define BUS_SPACE_ALWAYS_MEM 0
75#endif
76
77static inline void
78bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, int width, int type)
79{
80        asm volatile("eieio");
81}
82
83
84#define BUS_SPACE_DECL(type, width, nwidth, op) \
85static inline type \
86bus_space_read_##nwidth(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o) \
87{ \
88type v; \
89        if ( !BUS_SPACE_ALWAYS_MEM && bus_space_io == t ) { \
90                /* this is a macro setting the second argument */ \
91                v = in_##op((volatile type *)(_IO_BASE+h+o)); \
92        } else { \
93                v = in_##op((volatile type *)(h+o)); \
94        } \
95        return v; \
96} \
97  \
98static inline void \
99bus_space_write_##nwidth(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, type v) \
100{ \
101        if ( !BUS_SPACE_ALWAYS_MEM && bus_space_io == t ) { \
102                out_##op((volatile type *)(_IO_BASE+h+o), v); \
103        } else { \
104                out_##op((volatile type *)(h+o), v); \
105        }\
106}
107
108BUS_SPACE_DECL(u_int32_t, long, 4, le32)
109BUS_SPACE_DECL(u_int16_t, word, 2, le16)
110BUS_SPACE_DECL(u_int8_t,  byte, 1, 8)
111
112#undef BUS_SPACE_ALWAYS_MEM
113
114#else
115#error "Missing definitions of bus_space_XXX() for this CPU architecture"
116#endif
117
118
119#undef BUS_SPACE_DECL
120
121#ifndef BUS_PROBE_DEFAULT
122#define BUS_PROBE_DEFAULT 0
123#endif
124
125/* error codes are > 0 ; low priority says that probe
126 * was successful but another driver returning BUS_PROBE_DEFAULT
127 * is to be preferred...
128 */
129#ifndef BUS_PROBE_LOW_PRIORITY
130#define BUS_PROBE_LOW_PRIORITY (-1)
131#endif
132
133
134
135/* types -> -1 means unsupported */
136#define SYS_RES_IOPORT  1
137#define SYS_RES_MEMORY  2
138#define SYS_RES_IRQ     3
139
140/* flags (1<<31) means unsupported */
141#define RF_ACTIVE       (1<<1)
142#define RF_SHAREABLE    (1<<2)
143
144struct resource *
145bus_alloc_resource_any(device_t dev, int type, int *prid, unsigned flags);
146
147#define FILTER_STRAY 1
148#define FILTER_HANDLED 0
149
150typedef void (*driver_intr_t)(void *);
151typedef int  (*driver_filter_t)(void *);
152
153int
154bus_setup_intr(device_t dev, struct resource *r, int flags, driver_filter_t filter, driver_intr_t handler, void *arg, void **cookiep);
155
156/* Flags currently ignored... */
157#define INTR_MPSAFE         0
158#define INTR_TYPE_NET   0
159/* INTR_FAST indicates that a 'handler' is actually
160 * a 'fast' handler which already uses taskqueues
161 */
162#define INTR_FAST       1
163
164int
165bus_teardown_intr(device_t dev, struct resource *r, void *cookiep);
166
167static inline int
168bus_release_resource(device_t dev, int type, int rid, struct resource *r)
169{
170        return 0;
171}
172
173#define bus_generic_detach(dev) do {} while (0)
174
175#define bus_generic_suspend(dev) (0)
176#define bus_generic_resume(dev)  (0)
177
178bus_space_handle_t
179rman_get_bushandle(struct resource *r);
180
181bus_space_tag_t
182rman_get_bustag(struct resource *r);
183
184#ifndef BUS_DMA_NOWAIT 
185/* ignored anyways */
186#define BUS_DMA_NOWAIT 0
187#endif
188
189#ifndef BUS_DMA_WAITOK 
190/* ignored anyways */
191#define BUS_DMA_WAITOK 0
192#endif
193
194#ifndef BUS_DMA_COHERENT       
195/* ignored anyways */
196#define BUS_DMA_COHERENT 0
197#endif
198
199#ifndef BUS_DMA_ZERO   
200/* ignored anyways */
201#define BUS_DMA_ZERO 0
202#endif
203
204#ifndef BUS_DMA_ALLOCNOW       
205/* ignored anyways */
206#define BUS_DMA_ALLOCNOW 0
207#endif
208
209/* unused */
210#ifndef BUS_SPACE_MAXADDR
211#define BUS_SPACE_MAXADDR 0xdeadbeef
212#endif
213
214/* unused */
215#ifndef BUS_SPACE_MAXADDR_32BIT
216#define BUS_SPACE_MAXADDR_32BIT 0xdeadbeef
217#endif
218
219/* unused */
220#ifndef BUS_SPACE_MAXSIZE_32BIT
221#define BUS_SPACE_MAXSIZE_32BIT 0x10000000
222#endif
223
224typedef struct _bus_dma_tag_t {
225        unsigned alignment;
226        unsigned maxsize;
227        unsigned maxsegs;
228} * bus_dma_tag_t;
229
230typedef struct _bus_dma_segment_t {
231        bus_addr_t      ds_addr;
232        bus_size_t  ds_len;
233} bus_dma_segment_t;
234
235typedef void *bus_dmamap_t;
236
237int
238bus_dma_tag_create(void *parent, unsigned alignment, unsigned bounds, uint32_t lowadd, uint32_t hiaddr, void (*filter)(void*), void *filterarg, unsigned maxsize, int nsegs, unsigned maxsegsize, unsigned flags, void (*lockfunc)(void*), void *lockarg, bus_dma_tag_t *ptag);
239
240void
241bus_dma_tag_destroy(bus_dma_tag_t tag);
242
243int
244bus_dmamem_alloc(bus_dma_tag_t tag, void **p_vaddr, unsigned flags, bus_dmamap_t *p_map);
245
246void
247bus_dmamem_free(bus_dma_tag_t tag, void *vaddr, bus_dmamap_t map);
248       
249#ifndef CPU2BUSADDR
250#ifndef PCI_DRAM_OFFSET
251#define PCI_DRAM_OFFSET 0
252#endif
253#define CPU2BUSADDR(x) ((uint32_t)(x) + (PCI_DRAM_OFFSET))
254#endif
255
256#define kvtop(a)                        CPU2BUSADDR((bus_addr_t)(a))
257#define vtophys(a)                      CPU2BUSADDR((bus_addr_t)(a))
258
259
260static inline int
261bus_dmamap_load_mbuf_sg(bus_dma_tag_t tag, bus_dmamap_t map, struct mbuf *m_head, bus_dma_segment_t *segs, int *pnsegs, unsigned flags)
262{
263struct mbuf *m;
264int          n;
265        for ( m=m_head, n=0; m; m=m->m_next, n++ ) {
266                if ( n >= tag->maxsegs ) {
267                        return EFBIG;
268                }
269                segs[n].ds_addr = CPU2BUSADDR(mtod(m, unsigned));
270                segs[n].ds_len  = m->m_len;
271        }
272        *pnsegs = n;
273        return 0;
274}
275
276static inline bus_dma_tag_t
277bus_get_dma_tag(device_t dev)
278{
279        return 0;
280}
281
282typedef void bus_dmamap_callback_t (void *arg, bus_dma_segment_t *segs, int nseg, int error);
283
284static inline int
285bus_dmamap_load(bus_dma_tag_t tag, bus_dmamap_t map, caddr_t vaddr, bus_size_t size, bus_dmamap_callback_t cb, void *arg, unsigned flags)
286{
287bus_dma_segment_t segs[1];
288        segs[0].ds_addr = CPU2BUSADDR(vaddr);
289        segs[0].ds_len  = size;
290        cb(arg, segs, 1, 0);
291        return 0;
292}
293
294typedef void bus_dmamap_callback2_t (void *arg, bus_dma_segment_t *segs, int nsegs, bus_size_t mapsize, int error);
295
296static inline int
297bus_dmamap_load_mbuf(bus_dma_tag_t tag, bus_dmamap_t map, struct mbuf *m_head, bus_dmamap_callback2_t cb, void *arg, unsigned flags)
298{
299/* hopefully there's enough stack ... */
300bus_dma_segment_t segs[tag->maxsegs];
301struct mbuf *m;
302int          n;
303bus_size_t   sz;
304        for ( m=m_head, sz=0, n=0; m; m=m->m_next, n++ ) {
305                if ( n >= tag->maxsegs ) {
306                        cb(arg, segs, n, sz, EFBIG);
307                        return EFBIG;
308                }
309                segs[n].ds_addr = CPU2BUSADDR(mtod(m, unsigned));
310                sz += (segs[n].ds_len  = m->m_len);
311        }
312        cb(arg, segs, n, sz, 0);
313        return 0;
314}
315
316#define bus_dmamap_unload(tag, map) do {} while (0)
317
318/* should we do something if we have no HW snooping ? */
319#define bus_dmamap_sync(tag, map, flags) do { membarrier_rw(); } while (0)
320
321#define bus_dmamap_create(tag, flags, pmap) ( *(pmap) = 0, 0 )
322#define bus_dmamap_destroy(tag, map) do {} while (0)
323
324#endif
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