Ticket #778: score603ePatch.txt

File score603ePatch.txt, 14.7 KB (added by Jennifer Averett, on 12/03/06 at 13:31:12)

score603ePatch.txt

Line 
1Index: score603e/include/bsp.h
2===================================================================
3RCS file: /usr1/CVS/rtems/c/src/lib/libbsp/powerpc/score603e/include/bsp.h,v
4retrieving revision 1.5.4.1
5diff -c -r1.5.4.1 bsp.h
6*** score603e/include/bsp.h     4 Sep 2003 18:45:16 -0000       1.5.4.1
7--- score603e/include/bsp.h     11 Apr 2005 17:41:38 -0000
8***************
9*** 69,75 ****
10
11#define Initialize_Board_ctrl_register()                         \
12 *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
13!                                SCORE603E_BRD_FLASH_DISABLE_MASK) \
14
15/*
16*  Define the time limits for RTEMS Test Suite test durations.
17--- 69,78 ----
18
19#define Initialize_Board_ctrl_register()                         \
20 *SCORE603E_BOARD_CTRL_REG = (*SCORE603E_BOARD_CTRL_REG |       \
21!                                SCORE603E_BRD_FLASH_DISABLE_MASK)
22
23! #define Processor_Synchronize() \
24!   asm(" eieio ")
25
26/*
27*  Define the time limits for RTEMS Test Suite test durations.
28***************
29*** 249,254 ****
30--- 252,260 ----
31 rtems_unsigned32               area        /* Unused  */
32);
33
34+ #define BSP_FLASH_ENABLE_WRITES( _area) SCORE603e_FLASH_Enable_writes( _area )
35+ #define BSP_FLASH_DISABLE_WRITES(_area) SCORE603e_FLASH_Disable( _area )
36+
37#define Convert_Endian_32( _data ) \
38 ( ((_data&0x000000ff)<<24) | ((_data&0x0000ff00)<<8) |  \
39   ((_data&0x00ff0000)>>8)  | ((_data&0xff000000)>>24) )
40Index: score603e/include/gen2.h
41===================================================================
42RCS file: /usr1/CVS/rtems/c/src/lib/libbsp/powerpc/score603e/include/gen2.h,v
43retrieving revision 1.2.4.1
44diff -c -r1.2.4.1 gen2.h
45*** score603e/include/gen2.h    4 Sep 2003 18:45:16 -0000       1.2.4.1
46--- score603e/include/gen2.h    11 Apr 2005 17:41:38 -0000
47***************
48*** 25,31 ****
49* ISA/PCI I/O space.
50*/
51#define SCORE603E_VME_JUMPER_ADDR      0x00e20000       
52! #define SCORE603E_FLASH_BASE_ADDR      0x04000000
53#define SCORE603E_ISA_PCI_IO_BASE      0x80000000
54#define SCORE603E_TIMER_PORT_C         0xfd000000       
55#define SCORE603E_TIMER_INT_ACK        0xfd000000       
56--- 25,31 ----
57* ISA/PCI I/O space.
58*/
59#define SCORE603E_VME_JUMPER_ADDR      0x00e20000       
60! #define BSP_FLASH_BASE                 0x04000000
61#define SCORE603E_ISA_PCI_IO_BASE      0x80000000
62#define SCORE603E_TIMER_PORT_C         0xfd000000       
63#define SCORE603E_TIMER_INT_ACK        0xfd000000       
64***************
65*** 47,108 ****
66/*
67* PSC8 - PMC Card
68*/
69! #define SCORE603E_PCI_CONFIGURATION_BASE   0x80800000
70! #define SCORE603E_PMC_BASE                 SCORE603E_PCI_CONFIGURATION_BASE
71! #define SCORE603E_PCI_PMC_DEVICE_BASE      0x80808000
72
73! #define SCORE603E_PCI_REGISTER_BASE        0xfc000000
74
75- #define SCORE603E_PCI_DEVICE_ADDRESS( _offset) \
76-          ((volatile rtems_unsigned32 *)( SCORE603E_PCI_PMC_DEVICE_BASE + _offset ))
77-   
78
79! #define SCORE603E_PMC_SERIAL_ADDRESS( _offset )    \
80!         ((volatile rtems_unsigned8 *)(SCORE603E_PCI_REGISTER_BASE + _offset))
81
82/*
83* PMC serial channels - (4-7: 232 and 8-11: 422)
84*/
85! #define SCORE603E_85C30_CTRL_4        SCORE603E_PMC_SERIAL_ADDRESS(0x200020)
86! #define SCORE603E_85C30_DATA_4        SCORE603E_PMC_SERIAL_ADDRESS(0x200024)
87! #define SCORE603E_85C30_CTRL_5        SCORE603E_PMC_SERIAL_ADDRESS(0x200028)
88! #define SCORE603E_85C30_DATA_5        SCORE603E_PMC_SERIAL_ADDRESS(0x20002c)
89! #define SCORE603E_85C30_CTRL_6        SCORE603E_PMC_SERIAL_ADDRESS(0x200030)
90! #define SCORE603E_85C30_DATA_6        SCORE603E_PMC_SERIAL_ADDRESS(0x200034)
91! #define SCORE603E_85C30_CTRL_7        SCORE603E_PMC_SERIAL_ADDRESS(0x200038)
92! #define SCORE603E_85C30_DATA_7        SCORE603E_PMC_SERIAL_ADDRESS(0x20003c)
93! #define SCORE603E_85C30_CTRL_8        SCORE603E_PMC_SERIAL_ADDRESS(0x200000)
94! #define SCORE603E_85C30_DATA_8        SCORE603E_PMC_SERIAL_ADDRESS(0x200004)
95! #define SCORE603E_85C30_CTRL_9        SCORE603E_PMC_SERIAL_ADDRESS(0x200008)
96! #define SCORE603E_85C30_DATA_9        SCORE603E_PMC_SERIAL_ADDRESS(0x20000c)
97! #define SCORE603E_85C30_CTRL_10       SCORE603E_PMC_SERIAL_ADDRESS(0x200010)
98! #define SCORE603E_85C30_DATA_10       SCORE603E_PMC_SERIAL_ADDRESS(0x200014)
99! #define SCORE603E_85C30_CTRL_11       SCORE603E_PMC_SERIAL_ADDRESS(0x200018)
100! #define SCORE603E_85C30_DATA_11       SCORE603E_PMC_SERIAL_ADDRESS(0x20001c)
101
102#define SCORE603E_PCI_IO_CFG_ADDR      0x80000cf8
103#define SCORE603E_PCI_IO_CFG_DATA      0x80000cfc
104
105#define SCORE603E_UNIVERSE_BASE        0x80030000
106#define SCORE603E_IO_VME_UNIVERSE_BASE 0x80007000
107! #define SCORE603E_PCI_MEM_BASE         0xc0000000       
108! #define SCORE603E_NVRAM_BASE           0xfd100000
109! #define SCORE603E_RTC_ADDRESS          ((volatile unsigned char *)0xfd180000)
110#define SCORE603E_JP1_JP2_PROM_BASE    0xfff00000
111#define SCORE603E_NOT_JP1_2_FLASH_BASE 0xff800000
112
113-
114#if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE)
115#define SCORE603E_VME_A16_OFFSET       0x04000000
116#elif (SCORE603E_USE_DINK)
117#define SCORE603E_VME_A16_OFFSET       0x11000000
118#define SCORE603E_VME_A24_OFFSET       0x10000000
119! #define SCORE603E_VME_A24_BASE         (SCORE603E_PCI_MEM_BASE+SCORE603E_VME_A24_OFFSET)
120#else
121#error "SCORE603E gen2.h -- what ROM monitor are you using"
122#endif
123
124! #define SCORE603E_VME_A16_BASE         (SCORE603E_PCI_MEM_BASE+SCORE603E_VME_A16_OFFSET)
125
126/*
127*  Definations for the ICM 1770 RTC chip
128--- 47,107 ----
129/*
130* PSC8 - PMC Card
131*/
132! #define BSP_PCI_CONFIGURATION_BASE   0x80800000
133! #define BSP_PMC_BASE                 BSP_PCI_CONFIGURATION_BASE
134! #define BSP_PCI_PMC_DEVICE_BASE      0x80808000
135
136! #define BSP_PCI_REGISTER_BASE        0xfc000000
137!
138! #define BSP_PCI_DEVICE_ADDRESS( _offset) \
139!          ((volatile rtems_unsigned32 *)( BSP_PCI_PMC_DEVICE_BASE + _offset ))
140
141
142! #define BSP_PMC_SERIAL_ADDRESS( _offset )    \
143!         ((volatile rtems_unsigned8 *)(BSP_PCI_REGISTER_BASE + _offset))
144
145/*
146* PMC serial channels - (4-7: 232 and 8-11: 422)
147*/
148! #define SCORE603E_85C30_CTRL_4        BSP_PMC_SERIAL_ADDRESS(0x200020)
149! #define SCORE603E_85C30_DATA_4        BSP_PMC_SERIAL_ADDRESS(0x200024)
150! #define SCORE603E_85C30_CTRL_5        BSP_PMC_SERIAL_ADDRESS(0x200028)
151! #define SCORE603E_85C30_DATA_5        BSP_PMC_SERIAL_ADDRESS(0x20002c)
152! #define SCORE603E_85C30_CTRL_6        BSP_PMC_SERIAL_ADDRESS(0x200030)
153! #define SCORE603E_85C30_DATA_6        BSP_PMC_SERIAL_ADDRESS(0x200034)
154! #define SCORE603E_85C30_CTRL_7        BSP_PMC_SERIAL_ADDRESS(0x200038)
155! #define SCORE603E_85C30_DATA_7        BSP_PMC_SERIAL_ADDRESS(0x20003c)
156! #define SCORE603E_85C30_CTRL_8        BSP_PMC_SERIAL_ADDRESS(0x200000)
157! #define SCORE603E_85C30_DATA_8        BSP_PMC_SERIAL_ADDRESS(0x200004)
158! #define SCORE603E_85C30_CTRL_9        BSP_PMC_SERIAL_ADDRESS(0x200008)
159! #define SCORE603E_85C30_DATA_9        BSP_PMC_SERIAL_ADDRESS(0x20000c)
160! #define SCORE603E_85C30_CTRL_10       BSP_PMC_SERIAL_ADDRESS(0x200010)
161! #define SCORE603E_85C30_DATA_10       BSP_PMC_SERIAL_ADDRESS(0x200014)
162! #define SCORE603E_85C30_CTRL_11       BSP_PMC_SERIAL_ADDRESS(0x200018)
163! #define SCORE603E_85C30_DATA_11       BSP_PMC_SERIAL_ADDRESS(0x20001c)
164
165#define SCORE603E_PCI_IO_CFG_ADDR      0x80000cf8
166#define SCORE603E_PCI_IO_CFG_DATA      0x80000cfc
167
168#define SCORE603E_UNIVERSE_BASE        0x80030000
169#define SCORE603E_IO_VME_UNIVERSE_BASE 0x80007000
170! #define BSP_PCI_MEM_BASE         0xc0000000
171! #define BSP_NVRAM_BASE           0xfd100000
172! #define BSP_RTC_ADDRESS          ((volatile unsigned char *)0xfd180000)
173#define SCORE603E_JP1_JP2_PROM_BASE    0xfff00000
174#define SCORE603E_NOT_JP1_2_FLASH_BASE 0xff800000
175
176#if (SCORE603E_USE_SDS) | (SCORE603E_USE_OPEN_FIRMWARE) | (SCORE603E_USE_NONE)
177#define SCORE603E_VME_A16_OFFSET       0x04000000
178#elif (SCORE603E_USE_DINK)
179#define SCORE603E_VME_A16_OFFSET       0x11000000
180#define SCORE603E_VME_A24_OFFSET       0x10000000
181! #define BSP_VME_A24_BASE               (BSP_PCI_MEM_BASE+SCORE603E_VME_A24_OFFSET)
182#else
183#error "SCORE603E gen2.h -- what ROM monitor are you using"
184#endif
185
186! #define BSP_VME_A16_BASE               (BSP_PCI_MEM_BASE+SCORE603E_VME_A16_OFFSET)
187
188/*
189*  Definations for the ICM 1770 RTC chip
190***************
191*** 115,121 ****
192#define ICM1770_CRYSTAL_FREQ_2M       0x02
193#define ICM1770_CRYSTAL_FREQ_4M       0x03
194
195! #define SCORE_RTC_FREQUENCY           ICM1770_CRYSTAL_FREQ_32K
196
197/*
198*  Z85C30 Definations for the 423 interface.
199--- 114,120 ----
200#define ICM1770_CRYSTAL_FREQ_2M       0x02
201#define ICM1770_CRYSTAL_FREQ_4M       0x03
202
203! #define BSP_RTC_FREQUENCY             ICM1770_CRYSTAL_FREQ_32K
204
205/*
206*  Z85C30 Definations for the 423 interface.
207***************
208*** 158,170 ****
209/*
210* The PMC status word is at the PMC base address
211*/
212! #define SCORE603E_PMC_STATUS_ADDRESS  (SCORE603E_PMC_SERIAL_ADDRESS (0))
213#define Is_PMC_85C30_4_IRQ( _status ) (_status & 0x80)    /* SCC 422-1 */
214#define Is_PMC_85C30_2_IRQ( _status ) (_status & 0x40)    /* SCC 232-1 */
215#define Is_PMC_85C30_5_IRQ( _status ) (_status & 0x20)    /* SCC 422-2 */
216#define Is_PMC_85C30_3_IRQ( _status ) (_status & 0x08)    /* SCC 232-2 */
217
218! #define SCORE603E_PMC_CONTROL_ADDRESS    SCORE603E_PMC_SERIAL_ADDRESS(0x100000)
219#define SCORE603E_PMC_SCC_232_LOOPBACK (_word) (_word|0x20)
220
221#define PMC_SET_232_LOOPBACK(_word)   (_word | 0x02)   
222--- 157,169 ----
223/*
224* The PMC status word is at the PMC base address
225*/
226! #define BSP_PMC_STATUS_ADDRESS  (BSP_PMC_SERIAL_ADDRESS (0))
227#define Is_PMC_85C30_4_IRQ( _status ) (_status & 0x80)    /* SCC 422-1 */
228#define Is_PMC_85C30_2_IRQ( _status ) (_status & 0x40)    /* SCC 232-1 */
229#define Is_PMC_85C30_5_IRQ( _status ) (_status & 0x20)    /* SCC 422-2 */
230#define Is_PMC_85C30_3_IRQ( _status ) (_status & 0x08)    /* SCC 232-2 */
231
232! #define SCORE603E_PMC_CONTROL_ADDRESS    BSP_PMC_SERIAL_ADDRESS(0x100000)
233#define SCORE603E_PMC_SCC_232_LOOPBACK (_word) (_word|0x20)
234
235#define PMC_SET_232_LOOPBACK(_word)   (_word | 0x02)   
236Index: score603e/startup/FPGA.c
237===================================================================
238RCS file: /usr1/CVS/rtems/c/src/lib/libbsp/powerpc/score603e/startup/FPGA.c,v
239retrieving revision 1.5.4.1
240diff -c -r1.5.4.1 FPGA.c
241*** score603e/startup/FPGA.c    4 Sep 2003 18:45:16 -0000       1.5.4.1
242--- score603e/startup/FPGA.c    11 Apr 2005 17:41:38 -0000
243***************
244*** 115,121 ****
245{
246 rtems_unsigned16    status_word = irq;
247
248!   status_word = (*SCORE603E_PMC_STATUS_ADDRESS);
249
250 return status_word;
251}
252--- 115,121 ----
253{
254 rtems_unsigned16    status_word = irq;
255
256!   status_word = (*BSP_PMC_STATUS_ADDRESS);
257
258 return status_word;
259}
260Index: score603e/startup/Hwr_init.c
261===================================================================
262RCS file: /usr1/CVS/rtems/c/src/lib/libbsp/powerpc/score603e/startup/Hwr_init.c,v
263retrieving revision 1.2
264diff -c -r1.2 Hwr_init.c
265*** score603e/startup/Hwr_init.c        14 Jan 2000 14:44:11 -0000      1.2
266--- score603e/startup/Hwr_init.c        11 Apr 2005 17:41:38 -0000
267***************
268*** 76,82 ****
269{
270 volatile Harris_RTC *the_RTC;
271 
272!   the_RTC = (volatile Harris_RTC *)SCORE603E_RTC_ADDRESS;
273
274 the_RTC->command_register = 0x0;
275}
276--- 76,82 ----
277{
278 volatile Harris_RTC *the_RTC;
279 
280!   the_RTC = (volatile Harris_RTC *)BSP_RTC_ADDRESS;
281
282 the_RTC->command_register = 0x0;
283}
284Index: score603e/startup/bspstart.c
285===================================================================
286RCS file: /usr1/CVS/rtems/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c,v
287retrieving revision 1.6.4.1
288diff -c -r1.6.4.1 bspstart.c
289*** score603e/startup/bspstart.c        4 Sep 2003 18:45:16 -0000       1.6.4.1
290--- score603e/startup/bspstart.c        11 Apr 2005 17:41:38 -0000
291***************
292*** 116,135 ****
293 /*
294  * set PMC base address.
295  */
296!   PMC_addr  = SCORE603E_PCI_DEVICE_ADDRESS( 0x14 );
297!   *PMC_addr = (SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f;
298
299 /*
300  * Clear status, enable SERR and memory space only.
301  */
302!   PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x4 );
303 *PMC_addr = 0x0201ff37;
304
305 /*
306  * Bit 0 and 1 HI cause Medium Loopback to occur.
307  */
308 PMC_addr = (volatile rtems_unsigned32 *)
309!         SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );
310 data = *PMC_addr;
311 /*   *PMC_addr = data | 0x3;  */
312 *PMC_addr = data & 0xfc;
313--- 116,135 ----
314 /*
315  * set PMC base address.
316  */
317!   PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
318!   *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
319
320 /*
321  * Clear status, enable SERR and memory space only.
322  */
323!   PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
324 *PMC_addr = 0x0201ff37;
325
326 /*
327  * Bit 0 and 1 HI cause Medium Loopback to occur.
328  */
329 PMC_addr = (volatile rtems_unsigned32 *)
330!         BSP_PMC_SERIAL_ADDRESS( 0x100000 );
331 data = *PMC_addr;
332 /*   *PMC_addr = data | 0x3;  */
333 *PMC_addr = data & 0xfc;
334***************
335*** 142,158 ****
336 /*
337  * Clear status, enable SERR and memory space only.
338  */
339!   PMC_addr = SCORE603E_PCI_DEVICE_ADDRESS( 0x4 );
340 *PMC_addr = 0x020080cc;
341
342 /*
343  * set PMC base address.
344  */
345!   PMC_addr  = SCORE603E_PCI_DEVICE_ADDRESS( 0x14 );
346!   *PMC_addr = (SCORE603E_PCI_REGISTER_BASE >> 24) & 0x3f;
347
348 PMC_addr = (volatile rtems_unsigned32 *)
349!       SCORE603E_PMC_SERIAL_ADDRESS( 0x100000 );
350 data = *PMC_addr;
351 *PMC_addr = data & 0xfc;
352
353--- 142,158 ----
354 /*
355  * Clear status, enable SERR and memory space only.
356  */
357!   PMC_addr = BSP_PCI_DEVICE_ADDRESS( 0x4 );
358 *PMC_addr = 0x020080cc;
359
360 /*
361  * set PMC base address.
362  */
363!   PMC_addr  = BSP_PCI_DEVICE_ADDRESS( 0x14 );
364!   *PMC_addr = (BSP_PCI_REGISTER_BASE >> 24) & 0x3f;
365
366 PMC_addr = (volatile rtems_unsigned32 *)
367!       BSP_PMC_SERIAL_ADDRESS( 0x100000 );
368 data = *PMC_addr;
369 *PMC_addr = data & 0xfc;
370
371Index: score603e/tod/tod.c
372===================================================================
373RCS file: /usr1/CVS/rtems/c/src/lib/libbsp/powerpc/score603e/tod/tod.c,v
374retrieving revision 1.2.8.1
375diff -c -r1.2.8.1 tod.c
376*** score603e/tod/tod.c 4 Sep 2003 18:45:16 -0000       1.2.8.1
377--- score603e/tod/tod.c 11 Apr 2005 17:41:38 -0000
378***************
379*** 43,49 ****
380{
381 rtems_time_of_day rtc_tod;
382
383!   ICM7170_GetTOD( SCORE603E_RTC_ADDRESS, SCORE_RTC_FREQUENCY, &rtc_tod );
384 rtems_clock_set( &rtc_tod );
385}
386
387--- 43,49 ----
388{
389 rtems_time_of_day rtc_tod;
390
391!   ICM7170_GetTOD( BSP_RTC_ADDRESS, BSP_RTC_FREQUENCY, &rtc_tod );
392 rtems_clock_set( &rtc_tod );
393}
394
395***************
396*** 52,58 ****
397 rtems_time_of_day rtems_tod;
398
399 rtems_clock_get( RTEMS_CLOCK_GET_TOD, &rtems_tod );
400!   ICM7170_SetTOD( SCORE603E_RTC_ADDRESS, SCORE_RTC_FREQUENCY, &rtems_tod );
401}
402
403int checkRealTime()
404--- 52,58 ----
405 rtems_time_of_day rtems_tod;
406
407 rtems_clock_get( RTEMS_CLOCK_GET_TOD, &rtems_tod );
408!   ICM7170_SetTOD( BSP_RTC_ADDRESS, BSP_RTC_FREQUENCY, &rtems_tod );
409}
410
411int checkRealTime()
412***************
413*** 60,66 ****
414 rtems_time_of_day rtems_tod;
415 rtems_time_of_day rtc_tod;
416
417!   ICM7170_GetTOD( SCORE603E_RTC_ADDRESS, SCORE_RTC_FREQUENCY, &rtc_tod );
418 rtems_clock_get( RTEMS_CLOCK_GET_TOD, &rtems_tod );
419
420 if( rtems_tod.year == rtc_tod.year &&
421--- 60,66 ----
422 rtems_time_of_day rtems_tod;
423 rtems_time_of_day rtc_tod;
424
425!   ICM7170_GetTOD( BSP_RTC_ADDRESS, BSP_RTC_FREQUENCY, &rtc_tod );
426 rtems_clock_get( RTEMS_CLOCK_GET_TOD, &rtems_tod );
427
428 if( rtems_tod.year == rtc_tod.year &&