Ticket #774: ppcbsp-fpoff-across-isr.diff

File ppcbsp-fpoff-across-isr.diff, 8.2 KB (added by strauman, on 12/03/06 at 13:31:12)

ppcbsp-fpoff-across-isr.diff

Line 
1Index: c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S
2===================================================================
3RCS file: /afs/slac/g/spear/cvsrep/rtems/src-20030128/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S,v
4retrieving revision 1.3
5retrieving revision 1.5
6diff -c -r1.3 -r1.5
7*** c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S     27 Feb 2004 04:17:43 -0000      1.3
8--- c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S     7 Apr 2005 19:00:10 -0000       1.5
9***************
10*** 12,17 ****
11--- 12,19 ----
12   *  Till Straumann <strauman@slac.stanford.edu>, 2003/7:
13   *    - store isr nesting level in _ISR_Nest_level rather than
14   *      SPRG0 - RTEMS relies on that variable.
15+  *  Till Straumann <strauman@slac.stanford.edu>, 2005/4:
16+  *    - DONT enable FP across user USR since fpregs are never saved!!
17   *
18   * irq_asm.S,v 1.2.4.2 2003/09/04 18:45:02 joel Exp
19   */
20***************
21*** 88,101 ****
22        /*
23         * Enable data and instruction address translation, exception recovery
24       *
25-      * also, on CPUs with FP, enable FP so that FP context can be
26-      * saved and restored (using FP instructions)
27         */
28- #if (PPC_HAS_FPU == 0)
29        ori     r3, r3, MSR_RI | MSR_IR | MSR_DR
30- #else
31-       ori     r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
32- #endif
33        mtmsr   r3
34        SYNC
35        /*
36--- 90,97 ----
37***************
38*** 298,303 ****
39--- 294,320 ----
40        rfi
41       
42  switch:
43+ #if ( PPC_HAS_FPU != 0 )
44+ #if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
45+ #error missing include file???
46+ #endif
47+       mfmsr  r4
48+ #if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
49+       /* if the executing thread has FP enabled propagate
50+        * this now so _Thread_Dispatch can save/restore the FPREGS
51+        * NOTE: it is *crucial* to disable the FPU across the
52+        *       user ISR [independent of using the 'deferred'
53+        *       strategy or not]. We don't save FP regs across
54+        *       the user ISR and hence we prefer an exception to
55+        *       be raised rather than experiencing corruption.
56+        */
57+       lwz    r3, SRR1_FRAME_OFFSET(r1)
58+       rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
59+ #else
60+       ori    r4, r4, MSR_FP
61+ #endif
62+       mtmsr  r4
63+ #endif
64        bl      SYM (_Thread_Dispatch)
65       
66  easy_exit:   
67Index: c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S
68===================================================================
69RCS file: /afs/slac/g/spear/cvsrep/rtems/src-20030128/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S,v
70retrieving revision 1.3
71retrieving revision 1.5
72diff -c -r1.3 -r1.5
73*** c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S       27 Feb 2004 04:17:43 -0000      1.3
74--- c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S       7 Apr 2005 19:00:12 -0000       1.5
75***************
76*** 12,17 ****
77--- 12,19 ----
78   *  Till Straumann <strauman@slac.stanford.edu>, 2003/7:
79   *    - store isr nesting level in _ISR_Nest_level rather than
80   *      SPRG0 - RTEMS relies on that variable.
81+  *  Till Straumann <strauman@slac.stanford.edu>, 2005/4:
82+  *    - DONT enable FP across user ISR since fpregs are never saved!!
83   *
84   * irq_asm.S,v 1.3.4.2 2003/09/04 18:45:07 joel Exp
85   */
86***************
87*** 127,137 ****
88       * also, on CPUs with FP, enable FP so that FP context can be
89       * saved and restored (using FP instructions)
90         */
91- #if (PPC_HAS_FPU == 0)
92        ori     r3, r3, MSR_RI | MSR_IR | MSR_DR
93- #else
94-       ori     r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
95- #endif
96        mtmsr   r3
97        SYNC
98        /*
99--- 129,135 ----
100***************
101*** 338,343 ****
102--- 336,362 ----
103        rfi
104       
105  switch:
106+ #if ( PPC_HAS_FPU != 0 )
107+ #if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
108+ #error missing include file???
109+ #endif
110+       mfmsr  r4
111+ #if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
112+       /* if the executing thread has FP enabled propagate
113+        * this now so _Thread_Dispatch can save/restore the FPREGS
114+        * NOTE: it is *crucial* to disable the FPU across the
115+        *       user ISR [independent of using the 'deferred'
116+        *       strategy or not]. We don't save FP regs across
117+        *       the user ISR and hence we prefer an exception to
118+        *       be raised rather than experiencing corruption.
119+        */
120+       lwz    r3, SRR1_FRAME_OFFSET(r1)
121+       rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
122+ #else
123+       ori    r4, r4, MSR_FP
124+ #endif
125+       mtmsr  r4
126+ #endif
127        bl      SYM (_Thread_Dispatch)
128       
129  easy_exit:   
130Index: c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S
131===================================================================
132RCS file: /afs/slac/g/spear/cvsrep/rtems/src-20030128/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S,v
133retrieving revision 1.1.1.3
134retrieving revision 1.3
135diff -c -r1.1.1.3 -r1.3
136*** c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S   27 Feb 2004 02:57:14 -0000      1.1.1.3
137--- c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S   7 Apr 2005 19:00:14 -0000       1.3
138***************
139*** 12,17 ****
140--- 12,20 ----
141   *  Modifications to store nesting level in global _ISR_Nest_level
142   *  variable instead of SPRG0.  Andy Dachs <a.dachs@sstl.co.uk>
143   *
144+  *  Till Straumann <strauman@slac.stanford.edu>, 2005/4:
145+  *    - DONT enable FP across user ISR since fpregs are never saved!!
146+  *
147   * irq_asm.S,v 1.4.2.1 2003/09/04 18:45:09 joel Exp
148   */
149       
150***************
151*** 93,103 ****
152           * also, on CPUs with FP, enable FP so that FP context can be
153           * saved and restored (using FP instructions)
154         */
155- #if (PPC_HAS_FPU == 0)
156        ori     r3, r3, MSR_RI /*| MSR_IR | MSR_DR*/
157- #else
158-       ori     r3, r3, MSR_RI | /*MSR_IR | MSR_DR |*/ MSR_FP
159- #endif
160        mtmsr   r3
161        SYNC
162       
163--- 96,102 ----
164***************
165*** 301,306 ****
166--- 300,326 ----
167        rfi
168       
169  switch:
170+ #if ( PPC_HAS_FPU != 0 )
171+ #if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
172+ #error missing include file???
173+ #endif
174+       mfmsr  r4
175+ #if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
176+       /* if the executing thread has FP enabled propagate
177+        * this now so _Thread_Dispatch can save/restore the FPREGS
178+        * NOTE: it is *crucial* to disable the FPU across the
179+        *       user ISR [independent of using the 'deferred'
180+        *       strategy or not]. We don't save FP regs across
181+        *       the user ISR and hence we prefer an exception to
182+        *       be raised rather than experiencing corruption.
183+        */
184+       lwz    r3, SRR1_FRAME_OFFSET(r1)
185+       rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
186+ #else
187+       ori    r4, r4, MSR_FP
188+ #endif
189+       mtmsr  r4
190+ #endif
191        bl              SYM (_Thread_Dispatch)
192       
193  easy_exit:   
194Index: c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S
195===================================================================
196RCS file: /afs/slac/g/spear/cvsrep/rtems/src-20030128/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S,v
197retrieving revision 1.5
198retrieving revision 1.7
199diff -c -r1.5 -r1.7
200*** c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S       27 Feb 2004 04:17:45 -0000      1.5
201--- c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S       7 Apr 2005 19:00:15 -0000       1.7
202***************
203*** 12,17 ****
204--- 12,20 ----
205   *  Till Straumann <strauman@slac.stanford.edu>, 2003/7:
206   *    - store isr nesting level in _ISR_Nest_level rather than
207   *      SPRG0 - RTEMS relies on that variable.
208+  *  Till Straumann <strauman@slac.stanford.edu>, 2005/4:
209+  *    - DONT enable FP across ISR since fpregs are not saved!!
210+  *      FPU is used by Thread_Dispatch however...
211   *
212   * irq_asm.S,v 1.5.4.3 2003/09/04 18:45:20 joel Exp
213   */
214***************
215*** 95,105 ****
216       * also, on CPUs with FP, enable FP so that FP context can be
217       * saved and restored (using FP instructions)
218         */
219- #if (PPC_HAS_FPU == 0)
220        ori     r3, r3, MSR_RI | MSR_IR | MSR_DR
221- #else
222-       ori     r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP
223- #endif
224        mtmsr   r3
225        SYNC
226        /*
227--- 98,104 ----
228***************
229*** 302,307 ****
230--- 301,327 ----
231        rfi
232       
233  switch:
234+ #if ( PPC_HAS_FPU != 0 )
235+ #if ! defined( CPU_USE_DEFERRED_FP_SWITCH )
236+ #error missing include file???
237+ #endif
238+       mfmsr  r4
239+ #if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE )
240+       /* if the executing thread has FP enabled propagate
241+        * this now so _Thread_Dispatch can save/restore the FPREGS
242+        * NOTE: it is *crucial* to disable the FPU across the
243+        *       user ISR [independent of using the 'deferred'
244+        *       strategy or not]. We don't save FP regs across
245+        *       the user ISR and hence we prefer an exception to
246+        *       be raised rather than experiencing corruption.
247+        */
248+       lwz    r3, SRR1_FRAME_OFFSET(r1)
249+       rlwimi r4, r3, 0, 18, 18 /* MSR_FP */
250+ #else
251+       ori    r4, r4, MSR_FP
252+ #endif
253+       mtmsr  r4
254+ #endif
255        bl      SYM (_Thread_Dispatch)
256       
257  easy_exit: