1 | Index: c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S |
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2 | =================================================================== |
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3 | RCS file: /afs/slac/g/spear/cvsrep/rtems/src-20030128/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S,v |
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4 | retrieving revision 1.3 |
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5 | retrieving revision 1.5 |
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6 | diff -c -r1.3 -r1.5 |
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7 | *** c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S 27 Feb 2004 04:17:43 -0000 1.3 |
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8 | --- c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S 7 Apr 2005 19:00:10 -0000 1.5 |
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9 | *************** |
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10 | *** 12,17 **** |
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11 | --- 12,19 ---- |
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12 | * Till Straumann <strauman@slac.stanford.edu>, 2003/7: |
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13 | * - store isr nesting level in _ISR_Nest_level rather than |
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14 | * SPRG0 - RTEMS relies on that variable. |
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15 | + * Till Straumann <strauman@slac.stanford.edu>, 2005/4: |
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16 | + * - DONT enable FP across user USR since fpregs are never saved!! |
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17 | * |
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18 | * irq_asm.S,v 1.2.4.2 2003/09/04 18:45:02 joel Exp |
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19 | */ |
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20 | *************** |
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21 | *** 88,101 **** |
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22 | /* |
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23 | * Enable data and instruction address translation, exception recovery |
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24 | * |
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25 | - * also, on CPUs with FP, enable FP so that FP context can be |
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26 | - * saved and restored (using FP instructions) |
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27 | */ |
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28 | - #if (PPC_HAS_FPU == 0) |
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29 | ori r3, r3, MSR_RI | MSR_IR | MSR_DR |
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30 | - #else |
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31 | - ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP |
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32 | - #endif |
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33 | mtmsr r3 |
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34 | SYNC |
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35 | /* |
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36 | --- 90,97 ---- |
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37 | *************** |
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38 | *** 298,303 **** |
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39 | --- 294,320 ---- |
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40 | rfi |
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41 | |
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42 | switch: |
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43 | + #if ( PPC_HAS_FPU != 0 ) |
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44 | + #if ! defined( CPU_USE_DEFERRED_FP_SWITCH ) |
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45 | + #error missing include file??? |
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46 | + #endif |
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47 | + mfmsr r4 |
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48 | + #if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE ) |
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49 | + /* if the executing thread has FP enabled propagate |
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50 | + * this now so _Thread_Dispatch can save/restore the FPREGS |
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51 | + * NOTE: it is *crucial* to disable the FPU across the |
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52 | + * user ISR [independent of using the 'deferred' |
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53 | + * strategy or not]. We don't save FP regs across |
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54 | + * the user ISR and hence we prefer an exception to |
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55 | + * be raised rather than experiencing corruption. |
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56 | + */ |
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57 | + lwz r3, SRR1_FRAME_OFFSET(r1) |
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58 | + rlwimi r4, r3, 0, 18, 18 /* MSR_FP */ |
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59 | + #else |
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60 | + ori r4, r4, MSR_FP |
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61 | + #endif |
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62 | + mtmsr r4 |
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63 | + #endif |
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64 | bl SYM (_Thread_Dispatch) |
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65 | |
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66 | easy_exit: |
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67 | Index: c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S |
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68 | =================================================================== |
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69 | RCS file: /afs/slac/g/spear/cvsrep/rtems/src-20030128/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S,v |
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70 | retrieving revision 1.3 |
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71 | retrieving revision 1.5 |
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72 | diff -c -r1.3 -r1.5 |
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73 | *** c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S 27 Feb 2004 04:17:43 -0000 1.3 |
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74 | --- c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S 7 Apr 2005 19:00:12 -0000 1.5 |
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75 | *************** |
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76 | *** 12,17 **** |
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77 | --- 12,19 ---- |
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78 | * Till Straumann <strauman@slac.stanford.edu>, 2003/7: |
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79 | * - store isr nesting level in _ISR_Nest_level rather than |
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80 | * SPRG0 - RTEMS relies on that variable. |
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81 | + * Till Straumann <strauman@slac.stanford.edu>, 2005/4: |
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82 | + * - DONT enable FP across user ISR since fpregs are never saved!! |
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83 | * |
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84 | * irq_asm.S,v 1.3.4.2 2003/09/04 18:45:07 joel Exp |
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85 | */ |
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86 | *************** |
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87 | *** 127,137 **** |
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88 | * also, on CPUs with FP, enable FP so that FP context can be |
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89 | * saved and restored (using FP instructions) |
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90 | */ |
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91 | - #if (PPC_HAS_FPU == 0) |
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92 | ori r3, r3, MSR_RI | MSR_IR | MSR_DR |
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93 | - #else |
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94 | - ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP |
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95 | - #endif |
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96 | mtmsr r3 |
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97 | SYNC |
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98 | /* |
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99 | --- 129,135 ---- |
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100 | *************** |
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101 | *** 338,343 **** |
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102 | --- 336,362 ---- |
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103 | rfi |
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104 | |
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105 | switch: |
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106 | + #if ( PPC_HAS_FPU != 0 ) |
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107 | + #if ! defined( CPU_USE_DEFERRED_FP_SWITCH ) |
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108 | + #error missing include file??? |
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109 | + #endif |
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110 | + mfmsr r4 |
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111 | + #if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE ) |
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112 | + /* if the executing thread has FP enabled propagate |
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113 | + * this now so _Thread_Dispatch can save/restore the FPREGS |
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114 | + * NOTE: it is *crucial* to disable the FPU across the |
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115 | + * user ISR [independent of using the 'deferred' |
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116 | + * strategy or not]. We don't save FP regs across |
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117 | + * the user ISR and hence we prefer an exception to |
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118 | + * be raised rather than experiencing corruption. |
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119 | + */ |
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120 | + lwz r3, SRR1_FRAME_OFFSET(r1) |
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121 | + rlwimi r4, r3, 0, 18, 18 /* MSR_FP */ |
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122 | + #else |
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123 | + ori r4, r4, MSR_FP |
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124 | + #endif |
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125 | + mtmsr r4 |
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126 | + #endif |
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127 | bl SYM (_Thread_Dispatch) |
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128 | |
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129 | easy_exit: |
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130 | Index: c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S |
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131 | =================================================================== |
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132 | RCS file: /afs/slac/g/spear/cvsrep/rtems/src-20030128/c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S,v |
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133 | retrieving revision 1.1.1.3 |
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134 | retrieving revision 1.3 |
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135 | diff -c -r1.1.1.3 -r1.3 |
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136 | *** c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S 27 Feb 2004 02:57:14 -0000 1.1.1.3 |
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137 | --- c/src/lib/libbsp/powerpc/mpc8260ads/irq/irq_asm.S 7 Apr 2005 19:00:14 -0000 1.3 |
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138 | *************** |
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139 | *** 12,17 **** |
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140 | --- 12,20 ---- |
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141 | * Modifications to store nesting level in global _ISR_Nest_level |
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142 | * variable instead of SPRG0. Andy Dachs <a.dachs@sstl.co.uk> |
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143 | * |
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144 | + * Till Straumann <strauman@slac.stanford.edu>, 2005/4: |
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145 | + * - DONT enable FP across user ISR since fpregs are never saved!! |
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146 | + * |
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147 | * irq_asm.S,v 1.4.2.1 2003/09/04 18:45:09 joel Exp |
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148 | */ |
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149 | |
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150 | *************** |
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151 | *** 93,103 **** |
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152 | * also, on CPUs with FP, enable FP so that FP context can be |
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153 | * saved and restored (using FP instructions) |
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154 | */ |
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155 | - #if (PPC_HAS_FPU == 0) |
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156 | ori r3, r3, MSR_RI /*| MSR_IR | MSR_DR*/ |
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157 | - #else |
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158 | - ori r3, r3, MSR_RI | /*MSR_IR | MSR_DR |*/ MSR_FP |
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159 | - #endif |
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160 | mtmsr r3 |
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161 | SYNC |
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162 | |
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163 | --- 96,102 ---- |
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164 | *************** |
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165 | *** 301,306 **** |
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166 | --- 300,326 ---- |
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167 | rfi |
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168 | |
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169 | switch: |
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170 | + #if ( PPC_HAS_FPU != 0 ) |
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171 | + #if ! defined( CPU_USE_DEFERRED_FP_SWITCH ) |
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172 | + #error missing include file??? |
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173 | + #endif |
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174 | + mfmsr r4 |
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175 | + #if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE ) |
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176 | + /* if the executing thread has FP enabled propagate |
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177 | + * this now so _Thread_Dispatch can save/restore the FPREGS |
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178 | + * NOTE: it is *crucial* to disable the FPU across the |
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179 | + * user ISR [independent of using the 'deferred' |
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180 | + * strategy or not]. We don't save FP regs across |
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181 | + * the user ISR and hence we prefer an exception to |
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182 | + * be raised rather than experiencing corruption. |
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183 | + */ |
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184 | + lwz r3, SRR1_FRAME_OFFSET(r1) |
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185 | + rlwimi r4, r3, 0, 18, 18 /* MSR_FP */ |
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186 | + #else |
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187 | + ori r4, r4, MSR_FP |
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188 | + #endif |
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189 | + mtmsr r4 |
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190 | + #endif |
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191 | bl SYM (_Thread_Dispatch) |
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192 | |
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193 | easy_exit: |
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194 | Index: c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S |
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195 | =================================================================== |
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196 | RCS file: /afs/slac/g/spear/cvsrep/rtems/src-20030128/c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S,v |
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197 | retrieving revision 1.5 |
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198 | retrieving revision 1.7 |
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199 | diff -c -r1.5 -r1.7 |
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200 | *** c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S 27 Feb 2004 04:17:45 -0000 1.5 |
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201 | --- c/src/lib/libbsp/powerpc/shared/irq/irq_asm.S 7 Apr 2005 19:00:15 -0000 1.7 |
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202 | *************** |
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203 | *** 12,17 **** |
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204 | --- 12,20 ---- |
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205 | * Till Straumann <strauman@slac.stanford.edu>, 2003/7: |
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206 | * - store isr nesting level in _ISR_Nest_level rather than |
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207 | * SPRG0 - RTEMS relies on that variable. |
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208 | + * Till Straumann <strauman@slac.stanford.edu>, 2005/4: |
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209 | + * - DONT enable FP across ISR since fpregs are not saved!! |
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210 | + * FPU is used by Thread_Dispatch however... |
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211 | * |
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212 | * irq_asm.S,v 1.5.4.3 2003/09/04 18:45:20 joel Exp |
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213 | */ |
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214 | *************** |
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215 | *** 95,105 **** |
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216 | * also, on CPUs with FP, enable FP so that FP context can be |
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217 | * saved and restored (using FP instructions) |
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218 | */ |
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219 | - #if (PPC_HAS_FPU == 0) |
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220 | ori r3, r3, MSR_RI | MSR_IR | MSR_DR |
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221 | - #else |
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222 | - ori r3, r3, MSR_RI | MSR_IR | MSR_DR | MSR_FP |
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223 | - #endif |
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224 | mtmsr r3 |
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225 | SYNC |
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226 | /* |
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227 | --- 98,104 ---- |
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228 | *************** |
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229 | *** 302,307 **** |
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230 | --- 301,327 ---- |
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231 | rfi |
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232 | |
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233 | switch: |
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234 | + #if ( PPC_HAS_FPU != 0 ) |
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235 | + #if ! defined( CPU_USE_DEFERRED_FP_SWITCH ) |
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236 | + #error missing include file??? |
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237 | + #endif |
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238 | + mfmsr r4 |
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239 | + #if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE ) |
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240 | + /* if the executing thread has FP enabled propagate |
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241 | + * this now so _Thread_Dispatch can save/restore the FPREGS |
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242 | + * NOTE: it is *crucial* to disable the FPU across the |
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243 | + * user ISR [independent of using the 'deferred' |
---|
244 | + * strategy or not]. We don't save FP regs across |
---|
245 | + * the user ISR and hence we prefer an exception to |
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246 | + * be raised rather than experiencing corruption. |
---|
247 | + */ |
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248 | + lwz r3, SRR1_FRAME_OFFSET(r1) |
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249 | + rlwimi r4, r3, 0, 18, 18 /* MSR_FP */ |
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250 | + #else |
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251 | + ori r4, r4, MSR_FP |
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252 | + #endif |
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253 | + mtmsr r4 |
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254 | + #endif |
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255 | bl SYM (_Thread_Dispatch) |
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256 | |
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257 | easy_exit: |
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