1 | From - Wed Oct 31 07:57:29 2001 |
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4 | Received: (qmail 12369 invoked by uid 330); 19 Oct 2001 00:19:03 -0000 |
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12 | (sender: <zoltan>) (ident <zoltan> using unix) |
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13 | id <m15uNOR-0006RvC@bendor.com.au> |
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14 | for <rtems-users@oarcorp.com>; Fri, 19 Oct 2001 10:20:07 +1000 (EST) |
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15 | (Smail-3.2.0.101 1997-Dec-17 #1 built 1998-May-27) |
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16 | From: Zoltan Kocsi <zoltan@bendor.com.au> |
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17 | MIME-Version: 1.0 |
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18 | Content-Type: text/plain; charset=us-ascii |
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19 | Content-Transfer-Encoding: 7bit |
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20 | Date: Fri, 19 Oct 2001 10:20:07 +1000 (EST) |
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21 | To: rtems-users@oarcorp.com |
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22 | Subject: m68k BSP with no VBR |
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23 | X-Mailer: VM 6.43 under 20.4 "Emerald" XEmacs Lucid |
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24 | Message-ID: <15311.28847.79393.846142@tade.bendor.com.au> |
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25 | |
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26 | I think somebody on this list asked about the interupt vector |
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27 | handling w/o VBR and RAM at 0. |
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28 | |
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29 | The usual trick is this: |
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30 | |
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31 | You initialise the vector table (except the first 2 two entries, of |
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32 | course) to point to the same location BUT you also add the vector |
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33 | number times 0x1000000 to them. That is, bits 31-24 contain the vector |
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34 | number and 23-0 the address of the common handler. |
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35 | Since the PC is 32 bit wide but the actual address bus is only 24, |
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36 | the top byte will be in the PC but will be ignored when jumping |
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37 | onto your routine. |
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38 | |
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39 | Then your common interrupt routine gets this info by loading the PC |
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40 | into some register and based on that info, you can jump to a vector |
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41 | in a vector table pointed by a virtual VBR: |
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42 | |
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43 | // |
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44 | // Real vector table at 0 |
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45 | // |
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46 | |
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47 | .long initial_sp |
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48 | .long initial_pc |
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49 | .long myhandler+0x02000000 |
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50 | .long myhandler+0x03000000 |
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51 | .long myhandler+0x04000000 |
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52 | ... |
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53 | .long myhandler+0xff000000 |
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54 | |
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55 | // |
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56 | // This handler will jump to the interrupt routine of which |
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57 | // the address is stored at VBR[ vector_no ] |
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58 | // The registers and stackframe will be intact, the interrupt |
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59 | // routine will see exactly what it would see if it was called |
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60 | // directly from the HW vector table at 0. |
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61 | // |
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62 | |
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63 | .comm VBR,4,2 // This defines the 'virtual' VBR |
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64 | // From C: extern void *VBR; |
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65 | |
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66 | myhandler: // At entry, PC contains the full vector |
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67 | move.l %d0,-(%sp) // Save d0 |
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68 | move.l %a0,-(%sp) // Save a0 |
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69 | lea 0(%pc),%a0 // Get the value of the PC |
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70 | move.l %a0,%d0 // Copy it to a data reg, d0 is VV?????? |
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71 | swap %d0 // Now d0 is ????VV?? |
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72 | and.w #0xff00,%d0 // Now d0 is ????VV00 (1) |
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73 | lsr.w #6,%d0 // Now d0.w contains the VBR table offset |
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74 | move.l VBR,%a0 // Get the address from VBR to a0 |
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75 | move.l (%a0,%d0.w),%a0 // Fetch the vector |
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76 | move.l 4(%sp),%d0 // Restore d0 |
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77 | move.l %a0,4(%sp) // Place target address to the stack |
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78 | move.l (%sp)+,%a0 // Restore a0, target address is on TOS |
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79 | ret // This will jump to the handler and |
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80 | // restore the stack |
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81 | |
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82 | (1) If 'myhandler' is guaranteed to be in the first 64K, e.g. just |
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83 | after the vector table then that insn is not needed. |
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84 | |
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85 | There are probably shorter ways to do this, but it I believe is enough |
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86 | to illustrate the trick. Optimisation is left as an excercise to the |
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87 | reader :-) |
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88 | |
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89 | I hope this helps, |
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90 | |
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91 | Zoltan |
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