Ticket #3016: ns16550_p.h.orig

File ns16550_p.h.orig, 3.4 KB (added by phongvanpham, on May 9, 2017 at 11:46:47 PM)

This is the original file (before change) for diff'ing purposes to see code delta

Line 
1/**
2 *  @file
3 * 
4 */
5
6/*
7 *  COPYRIGHT (c) 1998 by Radstone Technology
8 *
9 *
10 *  THIS FILE IS PROVIDED TO YOU, THE USER, "AS IS", WITHOUT WARRANTY OF ANY
11 *  KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE
12 *  IMPLIED WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK
13 *  AS TO THE QUALITY AND PERFORMANCE OF ALL CODE IN THIS FILE IS WITH YOU.
14 *
15 *  You are hereby granted permission to use, copy, modify, and distribute
16 *  this file, provided that this notice, plus the above copyright notice
17 *  and disclaimer, appears in all copies. Radstone Technology will provide
18 *  no support for this code.
19 *
20 *  COPYRIGHT (c) 1989-2012.
21 *  On-Line Applications Research Corporation (OAR).
22 *
23 *  The license and distribution terms for this file may be
24 *  found in the file LICENSE in this distribution or at
25 *  http://www.rtems.org/license/LICENSE.
26 */
27
28#ifndef _NS16550_P_H_
29#define _NS16550_P_H_
30
31#include <libchip/serial.h>
32
33#ifdef __cplusplus
34extern "C" {
35#endif
36
37/*
38 *  Define NS16550_STATIC to nothing while debugging so the entry points
39 *  will show up in the symbol table.
40 */
41
42#define NS16550_STATIC static
43
44#define NS16550_RECEIVE_BUFFER   0
45#define NS16550_TRANSMIT_BUFFER  0
46#define NS16550_INTERRUPT_ENABLE 1
47#define NS16550_INTERRUPT_ID     2
48#define NS16550_FIFO_CONTROL     2
49#define NS16550_LINE_CONTROL     3
50#define NS16550_MODEM_CONTROL    4
51#define NS16550_LINE_STATUS      5
52#define NS16550_MODEM_STATUS     6
53#define NS16550_SCRATCH_PAD      7
54#define NS16550_FRACTIONAL_DIVIDER 10
55
56/*
57 * Define serial port interrupt enable register structure.
58 */
59
60#define SP_INT_RX_ENABLE  0x01
61#define SP_INT_TX_ENABLE  0x02
62#define SP_INT_LS_ENABLE  0x04
63#define SP_INT_MS_ENABLE  0x08
64
65#define NS16550_ENABLE_ALL_INTR           (SP_INT_RX_ENABLE | SP_INT_TX_ENABLE)
66#define NS16550_DISABLE_ALL_INTR          0x00
67#define NS16550_ENABLE_ALL_INTR_EXCEPT_TX (SP_INT_RX_ENABLE)
68
69/*
70 * Define serial port interrupt ID register structure.
71 */
72
73#define SP_IID_0 0x01
74#define SP_IID_1 0x02
75#define SP_IID_2 0x04
76#define SP_IID_3 0x08
77
78/*
79 * Define serial port fifo control register structure.
80 */
81
82#define SP_FIFO_ENABLE  0x01
83#define SP_FIFO_RXRST 0x02
84#define SP_FIFO_TXRST 0x04
85#define SP_FIFO_DMA   0x08
86#define SP_FIFO_RXLEVEL 0xc0
87
88#define SP_FIFO_SIZE 16
89
90/*
91 * Define serial port line control register structure.
92 */
93
94#define SP_LINE_SIZE  0x03
95#define SP_LINE_STOP  0x04
96#define SP_LINE_PAR   0x08
97#define SP_LINE_ODD   0x10
98#define SP_LINE_STICK 0x20
99#define SP_LINE_BREAK 0x40
100#define SP_LINE_DLAB  0x80
101
102/*
103 * Line status register character size definitions.
104 */
105
106#define FIVE_BITS 0x0                   /* five bits per character */
107#define SIX_BITS 0x1                    /* six bits per character */
108#define SEVEN_BITS 0x2                  /* seven bits per character */
109#define EIGHT_BITS 0x3                  /* eight bits per character */
110
111/*
112 * Define serial port modem control register structure.
113 */
114
115#define SP_MODEM_DTR  0x01
116#define SP_MODEM_RTS  0x02
117#define SP_MODEM_IRQ  0x08
118#define SP_MODEM_LOOP 0x10
119#define SP_MODEM_DIV4 0x80
120
121/*
122 * Define serial port line status register structure.
123 */
124
125#define SP_LSR_RDY    0x01
126#define SP_LSR_EOVRUN 0x02
127#define SP_LSR_EPAR   0x04
128#define SP_LSR_EFRAME 0x08
129#define SP_LSR_BREAK  0x10
130#define SP_LSR_THOLD  0x20
131#define SP_LSR_TX   0x40
132#define SP_LSR_EFIFO  0x80
133
134#ifdef __cplusplus
135}
136#endif
137
138#endif /* _NS16550_P_H_ */