Ticket #2810: 0001-Remove-sparc-sis-BSP.patch

File 0001-Remove-sparc-sis-BSP.patch, 8.0 KB (added by Joel Sherrill, on 11/15/16 at 18:21:26)
  • c/src/lib/libbsp/sparc/erc32/clock/ckinit.c

    From a6ca5ee5a9ff72305131df256c103f897ab388e3 Mon Sep 17 00:00:00 2001
    From: Joel Sherrill <joel@rtems.org>
    Date: Tue, 15 Nov 2016 12:19:39 -0600
    Subject: [PATCH] Remove sparc/sis BSP.
    
    closes #2810.
    ---
     c/src/lib/libbsp/sparc/erc32/clock/ckinit.c      |  4 --
     c/src/lib/libbsp/sparc/erc32/configure.ac        | 13 ------
     c/src/lib/libbsp/sparc/erc32/make/custom/sis.cfg |  5 ---
     c/src/lib/libbsp/sparc/erc32/timer/timer.c       |  6 ---
     c/src/lib/libbsp/sparc/leon2/clock/ckinit.c      |  4 --
     c/src/lib/libbsp/sparc/leon2/configure.ac        |  6 ---
     c/src/lib/libbsp/sparc/leon3/clock/ckinit.c      |  4 --
     c/src/lib/libbsp/sparc/leon3/configure.ac        |  6 ---
     c/src/lib/libbsp/sparc/shared/start/start.S      | 56 ------------------------
     9 files changed, 104 deletions(-)
     delete mode 100644 c/src/lib/libbsp/sparc/erc32/make/custom/sis.cfg
    
    diff --git a/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c b/c/src/lib/libbsp/sparc/erc32/clock/ckinit.c
    index fd05a2c..21c82de 100644
    a b  
    2828#include <rtems/timecounter.h>
    2929#include <rtems/score/sparcimpl.h>
    3030
    31 #if SIMSPARC_FAST_IDLE==1
    32 #define CLOCK_DRIVER_USE_FAST_IDLE 1
    33 #endif
    34 
    3531/*
    3632 *  The Real Time Clock Counter Timer uses this trap type.
    3733 */
  • c/src/lib/libbsp/sparc/erc32/configure.ac

    diff --git a/c/src/lib/libbsp/sparc/erc32/configure.ac b/c/src/lib/libbsp/sparc/erc32/configure.ac
    index 28c8f4b..d6dabce 100644
    a b of test message) and then exit. In this case, the program returns control 
    3030to the simulator command line before the program has even queued the output
    3131to the uart.  Thus sis has no chance of getting the data out.])
    3232
    33 RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
    34 RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
    35 [If defined, speed up the clock ticks while the idle task is running so
    36  time spent in the idle task is minimized.  This significantly reduces
    37  the wall time required to execute the RTEMS test suites.])
    38 
    39 RTEMS_BSPOPTS_SET([ENABLE_SIS_QUIRKS],[sis],[1])
    40 RTEMS_BSPOPTS_SET([ENABLE_SIS_QUIRKS],[*],[0])
    41 RTEMS_BSPOPTS_HELP([ENABLE_SIS_QUIRKS],
    42 [If defined, then the SIS simulator specific code in the
    43  BSP will be enabled.  In particular, SIS requires special
    44  initialization not used on real ERC32 hardware.])
    45 
    4633RTEMS_BSPOPTS_SET([BSP_POWER_DOWN_AT_FATAL_HALT],[*],[])
    4734RTEMS_BSPOPTS_HELP([BSP_POWER_DOWN_AT_FATAL_HALT],
    4835[If defined, CPU is spinning on fatal exit. Otherwise generate system
  • deleted file c/src/lib/libbsp/sparc/erc32/make/custom/sis.cfg

    diff --git a/c/src/lib/libbsp/sparc/erc32/make/custom/sis.cfg b/c/src/lib/libbsp/sparc/erc32/make/custom/sis.cfg
    deleted file mode 100644
    index 1f14475..0000000
    + -  
    1 #
    2 #  Configuration file for the SPARC/ERC32 Simulator SIS
    3 #
    4 
    5 include $(RTEMS_ROOT)/make/custom/erc32.cfg
  • c/src/lib/libbsp/sparc/erc32/timer/timer.c

    diff --git a/c/src/lib/libbsp/sparc/erc32/timer/timer.c b/c/src/lib/libbsp/sparc/erc32/timer/timer.c
    index 4cf638e..05728f8 100644
    a b void benchmark_timer_initialize(void) 
    5252
    5353}
    5454
    55 #if ENABLE_SIS_QUIRKS
    56 #define AVG_OVERHEAD      8  /* It typically takes 3.0 microseconds */
    57                              /*     to start/stop the timer. */
    58 #define LEAST_VALID       9  /* Don't trust a value lower than this */
    59 #else
    6055#define AVG_OVERHEAD     12  /* It typically takes 3.0 microseconds */
    6156                             /*     to start/stop the timer. */
    6257#define LEAST_VALID      13  /* Don't trust a value lower than this */
    63 #endif
    6458
    6559benchmark_timer_t benchmark_timer_read(void)
    6660{
  • c/src/lib/libbsp/sparc/leon2/clock/ckinit.c

    diff --git a/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c b/c/src/lib/libbsp/sparc/leon2/clock/ckinit.c
    index ced5d3f..56a385e 100644
    a b  
    2727#include <rtems/timecounter.h>
    2828#include <rtems/score/sparcimpl.h>
    2929
    30 #if SIMSPARC_FAST_IDLE==1
    31 #define CLOCK_DRIVER_USE_FAST_IDLE 1
    32 #endif
    33 
    3430static rtems_timecounter_simple leon2_tc;
    3531
    3632static uint32_t leon2_tc_get( rtems_timecounter_simple *tc )
  • c/src/lib/libbsp/sparc/leon2/configure.ac

    diff --git a/c/src/lib/libbsp/sparc/leon2/configure.ac b/c/src/lib/libbsp/sparc/leon2/configure.ac
    index 4f50ca7..cb92d69 100644
    a b of test message) and then exit. In this case, the program returns control 
    3030to the simulator command line before the program has even queued the output
    3131to the uart.  Thus sis has no chance of getting the data out.])
    3232
    33 RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
    34 RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
    35 [If defined, speed up the clock ticks while the idle task is running so
    36  time spent in the idle task is minimized.  This significantly reduces
    37  the wall time required to execute the RTEMS test suites.])
    38 
    3933RTEMS_BSPOPTS_SET([BSP_POWER_DOWN_AT_FATAL_HALT],[*],[])
    4034RTEMS_BSPOPTS_HELP([BSP_POWER_DOWN_AT_FATAL_HALT],
    4135[If defined, CPU is spinning on fatal exit. Otherwise generate system
  • c/src/lib/libbsp/sparc/leon3/clock/ckinit.c

    diff --git a/c/src/lib/libbsp/sparc/leon3/clock/ckinit.c b/c/src/lib/libbsp/sparc/leon3/clock/ckinit.c
    index 69b0bda..f2372ec 100644
    a b  
    3636 */
    3737#ifndef RTEMS_DRVMGR_STARTUP
    3838
    39 #if SIMSPARC_FAST_IDLE==1
    40 #define CLOCK_DRIVER_USE_FAST_IDLE 1
    41 #endif
    42 
    4339/* LEON3 Timer system interrupt number */
    4440static int clkirq;
    4541
  • c/src/lib/libbsp/sparc/leon3/configure.ac

    diff --git a/c/src/lib/libbsp/sparc/leon3/configure.ac b/c/src/lib/libbsp/sparc/leon3/configure.ac
    index 4b81d73..ac71f07 100644
    a b RTEMS_BSPOPTS_HELP([CONSOLE_USE_INTERRUPTS], 
    2727Under the simulator (especially when FAST_UART is defined), polled seems
    2828to operate better.])
    2929
    30 RTEMS_BSPOPTS_SET([SIMSPARC_FAST_IDLE],[*],[])
    31 RTEMS_BSPOPTS_HELP([SIMSPARC_FAST_IDLE],
    32 [If defined, speed up the clock ticks while the idle task is running so
    33  time spent in the idle task is minimized.  This significantly reduces
    34  the wall time required to execute the RTEMS test suites.])
    35 
    3630RTEMS_BSPOPTS_SET([BSP_LEON3_SMP],[*],[1])
    3731RTEMS_BSPOPTS_HELP([BSP_LEON3_SMP],
    3832[Always defined when on a LEON3 to enable the LEON3 support for
  • c/src/lib/libbsp/sparc/shared/start/start.S

    diff --git a/c/src/lib/libbsp/sparc/shared/start/start.S b/c/src/lib/libbsp/sparc/shared/start/start.S
    index 46498b8..2c94c5f 100644
    a b cpu0: 
    300300        mov     %sp, %fp                ! Set frame pointer
    301301        nop
    302302
    303 #if ENABLE_SIS_QUIRKS==1
    304 
    305 #include <erc32.h>
    306 
    307 /* Check if MEC is initialised. If not, this means that we are
    308    running on the simulator. Initiate some of the parameters
    309    that are done by the boot-prom otherwise.
    310 */
    311 
    312         set     SYM(ERC32_MEC), %g3  ! g3 = base address of peripherals
    313         ld      [%g3], %g2
    314         set     0xfe080000, %g1
    315         andcc   %g1, %g2, %g0
    316         bne     2f
    317 
    318  /* Set the correct memory size in MEC memory config register */
    319 
    320         set     SYM(PROM_SIZE), %l0
    321         set     0, %l1
    322         srl     %l0, 18, %l0
    323 1:
    324         tst     %l0
    325         srl     %l0, 1, %l0
    326         bne,a   1b
    327         inc     %l1
    328         sll     %l1, 8, %l1
    329 
    330         set     SYM(RAM_SIZE), %l0
    331         srl     %l0, 19, %l0
    332 1:
    333         tst     %l0
    334         srl     %l0, 1, %l0
    335         bne,a   1b
    336         inc     %l1
    337         sll     %l1, 10, %l1
    338 
    339         ! set the Memory Configuration
    340         st     %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ]
    341         !DISABLE THE HARDWARE WATCHDOG
    342         st     %g0, [ %g3 + ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET ]
    343         !Reduce the number of wait states to 0 for all memory areas.
    344         st     %g0, [ %g3 + ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET ]
    345 
    346         set     SYM(RAM_START), %l1  ! Cannot use RAM_END due to bug in linker
    347         set     SYM(RAM_SIZE), %l2
    348         add     %l1, %l2, %sp
    349         st      %sp, [%g5]
    350 
    351 
    352         set     SYM(CLOCK_SPEED), %g5   ! Use 14 MHz in simulator
    353         set     14, %g1
    354         st      %g1, [%g5]
    355 
    356 2:
    357 #endif
    358 
    359303        /*
    360304         *  Copy the initialized data to RAM
    361305         *