diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspsmp.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspsmp.c
index 3940352..dec9ac0 100644
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13 | 13 | */ |
14 | 14 | |
15 | 15 | #include <rtems/score/smpimpl.h> |
| 16 | #include <bsp/start.h> |
16 | 17 | |
17 | 18 | bool _CPU_SMP_Start_processor(uint32_t cpu_index) |
18 | 19 | { |
| 20 | if ( cpu_index == 1 ) { |
| 21 | void (**cpu1_start_address)(void) = (void (**)(void)) 0xfffffff0; |
| 22 | |
| 23 | if (*cpu1_start_address != &_start) { |
| 24 | *cpu1_start_address = &_start; |
| 25 | _CPU_SMP_Processor_event_broadcast(); |
| 26 | } |
| 27 | // else, the bootloader has already done it. |
| 28 | } |
| 29 | |
19 | 30 | /* |
20 | 31 | * Wait for secondary processor to complete its basic initialization so that |
21 | 32 | * we can enable the unified L2 cache. |
22 | 33 | */ |
23 | 34 | return _Per_CPU_State_wait_for_non_initial_state(cpu_index, 0); |
24 | 35 | } |
| 36 | |
diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c b/c/src/lib/libbsp/arm/xilinx-zynq/startup/bspstartmmu.c
index c7a1089..cf63fec 100644
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zynq_mmu_config_table[] = { |
26 | 26 | .begin = 0xe0000000U, |
27 | 27 | .end = 0xe0200000U, |
28 | 28 | .flags = ARMV7_MMU_DEVICE |
29 | | }, { |
| 29 | }, |
| 30 | { |
30 | 31 | .begin = 0xf8000000U, |
31 | 32 | .end = 0xf9000000U, |
32 | 33 | .flags = ARMV7_MMU_DEVICE |
33 | | } |
| 34 | }, |
| 35 | { |
| 36 | // hi-mapped 64k of CCM, as device memory. |
| 37 | .begin = 0xffff0000U, |
| 38 | .end = 0xffffffffU, |
| 39 | .flags = ARMV7_MMU_DEVICE |
| 40 | }, |
34 | 41 | }; |
35 | 42 | |
36 | 43 | /* |