Ticket #2077: phycore_mpc5554.diffs

File phycore_mpc5554.diffs, 6.6 KB (added by dufault, on Sep 30, 2012 at 3:35:25 PM)

Patches to add enhancements.

Line 
1diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac b/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
2index 1cd019f..6793def 100644
3--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
4+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/configure.ac
5@@ -23,6 +23,10 @@ RTEMS_PROG_CCAS
6 RTEMS_CHECK_NETWORKING
7 AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
8 
9+RTEMS_BSPOPTS_SET([BSP_DEFAULT_BAUD_RATE],[*],[115200])
10+RTEMS_BSPOPTS_HELP([BSP_DEFAULT_BAUD_RATE],
11+[Default console baud rate])
12+
13 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([gwlcfm],[])
14 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([mpc5643l*],[])
15 RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[1])
16diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-esci.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-esci.c
17index 9aa19ac..83a4fa9 100644
18--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-esci.c
19+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-esci.c
20@@ -266,7 +266,7 @@ static int mpc55xx_esci_first_open(int major, int minor, void *arg)
21 
22   self->tty = tty;
23 
24-  rv = rtems_termios_set_initial_baud(tty, 115200);
25+  rv = rtems_termios_set_initial_baud(tty, BSP_DEFAULT_BAUD_RATE);
26   if (rv != 0) {
27     rtems_fatal_error_occurred(0xdeadbeef);
28   }
29diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-generic.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-generic.c
30index e6c2c58..b007469 100644
31--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-generic.c
32+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-generic.c
33@@ -18,12 +18,20 @@
34  * http://www.rtems.com/license/LICENSE.
35  */
36 
37+#include <bsp.h>
38 #include <bsp/console-generic.h>
39 
40 #include <rtems/console.h>
41 
42+/* Construct the symbolic representation of the numeric default baud, i.e.,
43+ * if BSP_DEFAULT_BAUD_RATE is 115200 generate B115200.
44+ */
45+#define BSP_DEFAULT_BAUD_PASTE_(Y) B ## Y
46+#define BSP_DEFAULT_BAUD_EVALUATE_(Y) BSP_DEFAULT_BAUD_PASTE_(Y)
47+#define BSP_DEFAULT_BAUD_SYMBOLIC BSP_DEFAULT_BAUD_EVALUATE_(BSP_DEFAULT_BAUD_RATE)
48+
49 static const struct termios console_generic_termios = {
50-  .c_cflag = CS8 | CREAD | CLOCAL | B115200
51+  .c_cflag = CS8 | CREAD | CLOCAL | BSP_DEFAULT_BAUD_SYMBOLIC
52 };
53 
54 static void console_generic_char_out(char c)
55diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-linflex.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-linflex.c
56index 54ac08e..e4039f3 100644
57--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-linflex.c
58+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/console/console-linflex.c
59@@ -259,7 +259,7 @@ static int mpc55xx_linflex_first_open(int major, int minor, void *arg)
60   pcr.B.PA = self->tx_pa_value;
61   self->tx_pcr_register->R = pcr.R;
62 
63-  rv = rtems_termios_set_initial_baud(tty, 115200);
64+  rv = rtems_termios_set_initial_baud(tty, BSP_DEFAULT_BAUD_RATE);
65   if (rv != 0) {
66     rtems_fatal_error_occurred(0xdeadbeef);
67   }
68diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/phycore_mpc5554.cfg b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/phycore_mpc5554.cfg
69index 37fd6d2..886697e 100644
70--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/phycore_mpc5554.cfg
71+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/make/custom/phycore_mpc5554.cfg
72@@ -9,8 +9,6 @@
73 
74 RTEMS_LINKCMDS=linkcmds.phycore_mpc5554
75 
76-ifeq ($(PPC_USE_SPE),1)
77-CPU_CFLAGS_FLOAT=-mfloat-gprs=single -mspe
78-endif
79+CPU_CFLAGS_FLOAT?=-mfloat-gprs=single -mspe
80 
81 include $(RTEMS_ROOT)/make/custom/mpc55xx.inc
82diff --git a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c
83index cc73577..502c573 100644
84--- a/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c
85+++ b/c/src/lib/libbsp/powerpc/mpc55xxevb/startup/start-config-mmu.c
86@@ -30,59 +30,12 @@ BSP_START_TEXT_SECTION const struct MMU_tag
87   /* External Ethernet Controller 64k */
88   MPC55XX_MMU_TAG_INITIALIZER(5, 0x3fff8000, MPC55XX_MMU_64K, 0, 1, 1, 1)
89 #elif defined(MPC55XX_BOARD_PHYCORE_MPC5554)
90-    /* XXX I'm not using TLB1 entry 2 the same way as
91-        * in the BAM.
92-     */
93-    /*  Set up MMU TLB1 entry 2 for external ram. */
94-    /*  Effective Base address = 0x2100_0000 XXX NOT LIKE BAM */
95-    /*       Real Base address = 0x2100_0000 XXX NOT LIKE BAM */
96-    /*  Page Size            6 =  4MB XXX Not like BAM */
97-    /*  Not Guarded, Cache Enable, All Access (0, 3F) */
98-    {
99-        { .R = 0x10020000},     /* MAS0 */
100-        { .R = 0xC0000600},     /* MAS1 */
101-        { .R = 0x21000000},     /* MAS2 */
102-        { .R = 0x2100003F}      /* MAS3 */
103-    },
104-
105-    /*  Set up MMU TLB1 entry 5 for second half of SRAM (debug RAM) */
106-    /*  Effective Base address = 0x2140_0000 */
107-    /*       Real Base address = 0x2140_0000 */
108-    /*  Page Size            6 = 4MB */
109-    /*  Not Guarded, Cache Enable, All Access (0, 3F) */
110-    {
111-        { .R =  0x10050000 },   /* MAS0 */
112-        { .R =  0xC0000600 },   /* MAS1 */
113-        { .R =  0x21400000 },   /* MAS2 */
114-        { .R =  0x2140003F }    /* MAS3 */
115-    },
116-    /*  Set up MMU TLB1 entry 6 for External LAN91C111 */
117-    /*  Effective Base address = 0x2200_0000 */
118-    /*       Real Base address = 0x2200_0000 */
119-    /*  Page Size            7 = 16MB */
120-    /*  Write-through, Guarded, Cache Inhibit, All Access (E, 3F) */
121-    {
122-        { .R = 0x10060000},     /* MAS0 */
123-        { .R = 0xC0000700},     /* MAS1 */
124-        { .R = 0x2200000E},     /* MAS2 */
125-        { .R = 0x2200003F}      /* MAS3 */
126-    },
127-
128-    /*  Set up MMU TLB1 entry 7 for External FPGA */
129-    /*  Effective Base address = 0x2300_0000 */
130-    /*       Real Base address = 0x2300_0000 */
131-    /*  Page Size            7 = 16MB */
132-    /*  Write-through, Guarded, Cache Inhibit, All Access (E, 3F) */
133-    {
134-        { .R = 0x10070000},     /* MAS0 */
135-        { .R = 0xC0000700},     /* MAS1 */
136-        { .R = 0x2300000E},     /* MAS2 */
137-        { .R = 0x2300003F},     /* MAS3 */
138-    },
139-
140-       /* Should also set up maps for the debug RAM and the
141-        * external flash.
142-        */
143+  /* Arguments macro:       idx,  addr,      size,              x, w, r, io */
144+  MPC55XX_MMU_TAG_INITIALIZER(8, 0x20000000, MPC55XX_MMU_8M,    1, 0, 1, 0), /* External FLASH 8M */
145+  MPC55XX_MMU_TAG_INITIALIZER(2, 0x21000000, MPC55XX_MMU_4M,    0, 1, 1, 0), /* Lower half SRAM */
146+  MPC55XX_MMU_TAG_INITIALIZER(5, 0x21400000, MPC55XX_MMU_4M,    1, 1, 1, 0), /* Upper half SRAM ("debug") */
147+  MPC55XX_MMU_TAG_INITIALIZER(6, 0x22000000, MPC55XX_MMU_16M,   0, 1, 1, 1), /* LAN91C111 */
148+  MPC55XX_MMU_TAG_INITIALIZER(7, 0x23000000, MPC55XX_MMU_16M,   0, 1, 1, 1), /* FPGA */
149 #elif defined(MPC55XX_BOARD_MPC5566EVB)
150   /* Internal flash 3M */
151   MPC55XX_MMU_TAG_INITIALIZER(1, 0x00000000, MPC55XX_MMU_64K, 1, 0, 1, 0),