Ticket #2022: 0005-Get-rid-of-my-.svn-directories.patch

deleted file c/src/lib/libbsp/powerpc/virtex4/.svn/entries

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-10
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-dir
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-file:///afs/slac.stanford.edu/g/cci/repositories/ctkrepo/rtems/trunk/bsp/virtex4
-file:///afs/slac.stanford.edu/g/cci/repositories/ctkrepo
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-bsp_specs
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deleted file c/src/lib/libbsp/powerpc/virtex4/.svn/prop-base/bsp_specs.svn-base

@@ -1 @@
-K 13
-svn:eol-style
-V 6
-native
-K 12
-svn:keywords
-V 31
-Author Date HeadURL Id Revision
-END

deleted file c/src/lib/libbsp/powerpc/virtex4/.svn/text-base/ChangeLog.svn-base

@@ -1 @@
-2008-03-13      Till Straumann <strauman@slac.stanford.edu>
-
-        * ChangeLog, rce405.cfg: added files.

deleted file c/src/lib/libbsp/powerpc/virtex4/.svn/text-base/Makefile.am.svn-base

@@ -1 @@
-##
-## $Id: $
-##
-
-ACLOCAL_AMFLAGS = -I ../../../../aclocal
-
-include $(top_srcdir)/../../../../automake/compile.am
-
-include_bspdir = $(includedir)/bsp
-
-dist_project_lib_DATA = bsp_specs
-
-# include
-include_HEADERS  = include/bsp.h
-#include_HEADERS += include/tm27.h
-
-nodist_include_HEADERS     = include/bspopts.h
-nodist_include_bsp_HEADERS = ../../shared/include/bootcard.h
-DISTCLEANFILES             = include/bspopts.h
-
-nodist_include_HEADERS += include/coverhd.h
-
-# start
-noinst_LIBRARIES      = libbspstart.a
-libbspstart_a_SOURCES = ../../powerpc/shared/start/rtems_crti.S
-project_lib_DATA      = rtems_crti.$(OBJEXT)
-
-dist_project_lib_DATA += startup/linkcmds
-
-noinst_LIBRARIES += libbsp.a
-
-# startup
-libbsp_a_SOURCES = startup/bspclean.c \
-                   ../shared/startup/zerobss.c \
-                   ../../shared/bsplibc.c \
-                   ../../shared/bspgetworkarea.c \
-                   ../../shared/bsppost.c \
-                   startup/bspstart.c \
-                   ../../shared/bootcard.c \
-                   ../../shared/sbrk.c \
-                   ../../shared/gnatinstallhandler.c
-
-# start
-libbsp_a_SOURCES += startup/start.S
-
-# clock & timer
-libbsp_a_SOURCES += clock/clock.c
-libbsp_a_SOURCES += ../../../libcpu/@RTEMS_CPU@/ppc403/timer/timer.c
-
-# console
-libbsp_a_SOURCES += startup/dummy_console.c \
-                    ../../shared/dummy_printk_support.c
-
-# irq
-include_bsp_HEADERS = include/irq.h
-
-#vectors
-include_bsp_HEADERS += ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h
-include_bsp_HEADERS += ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h
-
-libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/@exceptions@/rtems-cpu.rel \
-                  ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
-                  ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
-                  ../../../libcpu/@RTEMS_CPU@/shared/cache.rel \
-                  ../../../libcpu/@RTEMS_CPU@/shared/cpuIdent.rel
-
-EXTRA_DIST =
-
-include $(srcdir)/preinstall.am
-include $(top_srcdir)/../../../../automake/local.am

deleted file c/src/lib/libbsp/powerpc/virtex4/.svn/text-base/bsp_specs.svn-base

@@ -1 @@
-%rename startfile old_startfile
-%rename link      old_link
-%rename endfile   old_endfile
-
-
-*startfile:
-%{!qrtems: %(old_startfile)} \
-%{!nostdlib: %{qrtems:  ecrti%O%s rtems_crti%O%s crtbegin.o%s }}
-
-*link:
-%{!qrtems: %(old_link)} \
-%{qrtems: -dc -dp -Bstatic -u __vectors -u download_entry -N }
-
-*endfile:
-%{!qrtems: %(old_endfile)} \
-%{qrtems: crtend.o%s ecrtn.o%s}

deleted file c/src/lib/libbsp/powerpc/virtex4/.svn/text-base/configure.ac.svn-base

@@ -1 @@
-dnl Process this file with autoconf to produce a configure script.
-dnl
-dnl $Id: $
-
-AC_PREREQ(2.68)
-AC_INIT([rtems-c-src-lib-libbsp-powerpc-virtex4],[_RTEMS_VERSION],[http://www.rtems.org/bugzilla])
-AC_CONFIG_SRCDIR([bsp_specs])
-RTEMS_TOP(../../../../../..)
-
-RTEMS_CANONICAL_TARGET_CPU
-AM_INIT_AUTOMAKE([no-define nostdinc foreign 1.11.1])
-RTEMS_BSP_CONFIGURE
-
-RTEMS_PROG_CC_FOR_TARGET
-RTEMS_CANONICALIZE_TOOLS
-RTEMS_PROG_CCAS
-
-RTEMS_CHECK_NETWORKING
-
-AM_CONDITIONAL(HAS_NETWORKING,test "$HAS_NETWORKING" = "yes")
-
-RTEMS_BSPOPTS_SET([PPC_USE_SPRG],[*],[1])
-RTEMS_BSPOPTS_HELP([PPC_USE_SPRG],
-[If defined, then the PowerPC specific code in RTEMS will use some
- of the special purpose registers to slightly optimize interrupt
- response time.  The use of these registers can conflict with
- other tools like debuggers.])
-
-RTEMS_BSPOPTS_SET([PPC_VECTOR_FILE_BASE],[*],[0x0100])
-RTEMS_BSPOPTS_HELP([PPC_VECTOR_FILE_BASE],
-[This defines the base address of the exception table.
- NOTE: Vectors are actually at 0xFFF00000 but file starts at offset.])
-
-RTEMS_BSP_CLEANUP_OPTIONS(0, 1)
-
-# Explicitly list all Makefiles here
-AC_CONFIG_FILES([Makefile])
-
-RTEMS_PPC_EXCEPTIONS
-
-AC_OUTPUT

deleted file c/src/lib/libbsp/powerpc/virtex4/.svn/text-base/preinstall.am.svn-base

@@ -1 @@
-## Automatically generated by ampolish3 - Do not edit
-
-if AMPOLISH3
-$(srcdir)/preinstall.am: Makefile.am
-        $(AMPOLISH3) $(srcdir)/Makefile.am > $(srcdir)/preinstall.am
-endif
-
-PREINSTALL_DIRS =
-DISTCLEANFILES += $(PREINSTALL_DIRS)
-
-all-local: $(TMPINSTALL_FILES)
-
-TMPINSTALL_FILES =
-CLEANFILES = $(TMPINSTALL_FILES)
-
-all-am: $(PREINSTALL_FILES)
-
-PREINSTALL_FILES =
-CLEANFILES += $(PREINSTALL_FILES)
-
-$(PROJECT_LIB)/$(dirstamp):
-        @$(MKDIR_P) $(PROJECT_LIB)
-        @: > $(PROJECT_LIB)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_LIB)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/$(dirstamp):
-        @$(MKDIR_P) $(PROJECT_INCLUDE)
-        @: > $(PROJECT_INCLUDE)/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/$(dirstamp)
-
-$(PROJECT_INCLUDE)/bsp/$(dirstamp):
-        @$(MKDIR_P) $(PROJECT_INCLUDE)/bsp
-        @: > $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-PREINSTALL_DIRS += $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-
-$(PROJECT_LIB)/bsp_specs: bsp_specs $(PROJECT_LIB)/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_LIB)/bsp_specs
-PREINSTALL_FILES += $(PROJECT_LIB)/bsp_specs
-
-$(PROJECT_INCLUDE)/bsp.h: include/bsp.h $(PROJECT_INCLUDE)/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp.h
-
-$(PROJECT_INCLUDE)/bspopts.h: include/bspopts.h $(PROJECT_INCLUDE)/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bspopts.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bspopts.h
-
-$(PROJECT_INCLUDE)/bsp/bootcard.h: ../../shared/include/bootcard.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/bootcard.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/bootcard.h
-
-$(PROJECT_INCLUDE)/coverhd.h: include/coverhd.h $(PROJECT_INCLUDE)/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/coverhd.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/coverhd.h
-
-$(PROJECT_LIB)/rtems_crti.$(OBJEXT): rtems_crti.$(OBJEXT) $(PROJECT_LIB)/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
-TMPINSTALL_FILES += $(PROJECT_LIB)/rtems_crti.$(OBJEXT)
-
-$(PROJECT_LIB)/linkcmds: startup/linkcmds $(PROJECT_LIB)/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_LIB)/linkcmds
-PREINSTALL_FILES += $(PROJECT_LIB)/linkcmds
-
-$(PROJECT_INCLUDE)/bsp/irq.h: include/irq.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq.h
-
-$(PROJECT_INCLUDE)/bsp/vectors.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/vectors.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/vectors.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/vectors.h
-
-$(PROJECT_INCLUDE)/bsp/irq_supp.h: ../../../libcpu/@RTEMS_CPU@/@exceptions@/bspsupport/irq_supp.h $(PROJECT_INCLUDE)/bsp/$(dirstamp)
-        $(INSTALL_DATA) $< $(PROJECT_INCLUDE)/bsp/irq_supp.h
-PREINSTALL_FILES += $(PROJECT_INCLUDE)/bsp/irq_supp.h
-

deleted file c/src/lib/libbsp/powerpc/virtex4/clock/.svn/entries

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-file:///afs/slac.stanford.edu/g/cci/repositories/ctkrepo
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deleted file c/src/lib/libbsp/powerpc/virtex4/clock/.svn/prop-base/clock.c.svn-base

@@ -1 @@
-K 13
-svn:eol-style
-V 6
-native
-K 12
-svn:keywords
-V 31
-Author Date HeadURL Id Revision
-END

deleted file c/src/lib/libbsp/powerpc/virtex4/clock/.svn/text-base/clock.c.svn-base

@@ -1 @@
-/*  clock.c
- *
- *  This routine initializes the interval timer on the
- *  PowerPC 403 CPU.  The tick frequency is specified by the bsp.
- *
- *  Author: Andrew Bray <andy@i-cubed.co.uk>
- *
- *  COPYRIGHT (c) 1995 by i-cubed ltd.
- *
- *  To anyone who acknowledges that this file is provided "AS IS"
- *  without any express or implied warranty:
- *      permission to use, copy, modify, and distribute this file
- *      for any purpose is hereby granted without fee, provided that
- *      the above copyright notice and this notice appears in all
- *      copies, and that the name of i-cubed limited not be used in
- *      advertising or publicity pertaining to distribution of the
- *      software without specific, written prior permission.
- *      i-cubed limited makes no representations about the suitability
- *      of this software for any purpose.
- *
- *  Derived from c/src/lib/libcpu/hppa1.1/clock/clock.c:
- *
- *  Modifications for deriving timer clock from cpu system clock by
- *              Thomas Doerfler <td@imd.m.isar.de>
- *  for these modifications:
- *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
- *
- *  COPYRIGHT (c) 1989-2007.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
- *
- *  Modifications for PPC405GP by Dennis Ehlin
- *
- *  $Id$
- */
-
-#include <rtems.h>
-#include <rtems/clockdrv.h>
-#include <rtems/libio.h>
-#include <stdlib.h>                     /* for atexit() */
-#include <rtems/bspIo.h>
-#include <rtems/powerpc/powerpc.h>
-
-/*
- * check, which exception handling code is present
- */
-
-#include <bsp.h>
-
-#include <bsp/vectors.h>
-#include <bsp/irq_supp.h>
-
-volatile uint32_t   Clock_driver_ticks;
-static uint32_t   pit_value, tick_time;
-static bool auto_restart;
-
-void Clock_exit( void );
-
-rtems_isr_entry set_vector(                     /* returns old vector */
-  rtems_isr_entry     handler,                  /* isr routine        */
-  rtems_vector_number vector,                   /* vector number      */
-  int                 type                      /* RTEMS or RAW intr  */
-);
-
-/*
- * These are set by clock driver during its init
- */
-
-rtems_device_major_number rtems_clock_major = ~0;
-rtems_device_minor_number rtems_clock_minor;
-
-static inline uint32_t   get_itimer(void)
-{
-    register uint32_t   rc;
-
-    asm volatile ("mfspr %0, 0x10c" : "=r" ((rc))); /* 405GP TBL */
-
-    return rc;
-}
-
-/*
- *  ISR Handler
- */
-
-int Clock_isr(BSP_Exception_frame *f, unsigned int vector)
-{
-    uint32_t   clicks_til_next_interrupt;
-#if defined(BSP_PPC403_CLOCK_ISR_IRQ_LEVEL)
-    uint32_t   l_orig = _ISR_Get_level();
-#endif
-    if (!auto_restart)
-    {
-      uint32_t   itimer_value;
-      /*
-       * setup for next interrupt; making sure the new value is reasonably
-       * in the future.... in case we lost out on an interrupt somehow
-       */
-
-      itimer_value = get_itimer();
-      tick_time += pit_value;
-
-      /*
-       * how far away is next interrupt *really*
-       * It may be a long time; this subtraction works even if
-       * Clock_clicks_interrupt < Clock_clicks_low_order via
-       * the miracle of unsigned math.
-       */
-      clicks_til_next_interrupt = tick_time - itimer_value;
-
-      /*
-       * If it is too soon then bump it up.
-       * This should only happen if CPU_HPPA_CLICKS_PER_TICK is too small.
-       * But setting it low is useful for debug, so...
-       */
-
-      if (clicks_til_next_interrupt < 400)
-      {
-        tick_time = itimer_value + 1000;
-        clicks_til_next_interrupt = 1000;
-        /* XXX: count these! this should be rare */
-      }
-
-      /*
-       * If it is too late, that means we missed the interrupt somehow.
-       * Rather than wait 35-50s for a wrap, we just fudge it here.
-       */
-
-      if (clicks_til_next_interrupt > pit_value)
-      {
-        tick_time = itimer_value + 1000;
-        clicks_til_next_interrupt = 1000;
-        /* XXX: count these! this should never happen :-) */
-      }
-
-      asm volatile ("mtspr 0x3db, %0" :: "r"
-                         (clicks_til_next_interrupt)); /* PIT */
-    }
-
-    /* Clear the Programmable Interrupt Status */
-    asm volatile ( "mtspr 0x3d8, %0" :: "r" (0x08000000)); /* TSR */
-
-    Clock_driver_ticks++;
-
-    rtems_clock_tick();
-
-    return 0;
-}
-
-void ClockOff(void)
-{
-    register uint32_t   tcr;
-
-    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr))); /* TCR */
-
-    tcr &= ~ 0x04400000;
-
-    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
-}
-
-void ClockOn(void)
-{
-    uint32_t   iocr;
-    register uint32_t   tcr;
-
-    Clock_driver_ticks = 0;
-
-    asm volatile ("mfdcr %0, 0x0b2" : "=r" (iocr));  /*405GP CPC0_CR1 */
-    if (bsp_timer_internal_clock) {
-      iocr &=~0x800000;               /* timer clocked from system clock CETE*/
-    }
-    else {
-      iocr |= 0x800000;               /* select external timer clock CETE*/
-    }
-    asm volatile ("mtdcr 0x0b2, %0" : "=r" (iocr) : "0" (iocr)); /* 405GP CPC0_CR1 */
-
-     /*
-      * Enable auto restart
-      */
-
-    auto_restart = true;
-
-    pit_value = rtems_configuration_get_microseconds_per_tick() *
-      bsp_clicks_per_usec;
-
-     /*
-      * Set PIT value
-      */
-
-    asm volatile ("mtspr 0x3db, %0" : : "r" (pit_value)); /* PIT */
-
-     /*
-      * Set timer to autoreload, bit TCR->ARE = 1  0x0400000
-      * Enable PIT interrupt, bit TCR->PIE = 1     0x4000000
-      */
-    tick_time = get_itimer() + pit_value;
-
-    asm volatile ("mfspr %0, 0x3da" : "=r" ((tcr)));               /* TCR */
-    tcr = (tcr & ~0x04400000) | (auto_restart ? 0x04400000 : 0x04000000);
-    asm volatile ("mtspr 0x3da, %0" : "=r" ((tcr)) : "0" ((tcr))); /* TCR */
-}
-
-
-
-void Install_clock(ppc_exc_handler_t clock_isr)
-{
-#ifdef ppc403
-   uint32_t   pvr;
-#endif /* ppc403 */
-
-   Clock_driver_ticks = 0;
-
-   /*
-    * initialize the interval here
-    * First tick is set to right amount of time in the future
-    * Future ticks will be incremented over last value set
-    * in order to provide consistent clicks in the face of
-    * interrupt overhead
-    */
-
-   ppc_exc_set_handler( BSP_PPC403_CLOCK_HOOK_EXCEPTION, clock_isr );
-   ClockOn();
-
-   atexit(Clock_exit);
-}
-
-void
-ReInstall_clock(ppc_exc_handler_t clock_isr)
-{
-  uint32_t   isrlevel = 0;
-
-  rtems_interrupt_disable(isrlevel);
-
-   ppc_exc_set_handler( BSP_PPC403_CLOCK_HOOK_EXCEPTION, clock_isr );
-   ClockOn();
-
-  rtems_interrupt_enable(isrlevel);
-}
-
-
-/*
- * Called via atexit()
- * Remove the clock interrupt handler by setting handler to NULL
- *
- * This will not work on the 405GP because
- * when bit's are set in TCR they can only be unset by a reset
- */
-
-void Clock_exit(void)
-{
-  ClockOff();
-  ppc_exc_set_handler( BSP_PPC403_CLOCK_HOOK_EXCEPTION, 0 );
-}
-
-rtems_device_driver Clock_initialize(
-  rtems_device_major_number major,
-  rtems_device_minor_number minor,
-  void *pargp
-)
-{
-  Install_clock( Clock_isr );
-
-  /*
-   * make major/minor avail to others such as shared memory driver
-   */
-
-  rtems_clock_major = major;
-  rtems_clock_minor = minor;
-
-  return RTEMS_SUCCESSFUL;
-}

deleted file c/src/lib/libbsp/powerpc/virtex4/include/.svn/entries

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deleted file c/src/lib/libbsp/powerpc/virtex4/include/.svn/prop-base/bsp.h.svn-base

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-END

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deleted file c/src/lib/libbsp/powerpc/virtex4/include/.svn/text-base/bsp.h.svn-base

@@ -1 @@
-/*  bsp.h
- *
- *  This include file contains all GEN405 board IO definitions.
- *
- * derived from helas403/include/bsp.h:
- *  Id: bsp.h,v 1.4 2001/06/18 17:01:48 joel Exp
- *  Author:     Thomas Doerfler <td@imd.m.isar.de>
- *              IMD Ingenieurbuero fuer Microcomputertechnik
- *
- *  COPYRIGHT (c) 1998 by IMD
- *
- *  Changes from IMD are covered by the original distributions terms.
- *  This file has been derived from the papyrus BSP.
- *
- *  Author:     Andrew Bray <andy@i-cubed.co.uk>
- *
- *  COPYRIGHT (c) 1995 by i-cubed ltd.
- *
- *  To anyone who acknowledges that this file is provided "AS IS"
- *  without any express or implied warranty:
- *      permission to use, copy, modify, and distribute this file
- *      for any purpose is hereby granted without fee, provided that
- *      the above copyright notice and this notice appears in all
- *      copies, and that the name of i-cubed limited not be used in
- *      advertising or publicity pertaining to distribution of the
- *      software without specific, written prior permission.
- *      i-cubed limited makes no representations about the suitability
- *      of this software for any purpose.
- *
- *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/include/bsp.h
- *
- *  COPYRIGHT (c) 1989-1999.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
- *
- *  $Id$
- *
- */
-
-#ifndef _BSP_H
-#define _BSP_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <bspopts.h>
-
-/*
- *  confdefs.h overrides for this BSP:
- *   - number of termios serial ports (defaults to none)
- *   - Interrupt stack space is not minimum if defined.
- */
-
-/* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */
-#define CONFIGURE_INTERRUPT_STACK_MEMORY  (16 * 1024)
-
-#define BSP_PPC403_CLOCK_HOOK_EXCEPTION ASM_BOOKE_DEC_VECTOR
-
-/* Keep libcpu/ppc403/console/console405.c happy */
-
-#define PPC_IRQ_EXT_UART0 0
-#define PPC_IRQ_EXT_UART1 0
-
-#ifdef ASM
-/* Definition of where to store registers in alignment handler */
-#define ALIGN_REGS 0x0140
-
-#else
-#include <rtems.h>
-#include <rtems/console.h>
-#include <rtems/clockdrv.h>
-#include <rtems/console.h>
-#include <rtems/iosupp.h>
-
-/* Constants */
-
-#define RAM_START 0
-#define RAM_END   0x00800000
-
-/* miscellaneous stuff assumed to exist */
-extern bool bsp_timer_internal_clock;   /* TRUE, when timer runs with CPU clk */
-
-extern rtems_configuration_table BSP_Configuration;     /* owned by BSP */
-
-/* functions */
-
-rtems_isr_entry set_vector(                     /* returns old vector */
-  rtems_isr_entry     handler,                  /* isr routine        */
-  rtems_vector_number vector,                   /* vector number      */
-  int                 type                      /* RTEMS or RAW intr  */
-);
-#endif /* ASM */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

deleted file c/src/lib/libbsp/powerpc/virtex4/include/.svn/text-base/bspopts.h.in.svn-base

@@ -1 @@
-/* include/bspopts.h.in.  Generated from configure.ac by autoheader.  */
-
-/* If defined, then the BSP Framework will put a non-zero pattern into the
-   RTEMS Workspace and C program heap. This should assist in finding code that
-   assumes memory starts set to zero. */
-#undef BSP_DIRTY_MEMORY
-
-/* If defined, print a message and wait until pressed before resetting board
-   when application exits. */
-#undef BSP_PRESS_KEY_FOR_RESET
-
-/* If defined, reset the board when the application exits. */
-#undef BSP_RESET_BOARD_AT_EXIT
-
-/* Define to the address where bug reports for this package should be sent. */
-#undef PACKAGE_BUGREPORT
-
-/* Define to the full name of this package. */
-#undef PACKAGE_NAME
-
-/* Define to the full name and version of this package. */
-#undef PACKAGE_STRING
-
-/* Define to the one symbol short name of this package. */
-#undef PACKAGE_TARNAME
-
-/* Define to the home page for this package. */
-#undef PACKAGE_URL
-
-/* Define to the version of this package. */
-#undef PACKAGE_VERSION
-
-/* If defined, then the PowerPC specific code in RTEMS will use some of the
-   special purpose registers to slightly optimize interrupt response time. The
-   use of these registers can conflict with other tools like debuggers. */
-#undef PPC_USE_SPRG
-
-/* This defines the base address of the exception table. NOTE: Vectors are
-   actually at 0xFFF00000 but file starts at offset. */
-#undef PPC_VECTOR_FILE_BASE

deleted file c/src/lib/libbsp/powerpc/virtex4/include/.svn/text-base/coverhd.h.svn-base

@@ -1 @@
-/*  coverhd.h
- *
- *  This include file has defines to represent the overhead associated
- *  with calling a particular directive from C.  These are used in the
- *  Timing Test Suite to ignore the overhead required to pass arguments
- *  to directives.  On some CPUs and/or target boards, this overhead
- *  is significant and makes it difficult to distinguish internal
- *  RTEMS execution time from that used to call the directive.
- *  This file should be updated after running the C overhead timing
- *  test.  Once this update has been performed, the RTEMS Time Test
- *  Suite should be rebuilt to account for these overhead times in the
- *  timing results.
- *
- *  NOTE:  If these are all zero, then the times reported include
- *         all calling overhead including passing of arguments.
- *
- *  COPYRIGHT (c) 1989-1999.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
- *
- *  $Id$
- */
-
-/*
- *  Updated for a 25MHz Papyrus by Andrew Bray <andy@i-cubed.co.uk>
- *
- *  Units are 100ns.
- *
- *  These numbers are of questionable use, as they are developed by calling
- *  the routine many times, thus getting its entry veneer into the (small)
- *  cache on the 403GA.  This in general is not true of the RTEMS timing
- *  tests, which usually call a routine only once, thus having no cache loaded
- *  advantage.
- *
- *  Whether the directive times are useful after deducting the function call
- *  overhead is also questionable.  The user is more interested generally
- *  in the total cost of a directive, not the cost if the procedure call
- *  is inlined!  (In general this is not true).
- *
- *  Andrew Bray 18/08/1995
- *
- */
-
-#ifndef __COVERHD_h
-#define __COVERHD_h
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE      1
-#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE        1
-#define CALLING_OVERHEAD_TASK_CREATE               3
-#define CALLING_OVERHEAD_TASK_IDENT                1
-#define CALLING_OVERHEAD_TASK_START                1
-#define CALLING_OVERHEAD_TASK_RESTART              1
-#define CALLING_OVERHEAD_TASK_DELETE               1
-#define CALLING_OVERHEAD_TASK_SUSPEND              1
-#define CALLING_OVERHEAD_TASK_RESUME               1
-#define CALLING_OVERHEAD_TASK_SET_PRIORITY         1
-#define CALLING_OVERHEAD_TASK_MODE                 1
-#define CALLING_OVERHEAD_TASK_GET_NOTE             1
-#define CALLING_OVERHEAD_TASK_SET_NOTE             1
-#define CALLING_OVERHEAD_TASK_WAKE_WHEN            4
-#define CALLING_OVERHEAD_TASK_WAKE_AFTER           1
-#define CALLING_OVERHEAD_INTERRUPT_CATCH           1
-#define CALLING_OVERHEAD_CLOCK_GET                 4
-#define CALLING_OVERHEAD_CLOCK_SET                 3
-#define CALLING_OVERHEAD_CLOCK_TICK                1
-
-#define CALLING_OVERHEAD_TIMER_CREATE              1
-#define CALLING_OVERHEAD_TIMER_IDENT               1
-#define CALLING_OVERHEAD_TIMER_DELETE              1
-#define CALLING_OVERHEAD_TIMER_FIRE_AFTER          2
-#define CALLING_OVERHEAD_TIMER_FIRE_WHEN           5
-#define CALLING_OVERHEAD_TIMER_RESET               1
-#define CALLING_OVERHEAD_TIMER_CANCEL              1
-#define CALLING_OVERHEAD_SEMAPHORE_CREATE          2
-#define CALLING_OVERHEAD_SEMAPHORE_IDENT           1
-#define CALLING_OVERHEAD_SEMAPHORE_DELETE          1
-#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN          1
-#define CALLING_OVERHEAD_SEMAPHORE_RELEASE         1
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE      2
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT       1
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE      1
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND        1
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT      1
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST   1
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE     2
-#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH       1
-
-#define CALLING_OVERHEAD_EVENT_SEND                1
-#define CALLING_OVERHEAD_EVENT_RECEIVE             2
-#define CALLING_OVERHEAD_SIGNAL_CATCH              1
-#define CALLING_OVERHEAD_SIGNAL_SEND               1
-#define CALLING_OVERHEAD_PARTITION_CREATE          3
-#define CALLING_OVERHEAD_PARTITION_IDENT           1
-#define CALLING_OVERHEAD_PARTITION_DELETE          1
-#define CALLING_OVERHEAD_PARTITION_GET_BUFFER      1
-#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER   1
-#define CALLING_OVERHEAD_REGION_CREATE             3
-#define CALLING_OVERHEAD_REGION_IDENT              1
-#define CALLING_OVERHEAD_REGION_DELETE             1
-#define CALLING_OVERHEAD_REGION_GET_SEGMENT        2
-#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT     1
-#define CALLING_OVERHEAD_PORT_CREATE               2
-#define CALLING_OVERHEAD_PORT_IDENT                1
-#define CALLING_OVERHEAD_PORT_DELETE               1
-#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 1
-#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 2
-
-#define CALLING_OVERHEAD_IO_INITIALIZE             2
-#define CALLING_OVERHEAD_IO_OPEN                   2
-#define CALLING_OVERHEAD_IO_CLOSE                  2
-#define CALLING_OVERHEAD_IO_READ                   2
-#define CALLING_OVERHEAD_IO_WRITE                  2
-#define CALLING_OVERHEAD_IO_CONTROL                2
-#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED      1
-#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE     1
-#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT      1
-#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE     1
-#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL     1
-#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD     1
-#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE  1
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif

deleted file c/src/lib/libbsp/powerpc/virtex4/include/.svn/text-base/irq.h.svn-base

@@ -1 @@
-#ifndef VIRTEX4_RTEMSBSP_IRQ_H
-#define VIRTEX4_RTEMSBSP_IRQ_H
-
-#warning "virtex4 BSP's <bsp/irq.h> is BOGUS; this BSP implements no interrupt handling\nheader exists to let everything compile\n"
-
-#define BSP_SHARED_HANDLER_SUPPORT 1
-
-#include <rtems/irq.h>
-
-#endif

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-10
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-virtex4.cfg
-file
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deleted file c/src/lib/libbsp/powerpc/virtex4/make/custom/.svn/text-base/virtex4.cfg.svn-base

@@ -1 @@
-include $(RTEMS_ROOT)/make/custom/default.cfg
-
-RTEMS_CPU=powerpc
-RTEMS_CPU_MODEL=ppc405
-
-#  This contains the compiler options necessary to select the CPU model
-#  and (hopefully) optimize for it.
-#
-CPU_CFLAGS = -mcpu=405 -Dppc405
-
-# optimize flag: typically -O2
-CFLAGS_OPTIMIZE_V = -O2 -g -fno-keep-inline-functions
-
-# Miscellaneous additions go here
-define bsp-post-link
-        $(default-bsp-post-link)
-        $(OBJCOPY) -O srec $(basename $@).exe $(basename $@)$(DOWNEXT)
-endef
-

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deleted file c/src/lib/libbsp/powerpc/virtex4/startup/.svn/text-base/bspclean.c.svn-base

@@ -1 @@
-/*  bsp_cleanup()
- *
- *  This routine normally is part of start.s and usually returns
- *  control to a monitor.
- *
- *  INPUT:  NONE
- *
- *  OUTPUT: NONE
- *
- *  Author:     Andrew Bray <andy@i-cubed.co.uk>
- *
- *  COPYRIGHT (c) 1995 by i-cubed ltd.
- *
- *  To anyone who acknowledges that this file is provided "AS IS"
- *  without any express or implied warranty:
- *      permission to use, copy, modify, and distribute this file
- *      for any purpose is hereby granted without fee, provided that
- *      the above copyright notice and this notice appears in all
- *      copies, and that the name of i-cubed limited not be used in
- *      advertising or publicity pertaining to distribution of the
- *      software without specific, written prior permission.
- *      i-cubed limited makes no representations about the suitability
- *      of this software for any purpose.
- *
- *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspclean.c:
- *
- *  COPYRIGHT (c) 1989-1999.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  The license and distribution terms for this file may be
- *  found in the file LICENSE in this distribution or at
- *  http://www.rtems.com/license/LICENSE.
- *
- *  $Id$
- */
-
-#include <rtems.h>
-#include <bsp.h>
-
-static void __app_noopfun(void) {}
-
-void app_bsp_cleanup(void)
-__attribute__(( weak, alias("__app_noopfun") ));
-
-void bsp_cleanup( void )
-{
-  app_bsp_cleanup();
-  /*  rtems_fatal_error_occurred(0); */
-}

deleted file c/src/lib/libbsp/powerpc/virtex4/startup/.svn/text-base/bspstart.c.svn-base

@@ -1 @@
-/*  bsp_start()
- *
- *  This routine starts the application.  It includes application,
- *  board, and monitor specific initialization and configuration.
- *  The generic CPU dependent initialization has been performed
- *  before this routine is invoked.
- *
- *  INPUT:  NONE
- *
- *  OUTPUT: NONE
- *
- *  Author:     Thomas Doerfler <td@imd.m.isar.de>
- *              IMD Ingenieurbuero fuer Microcomputertechnik
- *
- *  COPYRIGHT (c) 1998 by IMD
- *
- *  Changes from IMD are covered by the original distributions terms.
- *  This file has been derived from the papyrus BSP:
- *
- *  Author:     Andrew Bray <andy@i-cubed.co.uk>
- *
- *  COPYRIGHT (c) 1995 by i-cubed ltd.
- *
- *  To anyone who acknowledges that this file is provided "AS IS"
- *  without any express or implied warranty:
- *      permission to use, copy, modify, and distribute this file
- *      for any purpose is hereby granted without fee, provided that
- *      the above copyright notice and this notice appears in all
- *      copies, and that the name of i-cubed limited not be used in
- *      advertising or publicity pertaining to distribution of the
- *      software without specific, written prior permission.
- *      i-cubed limited makes no representations about the suitability
- *      of this software for any purpose.
- *
- *  Modifications for spooling console driver and control of memory layout
- *  with linker command file by
- *              Thomas Doerfler <td@imd.m.isar.de>
- *  for these modifications:
- *  COPYRIGHT (c) 1997 by IMD, Puchheim, Germany.
- *
- *  To anyone who acknowledges that this file is provided "AS IS"
- *  without any express or implied warranty:
- *      permission to use, copy, modify, and distribute this file
- *      for any purpose is hereby granted without fee, provided that
- *      the above copyright notice and this notice appears in all
- *      copies. IMD makes no representations about the suitability
- *      of this software for any purpose.
- *
- *  Derived from c/src/lib/libbsp/no_cpu/no_bsp/startup/bspstart.c:
- *
- *  COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994.
- *  On-Line Applications Research Corporation (OAR).
- *
- *  Modifications for PPC405GP by Dennis Ehlin
- *  Modifications for Virtex4 by Richard Claus <claus@slac.stanford.edu>
- *
- *  $Id$
- */
-
-#include <string.h>
-#include <fcntl.h>
-
-#include <bsp.h>
-#include <rtems/libio.h>
-#include <rtems/libcsupport.h>
-#include <rtems/bspIo.h>
-#include <bsp/vectors.h>
-#include <libcpu/spr.h>
-#include <libcpu/cpuIdent.h>
-
-#define DO_DOWN_ALIGN(x,a) ((x) & ~((a)-1))
-
-#define DO_UP_ALIGN(x,a)   DO_DOWN_ALIGN(((x) + (a) - 1 ),a)
-
-#define CPU_DOWN_ALIGN(x)  DO_DOWN_ALIGN(x, CPU_ALIGNMENT)
-#define CPU_UP_ALIGN(x)    DO_UP_ALIGN(x, CPU_ALIGNMENT)
-
-
-/* Expected by clock.c */
-uint32_t    bsp_clicks_per_usec;
-bool        bsp_timer_internal_clock;   /* true, when timer runs with CPU clk */
-uint32_t    bsp_timer_least_valid;
-uint32_t    bsp_timer_average_overhead;
-
-
-/* Provide weak aliases so that RTEMS distribution builds; the
- * generated executables are bogus, however...
- */
-static void __app_noopfun(void) {}
-
-void app_bsp_start(void)
-__attribute__(( weak, alias("__app_noopfun") ));
-
-void app_bsp_pretasking_hook(void)
-__attribute__(( weak, alias("__app_noopfun") ));
-
-void app_bsp_predriver_hook(void)
-__attribute__(( weak, alias("__app_noopfun") ));
-
-
-LINKER_SYMBOL(__bsp_ram_start);
-LINKER_SYMBOL(__bsp_ram_end);
-LINKER_SYMBOL(WorkAreaBase);
-LINKER_SYMBOL(MsgAreaBase);
-LINKER_SYMBOL(MsgAreaSize);
-
-static char* bspMsgBuffer = (char*)MsgAreaBase;
-
-static void __bsp_outchar_to_memory(char c)
-{
-  static char* msgBuffer = (char*)MsgAreaBase;
-  *msgBuffer++ = c;
-  if (msgBuffer >= &bspMsgBuffer[(int)MsgAreaSize])  msgBuffer = bspMsgBuffer;
-  *msgBuffer   = 0x00;                /* Overwrite next location to show EOM */
-}
-
-
-void BSP_ask_for_reset(void)
-{
-  printk("\nSystem stopped, press RESET");
-  for(;;);
-  /*__asm__ __volatile ("sc");*/
-}
-
-
-void BSP_panic(char *s)
-{
-  printk("\n%s PANIC %s\n", _RTEMS_version, s);
-  BSP_ask_for_reset();
-}
-
-
-void _BSP_Fatal_error(unsigned int v)
-{
-  printk("\n%s FATAL ERROR %x\n", _RTEMS_version, v);
-  BSP_ask_for_reset();
-}
-
-
-/*===================================================================*/
-
-/*
- *  BSP start routine.  Called by boot_card().
- *
- *  This routine does the bulk of the system initialization.
- */
-void bsp_start(void)
-{
-  rtems_status_code  sc = RTEMS_SUCCESSFUL;
-  uintptr_t          intrStackStart;
-  uintptr_t          intrStackSize;
-  ppc_cpu_id_t       myCpu;
-  ppc_cpu_revision_t myCpuRevision;
-
-  /* Set the character output function;  The application may override this */
-  BSP_output_char = __bsp_outchar_to_memory;
-
-  /*
-   * Get CPU identification dynamically. Note that the get_ppc_cpu_type()
-   * function stores the result in global variables
-   * so that it can be used later...
-   */
-  myCpu         = get_ppc_cpu_type();
-  myCpuRevision = get_ppc_cpu_revision();
-  printk("CPU: 0x%04x,  Revision: 0x%04x = %d,  Name: %s\n",
-         myCpu, myCpuRevision, myCpuRevision, get_ppc_cpu_type_name(myCpu));
-
-  /*
-   *  Initialize the device driver parameters
-   */
-
-  /* Timebase register ticks/microsecond;  The application may override these */
-  bsp_clicks_per_usec        = 350;
-  bsp_timer_internal_clock   = true;
-  bsp_timer_average_overhead = 2;
-  bsp_timer_least_valid      = 3;
-
-  /*
-   * Initialize the interrupt related settings.
-   */
-  intrStackStart = CPU_UP_ALIGN((uint32_t)__bsp_ram_start);
-  intrStackSize  = rtems_configuration_get_interrupt_stack_size();
-
-  /*
-   * Initialize default raw exception handlers.
-   */
-  sc = ppc_exc_initialize(PPC_INTERRUPT_DISABLE_MASK_DEFAULT,
-                          intrStackStart,
-                          intrStackSize);
-  if (sc != RTEMS_SUCCESSFUL)  BSP_panic("Cannot initialize exceptions");
-
-  /* Continue with application-specific initialization */
-  app_bsp_start();
-}
-
-
-/*
- *  BSP pretasking hook.  Called just before drivers are initialized.
- *  Used to setup libc and install any BSP extensions.
- *
- *  Must not use libc (to do io) from here, since drivers are not yet
- *  initialized.
- */
-
-void bsp_pretasking_hook(void)
-{
-  app_bsp_pretasking_hook();
-}
-
-
-/*
- *  BSP predriver hook.  Called by boot_card() just before drivers are
- *  initialized.  Clear out any stale interrupts here.
- */
-void bsp_predriver_hook(void)
-{
-  app_bsp_predriver_hook();
-}

deleted file c/src/lib/libbsp/powerpc/virtex4/startup/.svn/text-base/dummy_console.c.svn-base

@@ -1 @@
-#include <rtems.h>
-#include <rtems/libio.h>
-
-static ssize_t __app_noopfun(int minor, const char* buf, size_t len) {return 0;}
-
-ssize_t app_memory_write(int minor, const char* buf, size_t len)
-__attribute__(( weak, alias("__app_noopfun") ));
-
-static rtems_termios_callbacks gMemCallbacks = {
-        0,                /* firstOpen */
-        0,                /* lastClose */
-        0,                /* PollRead */
-        app_memory_write, /* write */
-        0,                /* SetAttr */
-        0,                /* stopRemoteTx */
-        0,                /* startRemoteTx */
-        0                 /* outputUsesInterrupts */
-};
-
-rtems_device_driver console_initialize(rtems_device_major_number major,
-                                       rtems_device_minor_number minor,
-                                       void*                     arg)
-{
-  rtems_status_code status;
-
-  rtems_termios_initialize();
-
-  status = rtems_io_register_name("/dev/console", major, 0);
-
-  if (status != RTEMS_SUCCESSFUL)  rtems_fatal_error_occurred (status);
-  return RTEMS_SUCCESSFUL;
-}
-
-rtems_device_driver console_open(rtems_device_major_number major,
-                                 rtems_device_minor_number minor,
-                                 void*                     arg)
-{
-  rtems_status_code sc;
-
-  sc = rtems_termios_open (major, minor, arg, &gMemCallbacks);
-
-  return sc;
-}
-
-rtems_device_driver console_close(rtems_device_major_number major,
-                                  rtems_device_minor_number minor,
-                                  void*                     arg)
-{
-  return rtems_termios_close(arg);
-}
-
-rtems_device_driver console_read(rtems_device_major_number major,
-                                 rtems_device_minor_number minor,
-                                 void*                     arg)
-{
-  return rtems_termios_read(arg);
-}
-
-rtems_device_driver console_write(rtems_device_major_number major,
-                                  rtems_device_minor_number minor,
-                                  void*                     arg)
-{
-  return rtems_termios_write(arg);
-}
-
-rtems_device_driver console_control(rtems_device_major_number major,
-                                    rtems_device_minor_number minor,
-                                    void*                     arg)
-{
-  return rtems_termios_ioctl(arg);
-}

deleted file c/src/lib/libbsp/powerpc/virtex4/startup/.svn/text-base/linkcmds.svn-base

@@ -1 @@
-/*
- *  This file contains directives for the GNU linker which are specific to the
- *  Virtex 4 PPC 405.  No assumptions are made on the firmware in the FPGA.
- *  This file is intended to be used together with start.S to generate
- *  downloadable code.
- */
-
-OUTPUT_FORMAT("elf32-powerpc", "elf32-powerpc", "elf32-powerpc")
-OUTPUT_ARCH(powerpc)
-
-ENTRY(download_entry)
-
-MsgAreaSize       = DEFINED(MsgAreaSize)   ? MsgAreaSize   : 1K;
-RamBase           = DEFINED(RamBase)       ? RamBase       : 0x0;
-RamSize           = DEFINED(RamSize)       ? RamSize       : 128M - MsgAreaSize;
-IntrStackSize     = DEFINED(IntrStackSize) ? IntrStackSize : 16K;
-StackSize         = DEFINED(StackSize)     ? StackSize     : 64K;
-HeapSize          = DEFINED(HeapSize)      ? HeapSize      : 0; /* 0=Use def */
-
-
-MEMORY
-{
-  VECTORS         : ORIGIN = 0x00000000, LENGTH = 8K
-  RAM             : ORIGIN = 0x00002000, LENGTH = 128M - 8K
-}
-
-
-SECTIONS
-{
-  __exeentry      = download_entry;
-  __exestart      = 0x100;
-  .vectors __exestart : { *(.vectors)                           } > VECTORS
-
-  /* Read-only sections, merged into text segment: */
-  .interp         : { *(.interp)                                } > RAM
-  .hash           : { *(.hash)                                  } > RAM
-  .dynsym         : { *(.dynsym)                                } > RAM
-  .dynstr         : { *(.dynstr)                                } > RAM
-  .gnu.version    : { *(.gnu.version)                           } > RAM
-  .gnu.version_d  : { *(.gnu.version_d)                         } > RAM
-  .gnu.version_r  : { *(.gnu.version_r)                         } > RAM
-  .rela.text      : { *(.rela.text) *(.rela.gnu.linkonce.t*)    } > RAM
-  .rela.data      : { *(.rela.data) *(.rela.gnu.linkonce.d*)    } > RAM
-  .rela.rodata    : { *(.rela.rodata*) *(.rela.gnu.linkonce.r*) } > RAM
-  .rela.got       : { *(.rela.got)                              } > RAM
-  .rela.got1      : { *(.rela.got1)                             } > RAM
-  .rela.got2      : { *(.rela.got2)                             } > RAM
-  .rela.ctors     : { *(.rela.ctors)                            } > RAM
-  .rela.dtors     : { *(.rela.dtors)                            } > RAM
-  .rela.init      : { *(.rela.init)                             } > RAM
-  .rela.fini      : { *(.rela.fini)                             } > RAM
-  .rela.bss       : { *(.rela.bss)                              } > RAM
-  .rela.plt       : { *(.rela.plt)                              } > RAM
-  .rela.sdata     : { *(.rela.sdata)                            } > RAM
-  .rela.sbss      : { *(.rela.sbss)                             } > RAM
-  .rela.sdata2    : { *(.rela.sdata2)                           } > RAM
-  .rela.sbss2     : { *(.rela.sbss2)                            } > RAM
-  .rela.dyn       : { *(.rela.dyn)                              } > RAM
-
-  /* Initialization code */
-  .init           : { PROVIDE (_init = .);
-                      *ecrti.o(.init)
-                      KEEP(*(.init))
-                      *ecrtn.o(.init)
-                    } > RAM
-
-  .text           : { *(.entry)
-                      *(.text)
-                      *(.text.*)
-
-                      /* Special FreeBSD sysctl sections */
-                      . = ALIGN (16);
-                      __start_set_sysctl_set = .;
-                      *(set_sysctl_*);
-                      __stop_set_sysctl_set = ABSOLUTE(.);
-                      *(set_domain_*);
-                      *(set_pseudo_*);
-
-                      /* .gnu.warning sections are handled specially by elf32.em
-                       */
-                      *(.gnu.warning)
-                      *(.gnu.linkonce.t*)
-                    } > RAM
-
-  /* Finalization code */
-  .fini           : { PROVIDE (_fini = .);
-                      *ecrti.o(.fini)
-                      KEEP(*(.fini))
-                      *ecrtn.o(.fini)
-                    } > RAM
-
-  /* Miscellaneous read-only data */
-  .rodata         : { *(.rodata.* .gnu.linkonce.r*)                    } > RAM
-  .rodata1        : { *(.rodata1)                                      } > RAM
-
-  /* Initialised small data addressed as offsets from r2 */
-_SDA2_BASE_ = __SDATA2_START__ + 0x8000;
-  .sdata2         : { *(.sdata2 .sdata2.* .gnu.linkonce.s2.*)          } > RAM
-
-  /* Zeroed small data addressed as offsets from r2 */
-  .sbss2          : { *(.sbss2 .sbss2.* .gnu.linkonce.sb2.*)
-
-                      /* Avoid empty sdata2/sbss2 area: __eabi would not set up
-                       * r2 which may be important if run-time loading is used
-                       */
-                      . += 1;
-
-                      PROVIDE (__SBSS2_END__ = .);
-                    } > RAM
-
-  /* Exception frame info */
-  .eh_frame       : { *(.eh_frame .eh_frame.*)                         } > RAM
-  .eh_frame_hdr   : { *(.eh_frame_hdr)                                 } > RAM
-
-  /*  Declares where the .text section ends */
-  _etext          = .;
-  PROVIDE (etext  = .);
-
-  /* Initialized R/W Data section goes in RAM */
-  .data           : { PROVIDE(__DATA_START__ = ABSOLUTE(.) );
-                      *(.data)
-                      *(.data.*)
-                      *(.gnu.linkonce.d*)
-                    } > RAM
-
-  .data1          : { *(.data1)                                        } > RAM
-
-                        PROVIDE (__EXCEPT_START__ = .);
-  .gcc_except_table : { *(.gcc_except_table .gcc_except_table.*)       } > RAM
-                        PROVIDE (__EXCEPT_END__ = .);
-
-  .got1           : { *(.got1)                                         } > RAM
-
-  /* Put .ctors and .dtors next to the .got2 section, so that the pointers
-   * get relocated with -mrelocatable. Also put in the .fixup pointers.
-   * The current compiler no longer needs this, but keep it around for 2.7.2.
-   */
-                      PROVIDE (_GOT2_START_ = .);
-  .got2           : { *(.got2)                                         } > RAM
-
-  .dynamic        : { *(.dynamic)                                      } > RAM
-
-  .ctors          : { /* gcc uses crtbegin.o to find the start of
-                       * the constructors, so we make sure it is
-                       * first.  Because this is a wildcard, it
-                       * doesn't matter if the user does not
-                       * actually link against crtbegin.o; the
-                       * linker won't look for a file to match a
-                       * wildcard.  The wildcard also means that it
-                       * doesn't matter which directory crtbegin.o
-                       * is in.
-                       */
-                      KEEP (*crtbegin.o(.ctors))
-                      /* We don't want to include the .ctor section from
-                       * the crtend.o file until after the sorted ctors.
-                       * The .ctor section from the crtend file contains the
-                       * end of ctors marker and it must be last.
-                       */
-                      KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
-                      KEEP (*(SORT(.ctors.*)))
-                      KEEP (*(.ctors))
-                    } > RAM
-
-  .dtors          : { KEEP (*crtbegin.o(.dtors))
-                      KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
-                      KEEP (*(SORT(.dtors.*)))
-                      KEEP (*(.dtors))
-                    } > RAM
-
-                      PROVIDE (_FIXUP_START_ = .);
-  .fixup          : { *(.fixup)                                        } > RAM
-                      PROVIDE (_FIXUP_END_ = .);
-
-                      PROVIDE (_GOT2_END_ = .);
-
-                      PROVIDE (_GOT_START_ = .);
-  .got            : { __got_start = .;
-                      *(.got)
-                    } > RAM
-
-  .got.plt        : { *(.got.plt)                                      } > RAM
-                      PROVIDE (_GOT_END_ = .);
-
-  .jcr            : { KEEP (*(.jcr))                                   } > RAM
-
-  /* We want the small data sections together, so single-instruction offsets
-   * can access them all, and initialized data all before uninitialized, so
-   * we can shorten the on-disk segment size.
-   */
-  /* Initialised small data addressed as offsets from r13 */
-_SDA_BASE_ = __SDATA_START__ + 0x8000;
-  .sdata          : { *(.sdata* .gnu.linkonce.s.*)                     } > RAM
-
-  _edata          = .;
-  PROVIDE (edata  = .);
-
-  /* Zeroed small data addressed as offsets from r13 */
-  .sbss           : { PROVIDE (__sbss_start = .);
-                      *(.dynsbss)
-                      *(.sbss*)
-                      *(.gnu.linkonce.sb.*)
-                      *(.scommon)
-
-                      /* Avoid empty sdata/sbss area: __eabi would not set up
-                       * r13, which may be important if run-time loading is used
-                       */
-                      . += 1;
-
-                      PROVIDE (__SBSS_END__ = .);
-                      PROVIDE (__sbss_end   = .);
-                    } > RAM
-
-  .plt            : { *(.plt)                                          } > RAM
-  .iplt           : { *(.iplt)                                         } > RAM
-
-  /* Zeroed large data */
-  .bss            : { PROVIDE (__bss_start = .);
-                      *(.dynbss)
-                      *(.bss)
-                      *(.bss.*)
-                      *(.gnu.linkonce.b*)
-                      *(COMMON)
-
-                      PROVIDE (__bss_end = ALIGN(4));
-                      __bss_size = __bss_end - __bss_start;
-                    } > RAM
-
-  __exeend        = ALIGN(4);
-  __rtems_end     = .;
-  .               = ALIGN(0x10);        /* Align to a cache-line boundary */
-  PROVIDE(__bsp_ram_start = .);
-
-  /* Interrupt stack: aligned on a cache-line boundary */
-  .              += IntrStackSize;
-  __intrStack     = .;
-
-  /* Main stack lives here */
-  _stack          = ALIGN(0x10);        /* Align to a cache-line boundary */
-  .              += StackSize;
-  __stack_base    = .;                  /* Initial stack builds downwards */
-
-  /* RTEMS workspace: size specified by application */
-  WorkAreaBase    = ALIGN(0x10);        /* Align to a cache-line boundary */
-
-  /* The heap comes after the work space */
-
-   .              = RamBase + RamSize - MsgAreaSize;
-  PROVIDE(__bsp_ram_end = .);
-
-  /* Message area for capturing early printk output */
-  /* Placed here to be easily findable with a debugger */
-  MsgAreaBase     = __bsp_ram_end;
-  .              += MsgAreaSize;
-
-  __phy_ram_end   = .;                  /* True end of physical memory */
-
-  /DISCARD/ :
-  {
-    *(.comment)
-  }
-
-  /* Some configuration constants: Not clear why they're placed here */
-  __dccr          = 0x80000000;
-  __iccr          = 0x80000000;
-  __sgr           = 0x7fffffff;
-  __vectors       = 0;
-}

deleted file c/src/lib/libbsp/powerpc/virtex4/startup/.svn/text-base/start.S.svn-base

@@ -1 @@
-/*!@file      start.S
-*
-*  @brief     Initialization code to set up the CPU and call boot_card()
-*
-*  This "BSP" targets the Xilinx Virtex XC4VFX60 and related parts.  This
-*  BSP makes no assumptions on what firmware is loaded into the FPGA.
-*
-*  Provides the .entry section code. This is the first code to run in
-*  the PPC after download to RAM.   Excecution in this case starts at
-*  'download_entry'.
-*
-*  The entrypoint 'start' is provided for the case where a bootloader has
-*  initialized the CPU, and all that remains to do is to set up a C
-*  environment and call boot_card.
-*
-*  Derived from virtex dlentry and others.
-*
-*  IBM refers to the version of the processor as PPC405F5.
-*  The processor version register returns 0x20011470.
-*  References:
-*      PowerPC Processor Reference Guide UG011 (v1.3)
-*      http://www.xilinx.com/support/documentation/user_guides/ug011.pdf
-*
-*      PowerPC Block Reference Guide
-*      http://www.xilinx.com/support/documentation/user_guides/ug018.pdf
-*
-*      PowerPC errata
-*      ftp://ftp.xilinx.com/pub/documentation/misc/ppc405f6v5_2_0.pdf
-*
-*      PowerPC 405-S Embedded Processor Core User's Manual (Version 1.2)
-*      https://www-01.ibm.com/chips/techlib/techlib.nsf/products/PowerPC_405_Embedded_Cores
-*
-*  @author    Richard Claus <claus@SLAC.Stanford.edu>
-*
-*  @date      March 4, 2011 -- Created
-*
-*  $Revision$
-*
-*  @verbatim                    Copyright 2011
-*                                      by
-*                         The Board of Trustees of the
-*                       Leland Stanford Junior University.
-*                              All rights reserved.
-*
-*         Work supported by the U.S. Department of Energy under contract
-*       DE-AC03-76SF00515.
-*
-*                               Disclaimer Notice
-*
-*        The items furnished herewith were developed under the sponsorship
-*   of the U.S. Government.  Neither the U.S., nor the U.S. D.O.E., nor the
-*   Leland Stanford Junior University, nor their employees, makes any war-
-*   ranty, express or implied, or assumes any liability or responsibility
-*   for accuracy, completeness or usefulness of any information, apparatus,
-*   product or process disclosed, or represents that its use will not in-
-*   fringe privately-owned rights.  Mention of any product, its manufactur-
-*   er, or suppliers shall not, nor is it intended to, imply approval, dis-
-*   approval, or fitness for any particular use.  The U.S. and the Univer-
-*   sity at all times retain the right to use and disseminate the furnished
-*   items for any purpose whatsoever.                       Notice 91 02 01
-*
-*  @endverbatim
-*/
-
-#include <rtems/asm.h>
-#include <rtems/powerpc/powerpc.h>
-
-/*
- *  The virtex ELF link scripts support some special sections:
- *    .entry    The actual entry point
- *    .vectors  The section containing the interrupt entry veneers.
- */
-
-/*
- *  Downloaded code loads the vectors separately to 0x00000100,
- *  so .entry can be over 256 bytes.
- *
- *  The other sections are linked in the following order:
- *    .entry
- *    .text
- *    .data
- *    .bss
- *  see linker command file for section placement
- *
- *  The initial stack is set to __stack_base.
- *
- */
-
-        .section .entry
-
-        PUBLIC_VAR (download_entry)
-        PUBLIC_VAR (__rtems_entry_point)
-SYM(download_entry):
-SYM(__rtems_entry_point):
-        b       startupDow        /* Entry point used by xmd dow command */
-
-        PUBLIC_VAR (start)
-SYM(start):
-        b       startupBL         /* Entry point used by bootLoader */
-
-base_addr:
-       /*-------------------------------------------------------------------
-        * Parameters from linker
-        *-----------------------------------------------------------------*/
-toc_pointer:
-        .long   __got_start
-bss_length:
-        .long   __bss_size
-bss_addr:
-        .long   __bss_start
-stack_top:
-        .long   __stack_base
-dccr_contents:
-        .long   __dccr
-iccr_contents:
-        .long   __iccr
-sgr_contents:
-        .long   __sgr
-
-       /*-------------------------------------------------------------------
-        * Setup iccr, sgr, msr, cccr0, dcwr, dccr and clear bss
-        *-----------------------------------------------------------------*/
-
-startupDow:
-       /*-------------------------------------------------------------------
-        * Load the parameter table base address
-        *------------------------------------------------------------------*/
-        lis     r1,   base_addr@h
-        ori     r1,r1,base_addr@l
-
-       /* -------------------------------------------------------------------
-        * Clear the Machine State Register's Critical and External
-        * interrupt enables.
-        *------------------------------------------------------------------*/
-        mfmsr   r3
-        lis     r0,   0x00028000@h
-        ori     r0,r0,0x00028000@l
-        andc    r3,r3,r0
-        mtmsr   r3
-        sync
-
-       /* -------------------------------------------------------------------
-        * Initialize the memory system.
-        *------------------------------------------------------------------*/
-        li      r0,0
-
-        /* Set the Storage Guarded Register. */
-        lwz     r2,sgr_contents-base_addr(r1)
-        mtsgr   r2
-
-        /* Configure endianness, compression */
-        lis     r0,0x00000000@h   // Endianess value
-        mtsler  r0
-        lis     r0,0x00000000@h   // Compression value
-        mtsu0r  r0
-
-        /* Invalidate the entire instruction cache. */
-        iccci   r0,r0
-
-        /* Set the Instruction Cache Cacheability Register. */
-        lwz     r2,iccr_contents-base_addr(r1)
-        mticcr  r2
-        isync
-
-       /*-------------------------------------------------------------------
-        * Tell the processor where the exception vector table will be.
-        *------------------------------------------------------------------*/
-        .extern SYM(__vectors)
-        lis     r0, __vectors@h    /* set EVPR exc. vector prefix */
-        mtspr   evpr,r0
-
-       /*-------------------------------------------------------------------
-        * Set up the debug register to freeze timers on debug events.
-        *------------------------------------------------------------------*/
-        mfdbcr0 r0
-        ori     r0,r0,0x0001
-        mtdbcr0 r0
-        isync
-
-        /* Select whether APU, Wait Enable, interrupts/exceptions and address
-           translation should be enabled when application starts */
-        lis     r0,0x00000000@h   /* SRR1 value */
-        mtsrr1  r0                /* Potentially: 0x80000000 >> 6 is APU */
-
-        /* Clear out stale values in certain registers to avoid confusion */
-        mtxer   r0                /* Fixed-point exception register */
-        mtesr   r0                /* Exception syndrome register */
-        mtdear  r0                /* Data exception address register */
-        mtmcsr  r0                /* Machine check syndrome register */
-        mtpit   r0                /* Programmable interval timer */
-        li      r0,-1             /* -1 to clear TSR */
-        mttsr   r0                /* Timer status register */
-
-        /* Invalidate the data cache */
-        li      r2,0              /* Start address */
-        li      r3,0x100          /* Number of cache lines */
-        mtctr   r3                /* Transfer data cache congruence class count to CTR */
-1:      dccci   0,r2              /* Invalidate this congruence class */
-        addi    r2,r2,0x20        /* Point to next congruence class */
-        bdnz    1b                /* Decrement counter and loop whilst not zero */
-
-       /* -------------------------------------------------------------------
-        * Set Core Configuration Register 0 as follows:
-        * sum: 0x02700E00
-        * bit 1 off:   as told by ppc405 errata to avoid CPU_213 ppc bug
-        * bit 3 off:   as told by ppc405 errata to avoid CPU_213 ppc bug
-                       (Note added later: PPC405F6 is not subject to CPU_213.)
-        * bit 1 on:    Xilinx: CR 203746 Patch for PPC405 errata (RiC 12/8/11)
-        * bit 2 on:    Xilinx: CR 203746 Patch for PPC405 errata (RiC 12/8/11)
-        * bit 6 on:    load word as line
-        * bit 7 off:   load  misses allocate cache line
-        * bit 8 off:   store misses allocate cache line
-        * bit 9-11 on: default settings to do with plb priority
-        * bit 20 on:   prefetching for cacheable regions
-        * bit 21 on:   prefetching for non-cacheable regions
-        * bit 22 on:   request size of non-cacheable inst fetches is 8 words
-        * bit 23 off:  fetch misses allocate cache line
-        *------------------------------------------------------------------*/
-        lis     r5,   0x52700E00@h
-        ori     r5,r5,0x52700E00@l
-
-       /* -------------------------------------------------------------------
-        * To change CCR0 we make sure the code writing to it is
-        *  running from the I-cache. This is needed because changing some
-        * CCR0 fields will cause a hang if the processor is trying to
-        * access memory at the same time.
-        *------------------------------------------------------------------*/
-        lis     r4,   2f@h
-        ori     r4,r4,2f@l
-        icbt    r0,r4
-        b       2f
-
-        .align  5 /* New cache line (32 bytes each) */
-2:
-        icbt    r0,r4       /* Put this line into the I-cache. */
-        isync
-        mtccr0  r5
-        isync
-        b       3f
-
-        .align  5
-3:
-        /* Set the Data Cache Write-Through Register for no write-through, i.e., for write-back. */
-        li      r0,0
-        mtdcwr  r0
-
-        /* Set the Data Cache Cacheablility Register. */
-        lwz     r0,dccr_contents-base_addr(r1)
-        mtdccr  r0
-        isync
-
-       /* Fall through */
-
-
-       /* -------------------------------------------------------------------
-        * If a bootloader has run that has already performed some
-        * initialization, which among other things has loaded
-        * this code into memory and jumped to start above, the initialization
-        * above does not need to be done.  Execution thus resumes here.
-        *------------------------------------------------------------------*/
-
-startupBL:
-       /* -------------------------------------------------------------------
-        * Note that some initialization has already been performed by the
-        * bootloader code in Block RAM, which among other things has loaded
-        * this code into memory and jumped to start above.
-        *------------------------------------------------------------------*/
-
-       /*-------------------------------------------------------------------
-        * Load the parameter table base address
-        *------------------------------------------------------------------*/
-        lis     r1,   base_addr@h
-        ori     r1,r1,base_addr@l
-
-       /*-------------------------------------------------------------------
-        * Setup stack for RTEMS and call boot_card(). From this
-        * point forward registers will be used in accordance with the
-        * PowerPC EABI.
-        *
-        * boot_card() supervises the initialization of RTEMS and the C
-        * library.  It calls bsp_start(), bsp_pretasking_hook(), etc.
-        *------------------------------------------------------------------*/
-        lwz     r2,toc_pointer-base_addr(r1)        /* set r2 to toc */
-        lwz     r1,stack_top-base_addr(r1)          /* set r1 to stack_top */
-
-        /* Align as required by ABI */
-        li      r3,PPC_STACK_ALIGNMENT-1
-        andc    r1,r1,r3
-
-       /*-------------------------------------------------------------------
-        * Set up r2 and r13. Upon entry r1 must have a nonzero value
-        *  as it will be stored in an "init done" flag. Stupid but true.
-        *  r1 must also be set up as a stack pointer as __eabi() jumps
-        *  to __init() which has a standard function prolog.
-        *------------------------------------------------------------------*/
-        bl      __eabi
-
-       /*-------------------------------------------------------------------
-        * Zero the .bss, .sbss and .sbss2 sections.
-        * Must have r2 and r13 properly set.
-        *------------------------------------------------------------------*/
-        bl      zero_bss
-
-       /*-------------------------------------------------------------------
-        * Create a minimal stack frame for this code, the caller of boot_card().
-        *------------------------------------------------------------------*/
-        addi    r1,r1, -PPC_MINIMUM_STACK_FRAME_SIZE
-
-        xor     r3,r3,r3
-        stw     r3,0(r1)            /* Terminate the chain of stack frames. */
-        stw     r3,4(r1)
-        stw     r3,8(r1)
-        stw     r3,12(r1)
-        lis     r5,environ@ha
-        la      r5,environ@l(r5)    /* environp */
-
-       /*-------------------------------------------------------------------
-        * Call boot_card() with its arguments, the command-line pointer and
-        * the argument count, set to NULL.
-        *------------------------------------------------------------------*/
-        li      r4,0                /* argv */
-        li      r3,0                /* argc */
-        .extern SYM (boot_card)
-        b       SYM (boot_card)

deleted file c/src/lib/libbsp/powerpc/virtex4/startup/.svn/tmp/start.S.tmp

@@ -1 @@
-/*!@file      start.S
-*
-*  @brief     Initialization code to set up the CPU and call boot_card()
-*
-*  This "BSP" targets the Xilinx Virtex XC4VFX60 and related parts.  This
-*  BSP makes no assumptions on what firmware is loaded into the FPGA.
-*
-*  Provides the .entry section code. This is the first code to run in
-*  the PPC after download to RAM.   Excecution in this case starts at
-*  'download_entry'.
-*
-*  The entrypoint 'start' is provided for the case where a bootloader has
-*  initialized the CPU, and all that remains to do is to set up a C
-*  environment and call boot_card.
-*
-*  Derived from virtex dlentry and others.
-*
-*  IBM refers to the version of the processor as PPC405F5.
-*  The processor version register returns 0x20011470.
-*  References:
-*      PowerPC Processor Reference Guide UG011 (v1.3)
-*      http://www.xilinx.com/support/documentation/user_guides/ug011.pdf
-*
-*      PowerPC Block Reference Guide
-*      http://www.xilinx.com/support/documentation/user_guides/ug018.pdf
-*
-*      PowerPC errata
-*      ftp://ftp.xilinx.com/pub/documentation/misc/ppc405f6v5_2_0.pdf
-*
-*      PowerPC 405-S Embedded Processor Core User's Manual (Version 1.2)
-*      https://www-01.ibm.com/chips/techlib/techlib.nsf/products/PowerPC_405_Embedded_Cores
-*
-*  @author    Richard Claus <claus@SLAC.Stanford.edu>
-*
-*  @date      March 4, 2011 -- Created
-*
-*  $Revision$
-*
-*  @verbatim                    Copyright 2011
-*                                      by
-*                         The Board of Trustees of the
-*                       Leland Stanford Junior University.
-*                              All rights reserved.
-*
-*         Work supported by the U.S. Department of Energy under contract
-*       DE-AC03-76SF00515.
-*
-*                               Disclaimer Notice
-*
-*        The items furnished herewith were developed under the sponsorship
-*   of the U.S. Government.  Neither the U.S., nor the U.S. D.O.E., nor the
-*   Leland Stanford Junior University, nor their employees, makes any war-
-*   ranty, express or implied, or assumes any liability or responsibility
-*   for accuracy, completeness or usefulness of any information, apparatus,
-*   product or process disclosed, or represents that its use will not in-
-*   fringe privately-owned rights.  Mention of any product, its manufactur-
-*   er, or suppliers shall not, nor is it intended to, imply approval, dis-
-*   approval, or fitness for any particular use.  The U.S. and the Univer-
-*   sity at all times retain the right to use and disseminate the furnished
-*   items for any purpose whatsoever.                       Notice 91 02 01
-*
-*  @endverbatim
-*/
-
-#include <rtems/asm.h>
-#include <rtems/powerpc/powerpc.h>
-
-/*
- *  The virtex ELF link scripts support some special sections:
- *    .entry    The actual entry point
- *    .vectors  The section containing the interrupt entry veneers.
- */
-
-/*
- *  Downloaded code loads the vectors separately to 0x00000100,
- *  so .entry can be over 256 bytes.
- *
- *  The other sections are linked in the following order:
- *    .entry
- *    .text
- *    .data
- *    .bss
- *  see linker command file for section placement
- *
- *  The initial stack is set to __stack_base.
- *
- */
-
-        .section .entry
-
-        PUBLIC_VAR (download_entry)
-        PUBLIC_VAR (__rtems_entry_point)
-SYM(download_entry):
-SYM(__rtems_entry_point):
-        b       startupDow        /* Entry point used by xmd dow command */
-
-        PUBLIC_VAR (start)
-SYM(start):
-        b       startupBL         /* Entry point used by bootLoader */
-
-base_addr:
-       /*-------------------------------------------------------------------
-        * Parameters from linker
-        *-----------------------------------------------------------------*/
-toc_pointer:
-        .long   __got_start
-bss_length:
-        .long   __bss_size
-bss_addr:
-        .long   __bss_start
-stack_top:
-        .long   __stack_base
-dccr_contents:
-        .long   __dccr
-iccr_contents:
-        .long   __iccr
-sgr_contents:
-        .long   __sgr
-
-       /*-------------------------------------------------------------------
-        * Setup iccr, sgr, msr, cccr0, dcwr, dccr and clear bss
-        *-----------------------------------------------------------------*/
-
-startupDow:
-       /*-------------------------------------------------------------------
-        * Load the parameter table base address
-        *------------------------------------------------------------------*/
-        lis     r1,   base_addr@h
-        ori     r1,r1,base_addr@l
-
-       /* -------------------------------------------------------------------
-        * Clear the Machine State Register's Critical and External
-        * interrupt enables.
-        *------------------------------------------------------------------*/
-        mfmsr   r3
-        lis     r0,   0x00028000@h
-        ori     r0,r0,0x00028000@l
-        andc    r3,r3,r0
-        mtmsr   r3
-        sync
-
-       /* -------------------------------------------------------------------
-        * Initialize the memory system.
-        *------------------------------------------------------------------*/
-        li      r0,0
-
-        /* Set the Storage Guarded Register. */
-        lwz     r2,sgr_contents-base_addr(r1)
-        mtsgr   r2
-
-        /* Configure endianness, compression */
-        lis     r0,0x00000000@h   // Endianess value
-        mtsler  r0
-        lis     r0,0x00000000@h   // Compression value
-        mtsu0r  r0
-
-        /* Invalidate the entire instruction cache. */
-        iccci   r0,r0
-
-        /* Set the Instruction Cache Cacheability Register. */
-        lwz     r2,iccr_contents-base_addr(r1)
-        mticcr  r2
-        isync
-
-       /*-------------------------------------------------------------------
-        * Tell the processor where the exception vector table will be.
-        *------------------------------------------------------------------*/
-        .extern SYM(__vectors)
-        lis     r0, __vectors@h    /* set EVPR exc. vector prefix */
-        mtspr   evpr,r0
-
-       /*-------------------------------------------------------------------
-        * Set up the debug register to freeze timers on debug events.
-        *------------------------------------------------------------------*/
-        mfdbcr0 r0
-        ori     r0,r0,0x0001
-        mtdbcr0 r0
-        isync
-
-        /* Select whether APU, Wait Enable, interrupts/exceptions and address
-           translation should be enabled when application starts */
-        lis     r0,0x00000000@h   /* SRR1 value */
-        mtsrr1  r0                /* Potentially: 0x80000000 >> 6 is APU */
-
-        /* Clear out stale values in certain registers to avoid confusion */
-        mtxer   r0                /* Fixed-point exception register */
-        mtesr   r0                /* Exception syndrome register */
-        mtdear  r0                /* Data exception address register */
-        mtmcsr  r0                /* Machine check syndrome register */
-        mtpit   r0                /* Programmable interval timer */
-        li      r0,-1             /* -1 to clear TSR */
-        mttsr   r0                /* Timer status register */
-
-        /* Invalidate the data cache */
-        li      r2,0              /* Start address */
-        li      r3,0x100          /* Number of cache lines */
-        mtctr   r3                /* Transfer data cache congruence class count to CTR */
-1:      dccci   0,r2              /* Invalidate this congruence class */
-        addi    r2,r2,0x20        /* Point to next congruence class */
-        bdnz    1b                /* Decrement counter and loop whilst not zero */
-
-       /* -------------------------------------------------------------------
-        * Set Core Configuration Register 0 as follows:
-        * sum: 0x02700E00
-        * bit 1 off:   as told by ppc405 errata to avoid CPU_213 ppc bug
-        * bit 3 off:   as told by ppc405 errata to avoid CPU_213 ppc bug
-                       (Note added later: PPC405F6 is not subject to CPU_213.)
-        * bit 1 on:    Xilinx: CR 203746 Patch for PPC405 errata (RiC 12/8/11)
-        * bit 2 on:    Xilinx: CR 203746 Patch for PPC405 errata (RiC 12/8/11)
-        * bit 6 on:    load word as line
-        * bit 7 off:   load  misses allocate cache line
-        * bit 8 off:   store misses allocate cache line
-        * bit 9-11 on: default settings to do with plb priority
-        * bit 20 on:   prefetching for cacheable regions
-        * bit 21 on:   prefetching for non-cacheable regions
-        * bit 22 on:   request size of non-cacheable inst fetches is 8 words
-        * bit 23 off:  fetch misses allocate cache line
-        *------------------------------------------------------------------*/
-        lis     r5,   0x52700E00@h
-        ori     r5,r5,0x52700E00@l
-
-       /* -------------------------------------------------------------------
-        * To change CCR0 we make sure the code writing to it is
-        *  running from the I-cache. This is needed because changing some
-        * CCR0 fields will cause a hang if the processor is trying to
-        * access memory at the same time.
-        *------------------------------------------------------------------*/
-        lis     r4,   2f@h
-        ori     r4,r4,2f@l
-        icbt    r0,r4
-        b       2f
-
-        .align  5 /* New cache line (32 bytes each) */
-2:
-        icbt    r0,r4       /* Put this line into the I-cache. */
-        isync
-        mtccr0  r5
-        isync
-        b       3f
-
-        .align  5
-3:
-        /* Set the Data Cache Write-Through Register for no write-through, i.e., for write-back. */
-        li      r0,0
-        mtdcwr  r0
-
-        /* Set the Data Cache Cacheablility Register. */
-        lwz     r0,dccr_contents-base_addr(r1)
-        mtdccr  r0
-        isync
-
-       /* Fall through */
-
-
-       /* -------------------------------------------------------------------
-        * If a bootloader has run that has already performed some
-        * initialization, which among other things has loaded
-        * this code into memory and jumped to start above, the initialization
-        * above does not need to be done.  Execution thus resumes here.
-        *------------------------------------------------------------------*/
-
-startupBL:
-       /* -------------------------------------------------------------------
-        * Note that some initialization has already been performed by the
-        * bootloader code in Block RAM, which among other things has loaded
-        * this code into memory and jumped to start above.
-        *------------------------------------------------------------------*/
-
-       /*-------------------------------------------------------------------
-        * Load the parameter table base address
-        *------------------------------------------------------------------*/
-        lis     r1,   base_addr@h
-        ori     r1,r1,base_addr@l
-
-       /*-------------------------------------------------------------------
-        * Setup stack for RTEMS and call boot_card(). From this
-        * point forward registers will be used in accordance with the
-        * PowerPC EABI.
-        *
-        * boot_card() supervises the initialization of RTEMS and the C
-        * library.  It calls bsp_start(), bsp_pretasking_hook(), etc.
-        *------------------------------------------------------------------*/
-        lwz     r2,toc_pointer-base_addr(r1)        /* set r2 to toc */
-        lwz     r1,stack_top-base_addr(r1)          /* set r1 to stack_top */
-
-        /* Align as required by ABI */
-        li      r3,PPC_STACK_ALIGNMENT-1
-        andc    r1,r1,r3
-
-       /*-------------------------------------------------------------------
-        * Set up r2 and r13. Upon entry r1 must have a nonzero value
-        *  as it will be stored in an "init done" flag. Stupid but true.
-        *  r1 must also be set up as a stack pointer as __eabi() jumps
-        *  to __init() which has a standard function prolog.
-        *------------------------------------------------------------------*/
-        bl      __eabi
-
-       /*-------------------------------------------------------------------
-        * Zero the .bss, .sbss and .sbss2 sections.
-        * Must have r2 and r13 properly set.
-        *------------------------------------------------------------------*/
-        bl      zero_bss
-
-       /*-------------------------------------------------------------------
-        * Create a minimal stack frame for this code, the caller of boot_card().
-        *------------------------------------------------------------------*/
-        addi    r1,r1, -PPC_MINIMUM_STACK_FRAME_SIZE
-
-        xor     r3,r3,r3
-        stw     r3,0(r1)            /* Terminate the chain of stack frames. */
-        stw     r3,4(r1)
-        stw     r3,8(r1)
-        stw     r3,12(r1)
-        lis     r5,environ@ha
-        la      r5,environ@l(r5)    /* environp */
-
-       /*-------------------------------------------------------------------
-        * Call boot_card() with its arguments, the command-line pointer and
-        * the argument count, set to NULL.
-        *------------------------------------------------------------------*/
-        li      r4,0                /* argv */
-        li      r3,0                /* argc */
-        .extern SYM (boot_card)
-        b       SYM (boot_card)

deleted file c/src/lib/libbsp/powerpc/virtex4/startup/.svn/tmp/tempfile.tmp

@@ -1 @@
-/*!@file      start.S
-*
-*  @brief     Initialization code to set up the CPU and call boot_card()
-*
-*  This "BSP" targets the Xilinx Virtex XC4VFX60 and related parts.  This
-*  BSP makes no assumptions on what firmware is loaded into the FPGA.
-*
-*  Provides the .entry section code. This is the first code to run in
-*  the PPC after download to RAM.   Excecution in this case starts at
-*  'download_entry'.
-*
-*  The entrypoint 'start' is provided for the case where a bootloader has
-*  initialized the CPU, and all that remains to do is to set up a C
-*  environment and call boot_card.
-*
-*  Derived from virtex dlentry and others.
-*
-*  IBM refers to the version of the processor as PPC405F5.
-*  The processor version register returns 0x20011470.
-*  References:
-*      PowerPC Processor Reference Guide UG011 (v1.3)
-*      http://www.xilinx.com/support/documentation/user_guides/ug011.pdf
-*
-*      PowerPC Block Reference Guide
-*      http://www.xilinx.com/support/documentation/user_guides/ug018.pdf
-*
-*      PowerPC errata
-*      ftp://ftp.xilinx.com/pub/documentation/misc/ppc405f6v5_2_0.pdf
-*
-*      PowerPC 405-S Embedded Processor Core User's Manual (Version 1.2)
-*      https://www-01.ibm.com/chips/techlib/techlib.nsf/products/PowerPC_405_Embedded_Cores
-*
-*  @author    Richard Claus <claus@SLAC.Stanford.edu>
-*
-*  @date      March 4, 2011 -- Created
-*
-*  $Revision$
-*
-*  @verbatim                    Copyright 2011
-*                                      by
-*                         The Board of Trustees of the
-*                       Leland Stanford Junior University.
-*                              All rights reserved.
-*
-*         Work supported by the U.S. Department of Energy under contract
-*       DE-AC03-76SF00515.
-*
-*                               Disclaimer Notice
-*
-*        The items furnished herewith were developed under the sponsorship
-*   of the U.S. Government.  Neither the U.S., nor the U.S. D.O.E., nor the
-*   Leland Stanford Junior University, nor their employees, makes any war-
-*   ranty, express or implied, or assumes any liability or responsibility
-*   for accuracy, completeness or usefulness of any information, apparatus,
-*   product or process disclosed, or represents that its use will not in-
-*   fringe privately-owned rights.  Mention of any product, its manufactur-
-*   er, or suppliers shall not, nor is it intended to, imply approval, dis-
-*   approval, or fitness for any particular use.  The U.S. and the Univer-
-*   sity at all times retain the right to use and disseminate the furnished
-*   items for any purpose whatsoever.                       Notice 91 02 01
-*
-*  @endverbatim
-*/
-
-#include <rtems/asm.h>
-#include <rtems/powerpc/powerpc.h>
-
-/*
- *  The virtex ELF link scripts support some special sections:
- *    .entry    The actual entry point
- *    .vectors  The section containing the interrupt entry veneers.
- */
-
-/*
- *  Downloaded code loads the vectors separately to 0x00000100,
- *  so .entry can be over 256 bytes.
- *
- *  The other sections are linked in the following order:
- *    .entry
- *    .text
- *    .data
- *    .bss
- *  see linker command file for section placement
- *
- *  The initial stack is set to __stack_base.
- *
- */
-
-        .section .entry
-
-        PUBLIC_VAR (download_entry)
-        PUBLIC_VAR (__rtems_entry_point)
-SYM(download_entry):
-SYM(__rtems_entry_point):
-        b       startupDow        /* Entry point used by xmd dow command */
-
-        PUBLIC_VAR (start)
-SYM(start):
-        b       startupBL         /* Entry point used by bootLoader */
-
-base_addr:
-       /*-------------------------------------------------------------------
-        * Parameters from linker
-        *-----------------------------------------------------------------*/
-toc_pointer:
-        .long   __got_start
-bss_length:
-        .long   __bss_size
-bss_addr:
-        .long   __bss_start
-stack_top:
-        .long   __stack_base
-dccr_contents:
-        .long   __dccr
-iccr_contents:
-        .long   __iccr
-sgr_contents:
-        .long   __sgr
-
-       /*-------------------------------------------------------------------
-        * Setup iccr, sgr, msr, cccr0, dcwr, dccr and clear bss
-        *-----------------------------------------------------------------*/
-
-startupDow:
-       /*-------------------------------------------------------------------
-        * Load the parameter table base address
-        *------------------------------------------------------------------*/
-        lis     r1,   base_addr@h
-        ori     r1,r1,base_addr@l
-
-       /* -------------------------------------------------------------------
-        * Clear the Machine State Register's Critical and External
-        * interrupt enables.
-        *------------------------------------------------------------------*/
-        mfmsr   r3
-        lis     r0,   0x00028000@h
-        ori     r0,r0,0x00028000@l
-        andc    r3,r3,r0
-        mtmsr   r3
-        sync
-
-       /* -------------------------------------------------------------------
-        * Initialize the memory system.
-        *------------------------------------------------------------------*/
-        li      r0,0
-
-        /* Set the Storage Guarded Register. */
-        lwz     r2,sgr_contents-base_addr(r1)
-        mtsgr   r2
-
-        /* Configure endianness, compression */
-        lis     r0,0x00000000@h   // Endianess value
-        mtsler  r0
-        lis     r0,0x00000000@h   // Compression value
-        mtsu0r  r0
-
-        /* Invalidate the entire instruction cache. */
-        iccci   r0,r0
-
-        /* Set the Instruction Cache Cacheability Register. */
-        lwz     r2,iccr_contents-base_addr(r1)
-        mticcr  r2
-        isync
-
-       /*-------------------------------------------------------------------
-        * Tell the processor where the exception vector table will be.
-        *------------------------------------------------------------------*/
-        .extern SYM(__vectors)
-        lis     r0, __vectors@h    /* set EVPR exc. vector prefix */
-        mtspr   evpr,r0
-
-       /*-------------------------------------------------------------------
-        * Set up the debug register to freeze timers on debug events.
-        *------------------------------------------------------------------*/
-        mfdbcr0 r0
-        ori     r0,r0,0x0001
-        mtdbcr0 r0
-        isync
-
-        /* Select whether APU, Wait Enable, interrupts/exceptions and address
-           translation should be enabled when application starts */
-        lis     r0,0x00000000@h   /* SRR1 value */
-        mtsrr1  r0                /* Potentially: 0x80000000 >> 6 is APU */
-
-        /* Clear out stale values in certain registers to avoid confusion */
-        mtxer   r0                /* Fixed-point exception register */
-        mtesr   r0                /* Exception syndrome register */
-        mtdear  r0                /* Data exception address register */
-        mtmcsr  r0                /* Machine check syndrome register */
-        mtpit   r0                /* Programmable interval timer */
-        li      r0,-1             /* -1 to clear TSR */
-        mttsr   r0                /* Timer status register */
-
-        /* Invalidate the data cache */
-        li      r2,0              /* Start address */
-        li      r3,0x100          /* Number of cache lines */
-        mtctr   r3                /* Transfer data cache congruence class count to CTR */
-1:      dccci   0,r2              /* Invalidate this congruence class */
-        addi    r2,r2,0x20        /* Point to next congruence class */
-        bdnz    1b                /* Decrement counter and loop whilst not zero */
-
-       /* -------------------------------------------------------------------
-        * Set Core Configuration Register 0 as follows:
-        * sum: 0x02700E00
-        * bit 1 off:   as told by ppc405 errata to avoid CPU_213 ppc bug
-        * bit 3 off:   as told by ppc405 errata to avoid CPU_213 ppc bug
-                       (Note added later: PPC405F6 is not subject to CPU_213.)
-        * bit 1 on:    Xilinx: CR 203746 Patch for PPC405 errata (RiC 12/8/11)
-        * bit 2 on:    Xilinx: CR 203746 Patch for PPC405 errata (RiC 12/8/11)
-        * bit 6 on:    load word as line
-        * bit 7 off:   load  misses allocate cache line
-        * bit 8 off:   store misses allocate cache line
-        * bit 9-11 on: default settings to do with plb priority
-        * bit 20 on:   prefetching for cacheable regions
-        * bit 21 on:   prefetching for non-cacheable regions
-        * bit 22 on:   request size of non-cacheable inst fetches is 8 words
-        * bit 23 off:  fetch misses allocate cache line
-        *------------------------------------------------------------------*/
-        lis     r5,   0x52700E00@h
-        ori     r5,r5,0x52700E00@l
-
-       /* -------------------------------------------------------------------
-        * To change CCR0 we make sure the code writing to it is
-        *  running from the I-cache. This is needed because changing some
-        * CCR0 fields will cause a hang if the processor is trying to
-        * access memory at the same time.
-        *------------------------------------------------------------------*/
-        lis     r4,   2f@h
-        ori     r4,r4,2f@l
-        icbt    r0,r4
-        b       2f
-
-        .align  5 /* New cache line (32 bytes each) */
-2:
-        icbt    r0,r4       /* Put this line into the I-cache. */
-        isync
-        mtccr0  r5
-        isync
-        b       3f
-
-        .align  5
-3:
-        /* Set the Data Cache Write-Through Register for no write-through, i.e., for write-back. */
-        li      r0,0
-        mtdcwr  r0
-
-        /* Set the Data Cache Cacheablility Register. */
-        lwz     r0,dccr_contents-base_addr(r1)
-        mtdccr  r0
-        isync
-
-       /* Fall through */
-
-
-       /* -------------------------------------------------------------------
-        * If a bootloader has run that has already performed some
-        * initialization, which among other things has loaded
-        * this code into memory and jumped to start above, the initialization
-        * above does not need to be done.  Execution thus resumes here.
-        *------------------------------------------------------------------*/
-
-startupBL:
-       /* -------------------------------------------------------------------
-        * Note that some initialization has already been performed by the
-        * bootloader code in Block RAM, which among other things has loaded
-        * this code into memory and jumped to start above.
-        *------------------------------------------------------------------*/
-
-       /*-------------------------------------------------------------------
-        * Load the parameter table base address
-        *------------------------------------------------------------------*/
-        lis     r1,   base_addr@h
-        ori     r1,r1,base_addr@l
-
-       /*-------------------------------------------------------------------
-        * Setup stack for RTEMS and call boot_card(). From this
-        * point forward registers will be used in accordance with the
-        * PowerPC EABI.
-        *
-        * boot_card() supervises the initialization of RTEMS and the C
-        * library.  It calls bsp_start(), bsp_pretasking_hook(), etc.
-        *------------------------------------------------------------------*/
-        lwz     r2,toc_pointer-base_addr(r1)        /* set r2 to toc */
-        lwz     r1,stack_top-base_addr(r1)          /* set r1 to stack_top */
-
-        /* Align as required by ABI */
-        li      r3,PPC_STACK_ALIGNMENT-1
-        andc    r1,r1,r3
-
-       /*-------------------------------------------------------------------
-        * Set up r2 and r13. Upon entry r1 must have a nonzero value
-        *  as it will be stored in an "init done" flag. Stupid but true.
-        *  r1 must also be set up as a stack pointer as __eabi() jumps
-        *  to __init() which has a standard function prolog.
-        *------------------------------------------------------------------*/
-        bl      __eabi
-
-       /*-------------------------------------------------------------------
-        * Zero the .bss, .sbss and .sbss2 sections.
-        * Must have r2 and r13 properly set.
-        *------------------------------------------------------------------*/
-        bl      zero_bss
-
-       /*-------------------------------------------------------------------
-        * Create a minimal stack frame for this code, the caller of boot_card().
-        *------------------------------------------------------------------*/
-        addi    r1,r1, -PPC_MINIMUM_STACK_FRAME_SIZE
-
-        xor     r3,r3,r3
-        stw     r3,0(r1)            /* Terminate the chain of stack frames. */
-        stw     r3,4(r1)
-        stw     r3,8(r1)
-        stw     r3,12(r1)
-        lis     r5,environ@ha
-        la      r5,environ@l(r5)    /* environp */
-
-       /*-------------------------------------------------------------------
-        * Call boot_card() with its arguments, the command-line pointer and
-        * the argument count, set to NULL.
-        *------------------------------------------------------------------*/
-        li      r4,0                /* argv */
-        li      r3,0                /* argc */
-        .extern SYM (boot_card)
-        b       SYM (boot_card)