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Ticket #1966: soc11.diff

File soc11.diff, 7.9 KB (added by seb, on 11/16/11 at 10:23:52)

patch

  • c/src/lib/libbsp/lm32/shared/milkymist_console/uart.c

    old new  
    1515#include "../include/system_conf.h"
    1616#include "uart.h"
    1717
    18 bool BSP_uart_txbusy;
    19 
    2018void BSP_uart_init(int baud)
    2119{
    2220  MM_WRITE(MM_UART_DIV, CPU_FREQUENCY/baud/16);
    … …  
    2422
    2523void BSP_uart_polled_write(char ch)
    2624{
    27   int ip;
    2825  rtems_interrupt_level level;
    2926
    3027  rtems_interrupt_disable(level);
    31   if (BSP_uart_txbusy) {
    32     /* wait for the end of the transmission by the IRQ-based driver */
    33     do {
    34       lm32_read_interrupts(ip);
    35     } while (!(ip & (1 << MM_IRQ_UARTTX)));
    36     lm32_interrupt_ack(1 << MM_IRQ_UARTTX);
    37   }
     28  while(!(MM_READ(MM_UART_STAT) & UART_STAT_THRE));
    3829  MM_WRITE(MM_UART_RXTX, ch);
    39   do {
    40     lm32_read_interrupts(ip);
    41   } while (!(ip & (1 << MM_IRQ_UARTTX)));
    42   /* if TX was busy, do not ack the IRQ
    43    * so that the IRQ-based driver ISR is run */
    44   if (!BSP_uart_txbusy)
    45     lm32_interrupt_ack(1 << MM_IRQ_UARTTX);
     30  while(!(MM_READ(MM_UART_STAT) & UART_STAT_THRE));
    4631  rtems_interrupt_enable(level);
    4732}
    4833
    4934int BSP_uart_polled_read(void)
    5035{
    51   int ip;
    5236  char r;
    5337  rtems_interrupt_level level;
    5438
    5539  rtems_interrupt_disable(level);
    56   do {
    57     lm32_read_interrupts(ip);
    58   } while (!(ip & (1 << MM_IRQ_UARTRX)));
    59   lm32_interrupt_ack(1 << MM_IRQ_UARTRX);
     40  while(!(MM_READ(MM_UART_STAT) & UART_STAT_RX_EVT));
    6041  r = MM_READ(MM_UART_RXTX);
     42  MM_WRITE(MM_UART_STAT, UART_STAT_RX_EVT);
    6143  rtems_interrupt_enable(level);
    6244
    6345  return r;

  • c/src/lib/libbsp/lm32/shared/milkymist_console/uart.h

    old new  
    11/*
    2  *  This file contains definitions for LatticeMico32 UART
     2 *  This file contains definitions for the Milkymist UART
    33 *
    44 *  The license and distribution terms for this file may be
    55 *  found in the file LICENSE in this distribution or at
    66 *  http://www.rtems.com/license/LICENSE.
    77 *
    88 *  $Id: uart.h,v 1.2 2011/08/01 13:48:39 joel Exp $
    9  *
    10  *  COPYRIGHT (c) Yann Sionneau <yann.sionneau@telecom-sudparis.eu> (GSoC 2010)
    11  *  Telecom SudParis
    129 */
    1310
    1411#ifndef _BSPUART_H
    1512#define _BSPUART_H
    1613
    17 extern bool BSP_uart_txbusy;
    18 
    1914void BSP_uart_init(int baud);
    2015void BSP_uart_polled_write(char ch);
    2116int BSP_uart_polled_read(void);

  • c/src/lib/libbsp/lm32/shared/milkymist_console/console.c

    old new  
    119119  rtems_interrupt_level level;
    120120
    121121  rtems_interrupt_disable(level);
    122   BSP_uart_txbusy = true;
    123122  MM_WRITE(MM_UART_RXTX, *buf);
    124123  rtems_interrupt_enable(level);
    125124  return 0;
    126125}
    127126
    128 static rtems_isr mmconsole_txdone(rtems_vector_number n)
    129 {
    130   BSP_uart_txbusy = false;
    131   lm32_interrupt_ack(1 << MM_IRQ_UARTTX);
    132   rtems_termios_dequeue_characters(tty, 1);
    133 }
    134 
    135 static rtems_isr mmconsole_rxdone(rtems_vector_number n)
     127static rtems_isr mmconsole_interrupt(rtems_vector_number n)
    136128{
    137129  char c;
    138   c = MM_READ(MM_UART_RXTX);
    139   lm32_interrupt_ack(1 << MM_IRQ_UARTRX);
    140   rtems_termios_enqueue_raw_characters(tty, &c, 1);
     130  while (MM_READ(MM_UART_STAT) & UART_STAT_RX_EVT) {
     131    c = MM_READ(MM_UART_RXTX);
     132    MM_WRITE(MM_UART_STAT, UART_STAT_RX_EVT);
     133    rtems_termios_enqueue_raw_characters(tty, &c, 1);
     134  }
     135  if (MM_READ(MM_UART_STAT) & UART_STAT_TX_EVT) {
     136    MM_WRITE(MM_UART_STAT, UART_STAT_TX_EVT);
     137    rtems_termios_dequeue_characters(tty, 1);
     138  }
     139  lm32_interrupt_ack(1 << MM_IRQ_UART);
    141140}
    142141
    143142static const rtems_termios_callbacks mmconsole_callbacks = {
    … …  
    166165  if (status != RTEMS_SUCCESSFUL)
    167166    rtems_fatal_error_occurred(status);
    168167
    169   rtems_interrupt_catch(mmconsole_txdone, MM_IRQ_UARTTX, &dummy);
    170   rtems_interrupt_catch(mmconsole_rxdone, MM_IRQ_UARTRX, &dummy);
    171   bsp_interrupt_vector_enable(MM_IRQ_UARTTX);
    172   bsp_interrupt_vector_enable(MM_IRQ_UARTRX);
     168  rtems_interrupt_catch(mmconsole_interrupt, MM_IRQ_UART, &dummy);
     169  bsp_interrupt_vector_enable(MM_IRQ_UART);
     170  MM_WRITE(MM_UART_CTRL, UART_CTRL_RX_INT|UART_CTRL_TX_INT);
    173171
    174172  return RTEMS_SUCCESSFUL;
    175173}

  • c/src/lib/libbsp/lm32/shared/milkymist_midi/midi.c

    old new  
    3131{
    3232  unsigned char msg;
    3333
    34   lm32_interrupt_ack(1 << MM_IRQ_MIDIRX);
    35   msg = MM_READ(MM_MIDI_RXTX);
    36   rtems_message_queue_send(midi_q, &msg, 1);
     34  while (MM_READ(MM_MIDI_STAT) & MIDI_STAT_RX_EVT) {
     35    msg = MM_READ(MM_MIDI_RXTX);
     36    MM_WRITE(MM_MIDI_STAT, MIDI_STAT_RX_EVT);
     37    rtems_message_queue_send(midi_q, &msg, 1);
     38  }
     39  lm32_interrupt_ack(1 << MM_IRQ_MIDI);
    3740}
    3841
    3942rtems_device_driver midi_initialize(
    … …  
    5760  );
    5861  RTEMS_CHECK_SC(sc, "create MIDI queue");
    5962
    60   rtems_interrupt_catch(interrupt_handler, MM_IRQ_MIDIRX, &dummy);
    61   bsp_interrupt_vector_enable(MM_IRQ_MIDIRX);
    62 
     63  rtems_interrupt_catch(interrupt_handler, MM_IRQ_MIDI, &dummy);
     64  bsp_interrupt_vector_enable(MM_IRQ_MIDI);
    6365  /* Only MIDI THRU mode is supported atm */
    64   MM_WRITE(MM_MIDI_THRU, 1);
     66  MM_WRITE(MM_MIDI_CTRL, MIDI_CTRL_RX_INT|MIDI_CTRL_THRU);
    6567
    6668  return RTEMS_SUCCESSFUL;
    6769}

  • c/src/lib/libbsp/lm32/milkymist/include/system_conf.h

    old new  
    2626/* UART */
    2727#define MM_UART_RXTX            (0xe0000000)
    2828#define MM_UART_DIV             (0xe0000004)
     29#define MM_UART_STAT            (0xe0000008)
     30#define MM_UART_CTRL            (0xe000000c)
     31
     32#define UART_STAT_THRE          (0x1)
     33#define UART_STAT_RX_EVT        (0x2)
     34#define UART_STAT_TX_EVT        (0x4)
     35
     36#define UART_CTRL_RX_INT        (0x1)
     37#define UART_CTRL_TX_INT        (0x2)
     38#define UART_CTRL_THRU          (0x4)
    2939
    3040/* Timers */
    3141#define MM_TIMER1_COMPARE       (0xe0001024)
    … …  
    225235
    226236/* MIDI */
    227237#define MM_MIDI_RXTX            (0xe000b000)
    228 #define MM_MIDI_DIVISOR         (0xe000b004)
    229 #define MM_MIDI_THRU            (0xe000b008)
     238#define MM_MIDI_DIV             (0xe000b004)
     239#define MM_MIDI_STAT            (0xe000b008)
     240#define MM_MIDI_CTRL            (0xe000b00c)
     241
     242#define MIDI_STAT_THRE          (0x1)
     243#define MIDI_STAT_RX_EVT        (0x2)
     244#define MIDI_STAT_TX_EVT        (0x4)
     245
     246#define MIDI_CTRL_RX_INT        (0x1)
     247#define MIDI_CTRL_TX_INT        (0x2)
     248#define MIDI_CTRL_THRU          (0x4)
    230249
    231250/* IR */
    232251#define MM_IR_RX                (0xe000e000)
    … …  
    248267#define BT656_FILTER_INFRAME    (0x4)
    249268
    250269/* Interrupts */
    251 #define MM_IRQ_UARTRX           (0)
    252 #define MM_IRQ_UARTTX           (1)
    253 #define MM_IRQ_GPIO             (2)
    254 #define MM_IRQ_TIMER0           (3)
    255 #define MM_IRQ_TIMER1           (4)
    256 #define MM_IRQ_AC97CRREQUEST    (5)
    257 #define MM_IRQ_AC97CRREPLY      (6)
    258 #define MM_IRQ_AC97DMAR         (7)
    259 #define MM_IRQ_AC97DMAW         (8)
    260 #define MM_IRQ_PFPU             (9)
    261 #define MM_IRQ_TMU              (10)
    262 #define MM_IRQ_ETHRX            (11)
    263 #define MM_IRQ_ETHTX            (12)
    264 #define MM_IRQ_VIDEOIN          (13)
    265 #define MM_IRQ_MIDIRX           (14)
    266 #define MM_IRQ_MIDITX           (15)
    267 #define MM_IRQ_IR               (16)
    268 #define MM_IRQ_USB              (17)
     270#define MM_IRQ_UART             (0)
     271#define MM_IRQ_GPIO             (1)
     272#define MM_IRQ_TIMER0           (2)
     273#define MM_IRQ_TIMER1           (3)
     274#define MM_IRQ_AC97CRREQUEST    (4)
     275#define MM_IRQ_AC97CRREPLY      (5)
     276#define MM_IRQ_AC97DMAR         (6)
     277#define MM_IRQ_AC97DMAW         (7)
     278#define MM_IRQ_PFPU             (8)
     279#define MM_IRQ_TMU              (9)
     280#define MM_IRQ_ETHRX            (10)
     281#define MM_IRQ_ETHTX            (11)
     282#define MM_IRQ_VIDEOIN          (12)
     283#define MM_IRQ_MIDI             (13)
     284#define MM_IRQ_IR               (14)
     285#define MM_IRQ_USB              (15)
    269286
    270287/* Flash layout */
    271288#define FLASH_BASE                      (0x80000000)