Ticket #1786: rtems-4.10.0-mvme5500-06032011_v1.diff

File rtems-4.10.0-mvme5500-06032011_v1.diff, 15.4 KB (added by feng1, on Jun 3, 2011 at 5:21:40 PM)

A finalized clean patch.

  • bsp_specs

    diff -Naur mvme5500.orig/bsp_specs mvme5500/bsp_specs
    old new  
    44
    55*startfile:
    66%{!qrtems: %(old_startfile)} \
    7 %{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s \
    8   mvme5500start.o%s -e __rtems_entry_point -u __vectors}}
     7%{!nostdlib: %{qrtems: ecrti%O%s rtems_crti%O%s crtbegin.o%s -e __rtems_entry_point -u __vectors mvme5500start.o%s}}
    98
    109*link:
    1110%{!qrtems: %(old_link)} %{qrtems: -dp -Bstatic}
  • ChangeLog

    diff -Naur mvme5500.orig/ChangeLog mvme5500/ChangeLog
    old new  
     12011-04-10      Kate Feng <feng@bnl.gov>
     2        * Makefile.am: Add support for Altivec.
     3        * startup/bspstart.c, Makefile.am: Use shared/startup/zerobss.c instead.
     4        * make/custom/mvme5500.cfg : CPU_CFLAGS = -mcpu=7450 -mtune=7450 -Dmpc7455
     5        * irq/BSP_irq.c, pci/detect_host_bridge.c,pci.c,pcifinddevice.c:Remove warnings.
     6        * vme/VMEConfig.h, include/bsp.h: use VME shared IRQ handlers.
     7       
    182011-02-02      Ralf Corsépius <ralf.corsepius@rtems.org>
    29
    310        * configure.ac: Require autoconf-2.68, automake-1.11.1.
  • include/bsp.h

    diff -Naur mvme5500.orig/include/bsp.h mvme5500/include/bsp.h
    old new  
    103103
    104104/* The glues to Till's vmeUniverse, although the name does not
    105105 * actually reflect the relevant architect of the MVME5500.
    106  * Till TODO ? :  BSP_PCI_DO_EOI instead ?
    107  * BSP_EXT_IRQ0 instead of BSP_PCI_IRQ0 ?
    108  *
    109106 */
    110 #define BSP_PIC_DO_EOI  inl(0xc34)  /* PCI IACK */
    111107#define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET
    112108
    113109/*
  • irq/BSP_irq.c

    diff -Naur mvme5500.orig/irq/BSP_irq.c mvme5500/irq/BSP_irq.c
    old new  
    381381     * bit 10:GPP interrupts as level sensitive(1) or edge sensitive(0).
    382382     * MOTload default is set as level sensitive(1). Set it agin to make sure.
    383383     */
    384     out_le32(GT_CommUnitArb_Ctrl, (in_le32(GT_CommUnitArb_Ctrl)| (1<<10)));
     384    out_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl,
     385             (in_le32((volatile unsigned int *)GT_CommUnitArb_Ctrl)| (1<<10)));
    385386
    386387#if 0
    387388    printk("BSP_irqMask_reg[0] = 0x%x, BSP_irqCause_reg[0] 0x%x\n",
  • make/custom/mvme5500.cfg

    diff -Naur mvme5500.orig/make/custom/mvme5500.cfg mvme5500/make/custom/mvme5500.cfg
    old new  
    99RTEMS_CPU=powerpc
    1010RTEMS_CPU_MODEL=mpc7455
    1111
     12# This is the actual bsp directory used during the build process.
     13RTEMS_BSP_FAMILY=mvme5500
     14
    1215#  This contains the compiler options necessary to select the CPU model
    1316#  and (hopefully) optimize for it.
    14 #  if gcc does not regonize 7450 then change -mcpu=750
    15 #
    16 CPU_CFLAGS = -fno-strict-aliasing -mcpu=7450 -Dmpc7455 -mno-altivec -mabi=altivec -mvrsave=no -mmultiple -mstring -mstrict-align
    17 #T. Straumann; disable sdata=eabi for now until CEXP supports it -meabi -msdata=eabi
     17CPU_CFLAGS = -mcpu=7450 -mtune=7450 -Dmpc7455
    1818
    1919# optimize flag: typically -O2
    2020CFLAGS_OPTIMIZE_V = -O2 -g
     
    2323        $(default-bsp-post-link)
    2424        $(OBJCOPY) -O binary $(basename $@).exe $(basename $@)$(DOWNEXT)
    2525endef
     26
     27#
     28START_BASE=mvme5500start
  • Makefile.am

    diff -Naur mvme5500.orig/Makefile.am mvme5500/Makefile.am
    old new  
    3434libbsp_a_SOURCES += startup/bspstart.c \
    3535    ../../powerpc/shared/startup/pgtbl_setup.c startup/pgtbl_activate.c \
    3636    ../../powerpc/shared/startup/pretaskinghook.c \
     37    ../../powerpc/shared/startup/zerobss.c \
    3738    ../../powerpc/shared/startup/bspgetworkarea.c \
    3839    ../../powerpc/shared/startup/sbrk.c ../../shared/bootcard.c \
    3940    ../../shared/bsppredriverhook.c startup/bspclean.c \
     
    121122    ../../../libcpu/@RTEMS_CPU@/@exceptions@/exc_bspsupport.rel \
    122123    ../../../libcpu/@RTEMS_CPU@/@exceptions@/irq_bspsupport.rel \
    123124    ../../../libcpu/@RTEMS_CPU@/mpc6xx/mmu.rel \
    124     ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel
     125    ../../../libcpu/@RTEMS_CPU@/mpc6xx/timer.rel\
     126    ../../../libcpu/@RTEMS_CPU@/mpc6xx/altivec.rel
     127
    125128if HAS_NETWORKING
    126129libbsp_a_LIBADD += network.rel
    127130endif
  • network/if_1GHz/if_wm.c

    diff -Naur mvme5500.orig/network/if_1GHz/if_wm.c mvme5500/network/if_1GHz/if_wm.c
    old new  
    17301730  /* We have MII. */
    17311731  sc->sc_flags |= WM_F_HAS_MII;
    17321732
    1733 #if 1
     1733#if 0
    17341734  /* <skf> May 2009 : The value that should be programmed into IPGT is 10 */
    17351735  sc->sc_tipg = TIPG_IPGT(10)+TIPG_IPGR1(8)+TIPG_IPGR2(6);
    17361736#else
  • pci/detect_host_bridge.c

    diff -Naur mvme5500.orig/pci/detect_host_bridge.c mvme5500/pci/detect_host_bridge.c
    old new  
    2727
    2828unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet)
    2929{
    30   unsigned int pcidata, pcidata1;
     30  uint32_t pcidata, pcidata1;
    3131  int PciLocal, busNumber=0;
    3232
    3333  /* On the mvme5500 board, the GT64260B system controller had the MCP
  • pci/pci.c

    diff -Naur mvme5500.orig/pci/pci.c mvme5500/pci/pci.c
    old new  
    108108    BSP_pci[n].config_data,pciConfigPack(bus,dev,func,offset));
    109109#endif
    110110
    111   out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
     111  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
    112112  *val = in_8(BSP_pci[n].pci_config_data + (offset&3));
    113113  return PCIBIOS_SUCCESSFUL;
    114114}
     
    129129  printk("addr %x, data %x, pack %x \n", config_addr,
    130130    config_data,pciConfigPack(bus,dev,func,offset));
    131131#endif
    132   out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
    133   *val = in_le16(BSP_pci[n].pci_config_data + (offset&2));
     132  out_be32((volatile unsigned int *) BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
     133  *val = in_le16((volatile unsigned short *) (BSP_pci[n].pci_config_data + (offset&2)));
    134134  return PCIBIOS_SUCCESSFUL;
    135135}
    136136
     
    147147  *val = 0xffffffff;
    148148  if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
    149149
    150   out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
    151   *val = in_le32(BSP_pci[n].pci_config_data);
     150  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
     151  *val = in_le32((volatile unsigned int *)BSP_pci[n].pci_config_data);
    152152  return PCIBIOS_SUCCESSFUL;
    153153}
    154154
     
    163163
    164164  if (offset & ~0xff) return PCIBIOS_BAD_REGISTER_NUMBER;
    165165
    166   out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
    167   out_8(BSP_pci[n].pci_config_data + (offset&3), val);
     166  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
     167  out_8((volatile unsigned char *) (BSP_pci[n].pci_config_data + (offset&3)), val);
    168168  return PCIBIOS_SUCCESSFUL;
    169169}
    170170
     
    179179
    180180  if ((offset&1)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
    181181
    182   out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
    183   out_le16(BSP_pci[n].pci_config_data + (offset&3), val);
     182  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
     183  out_le16((volatile unsigned short *)(BSP_pci[n].pci_config_data + (offset&3)), val);
    184184  return PCIBIOS_SUCCESSFUL;
    185185}
    186186
     
    195195
    196196  if ((offset&3)|| (offset & ~0xff)) return PCIBIOS_BAD_REGISTER_NUMBER;
    197197
    198   out_be32(BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
    199   out_le32(BSP_pci[n].pci_config_data, val);
     198  out_be32((volatile unsigned int *)BSP_pci[n].pci_config_addr, pciConfigPack(bus,dev,func,offset));
     199  out_le32((volatile unsigned int *)BSP_pci[n].pci_config_data, val);
    200200  return PCIBIOS_SUCCESSFUL;
    201201}
    202202
  • pci/pcifinddevice.c

    diff -Naur mvme5500.orig/pci/pcifinddevice.c mvme5500/pci/pcifinddevice.c
    old new  
    3535int pci_find_device( unsigned short vendorid, unsigned short deviceid,
    3636                   int instance, int *pbus, int *pdev, int *pfun )
    3737{
    38   unsigned int d;
     38  uint32_t d;
    3939  unsigned short s;
    4040  unsigned char bus,dev,fun,hd;
    4141
  • start/start.S

    diff -Naur mvme5500.orig/start/start.S mvme5500/start/start.S
    old new  
    44 *  Copyright (C) 1999 Eric Valette. valette@crf.canon.fr
    55 *
    66 *  S. Kate Feng <feng1@bnl.gov>, April 2004
    7  *  Mapped the 2nd 256MB of RAM to support the MVME5500 boards.
    8  *
     7 *  Mapped the 2nd 256MB of RAM to support the MVME5500/MVME6100 boards
     8 *     
    99 *  The license and distribution terms for this file may be
    1010 *  found in the file LICENSE in this distribution or at
    1111 *  http://www.rtems.com/license/LICENSE.
    1212 *
     13<<<<<<< start.S
     14 *  $Id: start.S,v 1.26 2009/12/02 01:51:22 strauman Exp $
     15=======
     16 *  $Id: start.S,v 1.26 2009/12/02 01:51:22 strauman Exp $
     17>>>>>>> 1.25
    1318 *
    1419 */
    1520
    1621#include <rtems/asm.h>
    1722#include <rtems/score/cpu.h>
    1823#include <rtems/powerpc/powerpc.h>
     24
    1925#include <libcpu/io.h>
    2026#include <libcpu/bat.h>
     27#include <bspopts.h>
    2128
    2229#define SYNC \
    2330        sync; \
     
    3340        li      r10,0x63        ;       \
    3441        sc
    3542
    36 
    3743        .text
    3844        .globl  __rtems_entry_point
    3945        .type   __rtems_entry_point,@function
     
    6268        mr      r29,r5
    6369        mr      r28,r6
    6470        mr      r27,r7
     71
     72#ifdef __ALTIVEC__
     73        /* enable altivec; gcc may use it! */
     74        mfmsr r0
     75        oris  r0, r0, (1<<(31-16-6))
     76        mtmsr r0
     77        /*
     78         * set vscr and vrsave to known values
     79         */
     80        li    r0, 0
     81        mtvrsave r0
     82        vxor   0,0,0
     83        mtvscr 0
     84#endif
     85
    6586        /*
    6687         * Make sure we have nothing in BATS and TLB
    6788         */
     
    7293 * of RAM to KERNELBASE.
    7394 */
    7495        lis     r11,KERNELBASE@h
    75         ori     r11,r11,0x1ffe          /* set up BAT0 registers for 604+ */
     96/* set up BAT registers for 604 */
     97        ori     r11,r11,0x1ffe
    7698        li      r8,2                    /* R/W access */
    7799        isync
    78100        mtspr   DBAT0L,r8               /* N.B. 6xx (not 601) have valid */
     
    81103        mtspr   IBAT0U,r11
    82104        isync
    83105/*
    84  * Use the 2nd pair of BAT registers to map the 2nd 256MB
    85  * of RAM to 0x10000000. <SKF>
     106 * <skf> Use the 2nd pair of BAT registers to map the 2nd 256MB
     107 * of RAM to 0x10000000.
    86108 */
    87109        lis     r11,MEM256MB@h
    88110        ori     r11,r11,0x1ffe          /* set up BAT1 registers for 604+ */
     
    106128
    107129enter_C_code:
    108130        bl      MMUon
    109         bl  __eabi      /* setup EABI and SYSV environment */
     131        bl      __eabi  /* setup EABI and SYSV environment */
    110132        bl      zero_bss
    111133        /*
    112134         * restore prep boot params
     
    121143         * stack = &__rtems_end + 4096
    122144         */
    123145        addis   r9,r0, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@ha
    124         addi    r9,r9, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@l
    125         mr      r1, r9
     146        addi    r9,r9, __stack-PPC_MINIMUM_STACK_FRAME_SIZE@l
    126147        /*
    127          * We are know in a environment that is totally independent from bootloader setup.
     148         * align initial stack
     149         * (we hope that the bootloader stack was 16-byte aligned
     150         * or we haven't used altivec yet...)
     151         */
     152        li   r0, (CPU_STACK_ALIGNMENT-1)
     153        andc r1, r9, r0
     154        /*
     155         * We are now in a environment that is totally independent from
     156         * bootloader setup.
    128157         */
    129158    /* pass result of 'save_boot_params' to 'boot_card' in R3 */
    130159        bl      boot_card
     
    161190        .globl  _return_to_ppcbug
    162191        .type   _return_to_ppcbug,@function
    163192
    164 
    165193_return_to_ppcbug:
    166194        mflr    r30
    167195        bl      MMUoff
  • startup/bspstart.c

    diff -Naur mvme5500.orig/startup/bspstart.c mvme5500/startup/bspstart.c
    old new  
    5656#include <rtems/score/wkspace.h>
    5757
    5858extern uint32_t probeMemoryEnd(void); /* from shared/startup/probeMemoryEnd.c */
    59 
    60 
    6159BSP_output_char_function_type BSP_output_char = BSP_output_char_via_serial;
    6260
    6361extern void _return_to_ppcbug(void);
     
    7068
    7169extern unsigned char ReadConfVPD_buff(int offset);
    7270
    73 extern unsigned long __bss_start[], __SBSS_START__[], __SBSS_END__[];
    74 extern unsigned long __SBSS2_START__[], __SBSS2_END__[];
    75 
    7671uint32_t bsp_clicks_per_usec;
    7772
    78 SPR_RW(SPRG1)
    79 
    8073typedef struct CmdLineRec_ {
    8174    unsigned long  size;
    8275    char           buf[0];
     
    133126  __asm__ __volatile ("sc");
    134127}
    135128
    136 void zero_bss(void)
    137 {
    138   memset(
    139     __SBSS_START__,
    140     0,
    141     ((unsigned) __SBSS_END__) - ((unsigned)__SBSS_START__)
    142   );
    143   memset(
    144     __SBSS2_START__,
    145     0,
    146     ((unsigned) __SBSS2_END__) - ((unsigned)__SBSS2_START__)
    147   );
    148   memset(
    149     __bss_start,
    150     0,
    151     ((unsigned) __rtems_end) - ((unsigned)__bss_start)
    152   );
    153 }
    154 
    155129/* NOTE: we cannot simply malloc the commandline string;
    156130 * save_boot_params() is called during a very early stage when
    157131 * libc/malloc etc. are not yet initialized!
     
    293267  printk("-----------------------------------------\n");
    294268
    295269  BSP_mem_size         =  probeMemoryEnd();
     270
    296271  /* TODO: calculate the BSP_bus_frequency using the REF_CLK bit
    297272   *       of System Status  register
    298273   */
     
    302277  /* P94 : 7455 clocks the TB/DECR at 1/4 of the system bus clock frequency */
    303278  BSP_time_base_divisor      = 4000;
    304279
    305 
    306280  /* Maybe not setup yet becuase of the warning message */
    307281  /* Allocate and set up the page table mappings
    308282   * This is only available on >604 CPUs.
  • vme/VMEConfig.h

    diff -Naur mvme5500.orig/vme/VMEConfig.h mvme5500/vme/VMEConfig.h
    old new  
    11#ifndef RTEMS_BSP_VME_CONFIG_H
    22#define RTEMS_BSP_VME_CONFIG_H
    3 /* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04  */
     3/* VMEConfig.h, S. Kate Feng modified it for MVME5500 3/04
     4 *
     5 * May 2011 : Use the VME shared IRQ handlers.
     6 *
     7 * It seems that the implementation of VMEUNIVERSE_IRQ_MGR_FLAG_PW_WORKAROUND
     8 * is not fully developed. The UNIV_REGOFF_VCSR_BS is defined for VME64
     9 * specification, which does not apply to a VME32 crate. In order to avoid
     10 * spurious VME interrupts, a better and more universal solution is
     11 * to flush the vmeUniverse FIFO by reading a register back within the
     12 * users' Interrupt Service Routine (ISR)  before returning.
     13 *
     14 * Some devices might require the ISR to issue an interrupt status READ
     15 * after its IRQ is cleared, but before its corresponding interrupt
     16 * is enabled again.
     17 *
     18 */
    419/* BSP specific address space configuration parameters */
    520
    6 /*
     21/* 
    722 * The BSP maps VME address ranges into
    823 * one BAT.
    924 * NOTE: the BSP (startup/bspstart.c) uses
     
    1126 * layout:
    1227 */
    1328#define _VME_A32_WIN0_ON_PCI            0x90000000
     29/* If _VME_CSR_ON_PCI is defined then the A32 window is reduced to accommodate
     30 * CSR for space.
     31 */
     32#define _VME_CSR_ON_PCI                 0x9e000000
    1433#define _VME_A24_ON_PCI                 0x9f000000
    1534#define _VME_A16_ON_PCI                 0x9fff0000
    1635
     
    3049
    3150#define BSP_VME_UNIVERSE_INSTALL_IRQ_MGR(err)                   \
    3251        do {                                                                                    \
    33                 err = vmeUniverseInstallIrqMgr(0,64+12,1,64+13);        \
     52          err = vmeUniverseInstallIrqMgrAlt(VMEUNIVERSE_IRQ_MGR_FLAG_SHARED,\
     53             0, BSP_GPP_VME_VLINT0, \         
     54             1, BSP_GPP_VME_VLINT1, \         
     55             2, BSP_GPP_VME_VLINT2, \       
     56             3, BSP_GPP_VME_VLINT3, \
     57             -1 /* terminate list  */);  \             
    3458        } while (0)
    3559
    3660#endif