1 | Index: c/src/lib/libbsp/m68k/uC5282/clock/clock.c |
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2 | =================================================================== |
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3 | RCS file: /usr1/CVS/rtems/c/src/lib/libbsp/m68k/uC5282/clock/clock.c,v |
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4 | retrieving revision 1.16 |
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5 | diff -c -r1.16 clock.c |
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6 | *** c/src/lib/libbsp/m68k/uC5282/clock/clock.c 26 Aug 2009 13:32:22 -0000 1.16 |
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7 | --- c/src/lib/libbsp/m68k/uC5282/clock/clock.c 22 Feb 2011 18:09:34 -0000 |
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8 | *************** |
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9 | *** 26,44 **** |
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10 | * CPU load counters |
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11 | * Place in static RAM so updates don't hit the SDRAM |
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12 | */ |
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13 | ! extern int __SRAMBASE[]; |
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14 | ! #define IDLE_COUNTER __SRAMBASE[0] |
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15 | ! #define FILTERED_IDLE __SRAMBASE[1] |
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16 | ! #define MAX_IDLE_COUNT __SRAMBASE[2] |
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17 | ! #define USEC_PER_TICK __SRAMBASE[3] |
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18 | #define FILTER_SHIFT 6 |
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19 | |
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20 | uint32_t bsp_clock_nanoseconds_since_last_tick(void) |
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21 | { |
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22 | int i = MCF5282_PIT3_PCNTR; |
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23 | if (MCF5282_PIT3_PCSR & MCF5282_PIT_PCSR_PIF) |
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24 | ! i = MCF5282_PIT3_PCNTR - USEC_PER_TICK; |
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25 | ! return (USEC_PER_TICK - i) * 1000; |
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26 | } |
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27 | |
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28 | #define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick |
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29 | --- 26,44 ---- |
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30 | * CPU load counters |
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31 | * Place in static RAM so updates don't hit the SDRAM |
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32 | */ |
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33 | ! #define IDLE_COUNTER __SRAMBASE.idle_counter |
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34 | ! #define FILTERED_IDLE __SRAMBASE.filtered_idle |
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35 | ! #define MAX_IDLE_COUNT __SRAMBASE.max_idle_count |
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36 | ! #define PITC_PER_TICK __SRAMBASE.pitc_per_tick |
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37 | ! #define NSEC_PER_PITC __SRAMBASE.nsec_per_pitc |
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38 | #define FILTER_SHIFT 6 |
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39 | |
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40 | uint32_t bsp_clock_nanoseconds_since_last_tick(void) |
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41 | { |
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42 | int i = MCF5282_PIT3_PCNTR; |
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43 | if (MCF5282_PIT3_PCSR & MCF5282_PIT_PCSR_PIF) |
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44 | ! i = MCF5282_PIT3_PCNTR - PITC_PER_TICK; |
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45 | ! return (PITC_PER_TICK - i) * NSEC_PER_PITC; |
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46 | } |
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47 | |
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48 | #define Clock_driver_nanoseconds_since_last_tick bsp_clock_nanoseconds_since_last_tick |
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49 | *************** |
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50 | *** 48,54 **** |
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51 | */ |
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52 | #define Clock_driver_support_at_tick() \ |
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53 | do { \ |
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54 | ! int idle = IDLE_COUNTER; \ |
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55 | IDLE_COUNTER = 0; \ |
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56 | if (idle > MAX_IDLE_COUNT) \ |
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57 | MAX_IDLE_COUNT = idle; \ |
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58 | --- 48,54 ---- |
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59 | */ |
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60 | #define Clock_driver_support_at_tick() \ |
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61 | do { \ |
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62 | ! unsigned idle = IDLE_COUNTER; \ |
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63 | IDLE_COUNTER = 0; \ |
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64 | if (idle > MAX_IDLE_COUNT) \ |
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65 | MAX_IDLE_COUNT = idle; \ |
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66 | *************** |
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67 | *** 75,94 **** |
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68 | /* |
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69 | * Set up the clock hardware |
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70 | * |
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71 | ! * Prescale so that it counts in microseconds |
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72 | ! * System clock frequency better be 2**n (1<=n<=16) MHz! |
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73 | */ |
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74 | #define Clock_driver_support_initialize_hardware() \ |
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75 | do { \ |
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76 | int level; \ |
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77 | ! int preScaleCode = -2; \ |
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78 | ! int preScaleDivisor = bsp_get_CPU_clock_speed() / 1000000; \ |
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79 | ! while (preScaleDivisor) { \ |
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80 | ! preScaleDivisor >>= 1; \ |
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81 | ! preScaleCode++; \ |
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82 | ! } \ |
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83 | ! IDLE_COUNTER = 0; \ |
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84 | ! FILTERED_IDLE = 0; \ |
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85 | MAX_IDLE_COUNT = 0; \ |
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86 | bsp_allocate_interrupt(PIT3_IRQ_LEVEL, PIT3_IRQ_PRIORITY); \ |
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87 | MCF5282_INTC0_ICR58 = MCF5282_INTC_ICR_IL(PIT3_IRQ_LEVEL) | \ |
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88 | --- 75,105 ---- |
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89 | /* |
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90 | * Set up the clock hardware |
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91 | * |
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92 | ! * f_pit = f_clk / 2^(preScaleCode+1) / N = 1/(us_per_tick/us_per_s) |
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93 | ! * |
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94 | ! * N = f_clk / 2^(preScaleCode+1) * us_per_tick / us_per_s |
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95 | ! * |
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96 | ! * ns_per_pit_clk = ns_per_s / (f_clk / 2^(preScaleCode+1)) |
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97 | ! * = ns_per_s * 2^(preScaleCode+1) / f_clk; |
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98 | */ |
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99 | #define Clock_driver_support_initialize_hardware() \ |
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100 | do { \ |
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101 | + unsigned long long N; \ |
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102 | int level; \ |
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103 | ! int preScaleCode = 0; \ |
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104 | ! N = bsp_get_CPU_clock_speed(); \ |
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105 | ! N *= rtems_configuration_get_microseconds_per_tick(); \ |
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106 | ! N /= 2*1000000; /* min_prescale * us_per_s */ \ |
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107 | ! while ( N > 0x10000 ) { \ |
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108 | ! preScaleCode++; \ |
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109 | ! N >>= 1; \ |
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110 | ! } \ |
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111 | ! PITC_PER_TICK = N; \ |
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112 | ! N = 2000000000ULL << preScaleCode; \ |
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113 | ! N /= bsp_get_CPU_clock_speed(); \ |
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114 | ! NSEC_PER_PITC = N; \ |
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115 | ! IDLE_COUNTER = 0; \ |
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116 | ! FILTERED_IDLE = 0; \ |
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117 | MAX_IDLE_COUNT = 0; \ |
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118 | bsp_allocate_interrupt(PIT3_IRQ_LEVEL, PIT3_IRQ_PRIORITY); \ |
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119 | MCF5282_INTC0_ICR58 = MCF5282_INTC_ICR_IL(PIT3_IRQ_LEVEL) | \ |
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120 | *************** |
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121 | *** 101,108 **** |
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122 | MCF5282_PIT_PCSR_OVW | \ |
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123 | MCF5282_PIT_PCSR_PIE | \ |
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124 | MCF5282_PIT_PCSR_RLD; \ |
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125 | ! USEC_PER_TICK = rtems_configuration_get_microseconds_per_tick(); \ |
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126 | ! MCF5282_PIT3_PMR = USEC_PER_TICK - 1; \ |
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127 | MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) | \ |
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128 | MCF5282_PIT_PCSR_PIE | \ |
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129 | MCF5282_PIT_PCSR_RLD | \ |
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130 | --- 112,118 ---- |
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131 | MCF5282_PIT_PCSR_OVW | \ |
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132 | MCF5282_PIT_PCSR_PIE | \ |
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133 | MCF5282_PIT_PCSR_RLD; \ |
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134 | ! MCF5282_PIT3_PMR = PITC_PER_TICK - 1; \ |
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135 | MCF5282_PIT3_PCSR = MCF5282_PIT_PCSR_PRE(preScaleCode) | \ |
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136 | MCF5282_PIT_PCSR_PIE | \ |
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137 | MCF5282_PIT_PCSR_RLD | \ |
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138 | *************** |
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139 | *** 115,121 **** |
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140 | Thread bsp_idle_thread(uint32_t ignored) |
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141 | { |
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142 | for(;;) |
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143 | ! asm volatile ("addq.l #1,__SRAMBASE"); /* Atomic increment */ |
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144 | } |
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145 | |
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146 | int rtems_bsp_cpu_load_percentage(void) |
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147 | --- 125,131 ---- |
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148 | Thread bsp_idle_thread(uint32_t ignored) |
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149 | { |
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150 | for(;;) |
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151 | ! asm volatile ("addq.l #1,%0"::"m"(IDLE_COUNTER)); /* Atomic increment */ |
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152 | } |
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153 | |
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154 | int rtems_bsp_cpu_load_percentage(void) |
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155 | Index: c/src/lib/libbsp/m68k/uC5282/include/bsp.h |
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156 | =================================================================== |
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157 | RCS file: /usr1/CVS/rtems/c/src/lib/libbsp/m68k/uC5282/include/bsp.h,v |
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158 | retrieving revision 1.25 |
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159 | diff -c -r1.25 bsp.h |
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160 | *** c/src/lib/libbsp/m68k/uC5282/include/bsp.h 29 Nov 2009 14:59:41 -0000 1.25 |
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161 | --- c/src/lib/libbsp/m68k/uC5282/include/bsp.h 22 Feb 2011 18:09:34 -0000 |
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162 | *************** |
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163 | *** 134,139 **** |
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164 | --- 134,164 ---- |
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165 | void *bsp_idle_thread( uintptr_t ignored ); |
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166 | #define BSP_IDLE_TASK_BODY bsp_idle_thread |
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167 | |
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168 | + /* |
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169 | + * SRAM. The BSP uses SRAM for maintaining some clock-driver data |
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170 | + * and for ethernet descriptors (and the initial stack during |
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171 | + * early boot). |
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172 | + */ |
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173 | + |
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174 | + typedef struct mcf5282BufferDescriptor_ { |
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175 | + volatile uint16_t status; |
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176 | + uint16_t length; |
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177 | + volatile void *buffer; |
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178 | + } mcf5282BufferDescriptor_t; |
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179 | + |
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180 | + extern struct { |
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181 | + uint32_t idle_counter; |
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182 | + uint32_t filtered_idle; |
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183 | + uint32_t max_idle_count; |
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184 | + uint32_t pitc_per_tick; |
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185 | + uint32_t nsec_per_pitc; |
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186 | + uint32_t pad[3]; /* align to 16-bytes for descriptors */ |
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187 | + mcf5282BufferDescriptor_t fec_descriptors[]; |
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188 | + /* buffer descriptors are allocated from here */ |
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189 | + |
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190 | + /* initial stack is at top of SRAM (start.S) */ |
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191 | + } __SRAMBASE; |
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192 | + |
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193 | #ifdef __cplusplus |
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194 | } |
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195 | #endif |
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196 | Index: c/src/lib/libbsp/m68k/uC5282/network/network.c |
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197 | =================================================================== |
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198 | RCS file: /usr1/CVS/rtems/c/src/lib/libbsp/m68k/uC5282/network/network.c,v |
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199 | retrieving revision 1.30 |
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200 | diff -c -r1.30 network.c |
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201 | *** c/src/lib/libbsp/m68k/uC5282/network/network.c 27 Apr 2010 18:23:44 -0000 1.30 |
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202 | --- c/src/lib/libbsp/m68k/uC5282/network/network.c 22 Feb 2011 18:09:35 -0000 |
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203 | *************** |
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204 | *** 81,92 **** |
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205 | #error "Driver must have MCLBYTES > RBUF_SIZE" |
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206 | #endif |
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207 | |
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208 | - typedef struct mcf5282BufferDescriptor_ { |
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209 | - volatile uint16_t status; |
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210 | - uint16_t length; |
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211 | - volatile void *buffer; |
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212 | - } mcf5282BufferDescriptor_t; |
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213 | - |
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214 | /* |
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215 | * Per-device data |
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216 | */ |
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217 | --- 81,86 ---- |
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218 | *************** |
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219 | *** 197,207 **** |
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220 | * Ensure 128-bit (16-byte) alignment |
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221 | * Allow some space at the beginning for other diagnostic counters |
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222 | */ |
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223 | - extern char __SRAMBASE[]; |
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224 | static mcf5282BufferDescriptor_t * |
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225 | mcf5282_bd_allocate(unsigned int count) |
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226 | { |
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227 | ! static mcf5282BufferDescriptor_t *bdp = (mcf5282BufferDescriptor_t *)(__SRAMBASE+16); |
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228 | mcf5282BufferDescriptor_t *p = bdp; |
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229 | |
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230 | bdp += count; |
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231 | --- 191,200 ---- |
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232 | * Ensure 128-bit (16-byte) alignment |
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233 | * Allow some space at the beginning for other diagnostic counters |
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234 | */ |
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235 | static mcf5282BufferDescriptor_t * |
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236 | mcf5282_bd_allocate(unsigned int count) |
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237 | { |
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238 | ! static mcf5282BufferDescriptor_t *bdp = __SRAMBASE.fec_descriptors; |
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239 | mcf5282BufferDescriptor_t *p = bdp; |
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240 | |
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241 | bdp += count; |
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