1 | Index: c/src/lib/libcpu/bfin/ChangeLog |
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2 | =================================================================== |
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3 | RCS file: /usr1/CVS/rtems/c/src/lib/libcpu/bfin/ChangeLog,v |
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4 | retrieving revision 1.13 |
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5 | diff -c -3 -p -r1.13 ChangeLog |
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6 | *** c/src/lib/libcpu/bfin/ChangeLog 11 Dec 2009 04:15:58 -0000 1.13 |
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7 | --- c/src/lib/libcpu/bfin/ChangeLog 10 Jan 2010 22:12:55 -0000 |
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8 | *************** |
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9 | *** 1,3 **** |
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10 | --- 1,10 ---- |
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11 | + 2010-01-10 Allan Hessenflow <allanh@kallisti.com |
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12 | + |
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13 | + * serial/spi.c, serial/spi.h: |
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14 | + Fill in skeleton with functional SPI master code. |
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15 | + * include/spiRegs.h: |
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16 | + Correct spi shadow register declaration. |
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17 | + |
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18 | 2009-12-11 Ralf Corsépius <ralf.corsepius@rtems.org> |
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19 | |
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20 | * serial/uart.c: |
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21 | Index: c/src/lib/libcpu/bfin/README |
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22 | =================================================================== |
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23 | RCS file: /usr1/CVS/rtems/c/src/lib/libcpu/bfin/README,v |
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24 | retrieving revision 1.1 |
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25 | diff -c -3 -p -r1.1 README |
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26 | *** c/src/lib/libcpu/bfin/README 15 Aug 2008 20:18:40 -0000 1.1 |
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27 | --- c/src/lib/libcpu/bfin/README 10 Jan 2010 22:12:55 -0000 |
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28 | *************** It is assumed that bsp.h includes <libcp |
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29 | *** 9,15 **** |
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30 | the processor type. This is how the libcpu modules determine which |
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31 | processor variant they're being built for. |
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32 | |
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33 | ! serial/spi* and serial/sport* are currently just placeholders. |
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34 | ! serial/twi* does not contain enough code to do anything useful; |
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35 | ! it is however a start at an I2C driver. |
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36 | |
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37 | --- 9,15 ---- |
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38 | the processor type. This is how the libcpu modules determine which |
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39 | processor variant they're being built for. |
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40 | |
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41 | ! serial/sport* is currently just a placeholders. serial/twi* does not |
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42 | ! contain enough code to do anything useful; it is however a start at an |
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43 | ! I2C driver. |
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44 | |
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45 | Index: c/src/lib/libcpu/bfin/include/spiRegs.h |
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46 | =================================================================== |
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47 | RCS file: /usr1/CVS/rtems/c/src/lib/libcpu/bfin/include/spiRegs.h,v |
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48 | retrieving revision 1.1 |
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49 | diff -c -3 -p -r1.1 spiRegs.h |
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50 | *** c/src/lib/libcpu/bfin/include/spiRegs.h 15 Aug 2008 20:18:41 -0000 1.1 |
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51 | --- c/src/lib/libcpu/bfin/include/spiRegs.h 10 Jan 2010 22:12:55 -0000 |
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52 | *************** |
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53 | *** 22,28 **** |
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54 | #define SPI_TDBR_OFFSET 0x000c |
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55 | #define SPI_RDBR_OFFSET 0x0010 |
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56 | #define SPI_BAUD_OFFSET 0x0014 |
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57 | ! #define SPI_SHADOW 0x0018 |
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58 | |
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59 | |
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60 | /* register fields */ |
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61 | --- 22,28 ---- |
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62 | #define SPI_TDBR_OFFSET 0x000c |
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63 | #define SPI_RDBR_OFFSET 0x0010 |
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64 | #define SPI_BAUD_OFFSET 0x0014 |
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65 | ! #define SPI_SHADOW_OFFSET 0x0018 |
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66 | |
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67 | |
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68 | /* register fields */ |
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69 | Index: c/src/lib/libcpu/bfin/serial/spi.c |
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70 | =================================================================== |
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71 | RCS file: /usr1/CVS/rtems/c/src/lib/libcpu/bfin/serial/spi.c,v |
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72 | retrieving revision 1.2 |
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73 | diff -c -3 -p -r1.2 spi.c |
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74 | *** c/src/lib/libcpu/bfin/serial/spi.c 30 Nov 2009 05:03:49 -0000 1.2 |
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75 | --- c/src/lib/libcpu/bfin/serial/spi.c 10 Jan 2010 22:12:55 -0000 |
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76 | *************** |
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77 | *** 1,8 **** |
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78 | - /* placeholder (just a shell) */ |
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79 | - |
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80 | /* SPI driver for Blackfin |
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81 | * |
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82 | ! * Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA |
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83 | * written by Allan Hessenflow <allanh@kallisti.com> |
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84 | * |
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85 | * The license and distribution terms for this file may be |
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86 | --- 1,6 ---- |
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87 | /* SPI driver for Blackfin |
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88 | * |
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89 | ! * Copyright (c) 2010 Kallisti Labs, Los Gatos, CA, USA |
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90 | * written by Allan Hessenflow <allanh@kallisti.com> |
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91 | * |
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92 | * The license and distribution terms for this file may be |
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93 | *************** |
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94 | *** 12,109 **** |
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95 | * $Id: spi.c,v 1.2 2009/11/30 05:03:49 ralf Exp $ |
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96 | */ |
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97 | |
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98 | - |
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99 | #include <stdlib.h> |
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100 | ! #include <rtems.h> |
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101 | #include <rtems/libi2c.h> |
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102 | - |
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103 | #include <libcpu/spiRegs.h> |
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104 | #include "spi.h" |
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105 | |
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106 | |
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107 | ! static rtems_status_code spiInit(rtems_libi2c_bus_t *bus) { |
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108 | ! bfin_spi_softc_t *softc; |
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109 | ! rtems_status_code status; |
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110 | |
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111 | ! softc = &(((bfin_spi_desc_t *)(bus))->softc); |
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112 | ! |
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113 | ! status = rtems_semaphore_create(rtems_build_name('s','p','i','s'), |
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114 | 0, |
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115 | RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE, |
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116 | 0, |
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117 | ! &softc->irq_sema_id); |
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118 | |
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119 | ! return status; |
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120 | } |
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121 | |
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122 | ! static rtems_status_code spiSendStart(rtems_libi2c_bus_t *bus) { |
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123 | ! bfin_spi_softc_t *softc; |
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124 | ! rtems_status_code status; |
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125 | ! |
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126 | ! status = RTEMS_SUCCESSFUL; |
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127 | ! softc = &(((bfin_spi_desc_t *)(bus))->softc); |
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128 | |
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129 | ! return status; |
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130 | } |
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131 | |
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132 | ! static rtems_status_code spiSendStop(rtems_libi2c_bus_t *bus) { |
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133 | ! bfin_spi_softc_t *softc; |
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134 | ! rtems_status_code status; |
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135 | |
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136 | ! status = RTEMS_SUCCESSFUL; |
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137 | ! softc = &(((bfin_spi_desc_t *)(bus))->softc); |
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138 | ! |
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139 | ! return status; |
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140 | } |
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141 | |
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142 | ! static rtems_status_code spiSendAddr(rtems_libi2c_bus_t *bus, |
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143 | ! uint32_t addr, int rw) { |
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144 | ! bfin_spi_softc_t *softc; |
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145 | ! rtems_status_code status; |
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146 | ! |
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147 | ! status = RTEMS_SUCCESSFUL; |
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148 | ! softc = &(((bfin_spi_desc_t *)(bus))->softc); |
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149 | |
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150 | ! return status; |
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151 | } |
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152 | |
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153 | ! static int spiReadBytes(rtems_libi2c_bus_t *bus, |
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154 | ! unsigned char *buf, int len) { |
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155 | ! bfin_spi_softc_t *softc; |
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156 | |
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157 | ! softc = &(((bfin_spi_desc_t *)(bus))->softc); |
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158 | |
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159 | ! return 0; |
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160 | } |
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161 | |
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162 | - static int spiWriteBytes(rtems_libi2c_bus_t *bus, |
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163 | - unsigned char *buf, int len) { |
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164 | - bfin_spi_softc_t *softc; |
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165 | - |
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166 | - softc = &(((bfin_spi_desc_t *)(bus))->softc); |
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167 | - |
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168 | - return 0; |
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169 | - } |
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170 | - |
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171 | - static int spiIoctl(rtems_libi2c_bus_t *bus, int cmd, void *arg) { |
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172 | - bfin_spi_softc_t *softc; |
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173 | - |
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174 | - softc = &(((bfin_spi_desc_t *)(bus))->softc); |
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175 | - |
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176 | - |
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177 | - return 0; |
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178 | - } |
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179 | - |
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180 | - void bfin_spi_isr(int source) { |
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181 | - } |
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182 | - |
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183 | - rtems_libi2c_bus_ops_t bfin_spi_libi2c_bus_ops = { |
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184 | - init: spiInit, |
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185 | - send_start: spiSendStart, |
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186 | - send_stop: spiSendStop, |
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187 | - send_addr: spiSendAddr, |
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188 | - read_bytes: spiReadBytes, |
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189 | - write_bytes: spiWriteBytes, |
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190 | - ioctl: spiIoctl |
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191 | - }; |
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192 | - |
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193 | --- 10,242 ---- |
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194 | * $Id: spi.c,v 1.2 2009/11/30 05:03:49 ralf Exp $ |
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195 | */ |
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196 | |
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197 | #include <stdlib.h> |
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198 | ! #include <bsp.h> |
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199 | ! #include <rtems/error.h> |
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200 | ! #include <rtems/bspIo.h> |
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201 | ! #include <errno.h> |
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202 | #include <rtems/libi2c.h> |
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203 | #include <libcpu/spiRegs.h> |
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204 | #include "spi.h" |
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205 | |
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206 | |
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207 | ! #ifndef BFIN_REG16 |
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208 | ! #define BFIN_REG16(base, offset) \ |
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209 | ! (*((uint16_t volatile *) ((uint8_t *)(base) + (offset)))) |
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210 | ! #endif |
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211 | ! |
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212 | ! |
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213 | ! static bfin_spi_state_t *bfin_spi; |
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214 | ! |
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215 | ! |
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216 | ! void bfin_spi_isr(int v) { |
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217 | ! bfin_spi_state_t *state; |
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218 | ! uint16_t r; |
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219 | ! |
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220 | ! state = bfin_spi; |
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221 | ! if (state->len > state->bytes_per_word) { |
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222 | ! if (state->wr_ptr) { |
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223 | ! if (state->bytes_per_word == 2) |
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224 | ! r = *(uint16_t *) state->wr_ptr; |
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225 | ! else |
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226 | ! r = (uint16_t) *state->wr_ptr; |
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227 | ! state->wr_ptr += state->bytes_per_word; |
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228 | ! } else |
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229 | ! r = state->idle_pattern; |
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230 | ! BFIN_REG16(state->base, SPI_TDBR_OFFSET) = r; |
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231 | ! } |
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232 | ! state->len -= state->bytes_per_word; |
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233 | ! if (state->len <= 0) { |
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234 | ! /* |
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235 | ! The transfers are done, so I don't want to kick off another |
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236 | ! transfer or get any more interrupts. Reading the last word from |
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237 | ! SPI_SHADOW instead of SPI_RDBR should prevent it from triggering |
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238 | ! another transfer, but that doesn't clear the interrupt flag. I |
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239 | ! could mask the interrupt in the SIC, but that would preclude ever |
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240 | ! using the DMA channel that shares the interrupt independently (and |
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241 | ! they might just share it with something more important in some other |
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242 | ! member of the Blackfin family). And who knows what problems it |
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243 | ! might cause in this code potentially dealing with that still pended |
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244 | ! interrupt at the beginning of the next transfer. |
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245 | ! |
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246 | ! So instead I disable the SPI interface, read the data from RDBR |
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247 | ! (thus clearing the interrupt but not triggering another transfer |
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248 | ! since the interface is disabled), then re-eanble the interface. |
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249 | ! This has the problem that the bf537 tri-states the SPI signals |
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250 | ! while the interface is disabled. Either adding pull-ups on at |
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251 | ! least the chip select signals, or using GPIOs for them so they're |
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252 | ! not controlled by the SPI module, would be correct fixes for that |
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253 | ! (really pull-ups/downs should be added to the SPI CLK and MOSI |
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254 | ! signals as well to insure they cannot float into some region that |
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255 | ! causes input structures to consume excessive power). Or they can |
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256 | ! all be left alone, assuming that there's enough capacitance on the |
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257 | ! lines to prevent any problems for the short time they're being left |
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258 | ! disabled. |
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259 | ! |
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260 | ! An alternative approach I attempted involved switching TIMOD |
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261 | ! between RDBR and TDBR when starting and finishing a transfer, but |
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262 | ! I didn't get anywhere with that. In my limited testing TIMOD TDBR |
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263 | ! wasn't behaving as I expected it to, but maybe with more |
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264 | ! experimentation I'd find some solution there. However I'm out |
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265 | ! of time for this project, at least for now. |
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266 | ! */ |
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267 | ! |
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268 | ! BFIN_REG16(state->base, SPI_CTL_OFFSET) &= ~SPI_CTL_SPE; |
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269 | ! r = BFIN_REG16(state->base, SPI_RDBR_OFFSET); |
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270 | ! BFIN_REG16(state->base, SPI_CTL_OFFSET) |= SPI_CTL_SPE; |
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271 | ! rtems_semaphore_release(state->sem); |
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272 | ! } else |
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273 | ! r = BFIN_REG16(state->base, SPI_RDBR_OFFSET); |
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274 | ! |
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275 | ! if (state->rd_ptr) { |
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276 | ! if (state->bytes_per_word == 2) |
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277 | ! *(uint16_t *) state->rd_ptr = r; |
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278 | ! else |
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279 | ! *state->rd_ptr = (uint8_t) r; |
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280 | ! state->rd_ptr += state->bytes_per_word; |
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281 | ! } |
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282 | ! } |
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283 | ! |
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284 | ! static rtems_status_code setTFRMode(rtems_libi2c_bus_t *bus, |
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285 | ! const rtems_libi2c_tfr_mode_t *tfrMode) { |
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286 | ! rtems_status_code result; |
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287 | ! bfin_spi_state_t *state; |
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288 | ! uint32_t divisor; |
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289 | ! uint16_t ctrl; |
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290 | ! |
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291 | ! result = RTEMS_SUCCESSFUL; |
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292 | ! state = &((bfin_spi_bus_t *) bus)->p; |
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293 | ! |
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294 | ! if (result == RTEMS_SUCCESSFUL) { |
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295 | ! if (tfrMode->bits_per_char != 8 && |
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296 | ! tfrMode->bits_per_char != 16) |
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297 | ! result = RTEMS_INVALID_NUMBER; |
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298 | ! if (tfrMode->baudrate <= 0) |
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299 | ! result = RTEMS_INVALID_NUMBER; |
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300 | ! } |
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301 | ! if (result == RTEMS_SUCCESSFUL) { |
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302 | ! divisor = (SCLK / 2 + tfrMode->baudrate - 1) / |
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303 | ! tfrMode->baudrate; |
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304 | ! if (divisor < 2) |
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305 | ! divisor = 2; |
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306 | ! else if (divisor > 65535) |
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307 | ! result = RTEMS_INVALID_NUMBER; |
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308 | ! } |
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309 | ! if (result == RTEMS_SUCCESSFUL) { |
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310 | ! state->idle_pattern = (uint16_t) tfrMode->idle_char; |
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311 | ! state->bytes_per_word = (tfrMode->bits_per_char > 8) ? 2 : 1; |
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312 | ! BFIN_REG16(state->base, SPI_BAUD_OFFSET) = divisor; |
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313 | ! ctrl = BFIN_REG16(state->base, SPI_CTL_OFFSET); |
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314 | ! if (tfrMode->lsb_first) |
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315 | ! ctrl |= SPI_CTL_LSBF; |
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316 | ! else |
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317 | ! ctrl &= ~SPI_CTL_LSBF; |
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318 | ! if (tfrMode->bits_per_char > 8) |
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319 | ! ctrl |= SPI_CTL_SIZE; |
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320 | ! else |
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321 | ! ctrl &= ~SPI_CTL_SIZE; |
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322 | ! if (tfrMode->clock_inv) |
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323 | ! ctrl |= SPI_CTL_CPOL; |
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324 | ! else |
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325 | ! ctrl &= ~SPI_CTL_CPOL; |
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326 | ! if (tfrMode->clock_phs) |
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327 | ! ctrl |= SPI_CTL_CPHA; |
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328 | ! else |
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329 | ! ctrl &= ~SPI_CTL_CPHA; |
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330 | ! BFIN_REG16(state->base, SPI_CTL_OFFSET) = ctrl; |
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331 | ! } |
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332 | ! |
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333 | ! return result; |
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334 | ! } |
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335 | ! |
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336 | ! static int readWrite(rtems_libi2c_bus_t *bus, uint8_t *rdBuf, |
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337 | ! const uint8_t *wrBuf, int len) { |
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338 | ! rtems_status_code result; |
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339 | ! bfin_spi_state_t *state; |
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340 | ! uint16_t r; |
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341 | ! |
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342 | ! result = RTEMS_SUCCESSFUL; |
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343 | ! state = &((bfin_spi_bus_t *) bus)->p; |
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344 | ! |
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345 | ! if (len) { |
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346 | ! state->rd_ptr = rdBuf; |
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347 | ! state->wr_ptr = wrBuf; |
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348 | ! state->len = len; |
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349 | ! if (state->wr_ptr) { |
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350 | ! if (state->bytes_per_word == 2) |
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351 | ! r = *(uint16_t *) state->wr_ptr; |
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352 | ! else |
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353 | ! r = (uint16_t) *state->wr_ptr; |
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354 | ! state->wr_ptr += state->bytes_per_word; |
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355 | ! } else |
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356 | ! r = state->idle_pattern; |
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357 | ! BFIN_REG16(state->base, SPI_TDBR_OFFSET) = r; |
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358 | ! BFIN_REG16(state->base, SPI_RDBR_OFFSET); /* trigger */ |
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359 | ! /* wait until done */ |
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360 | ! do { |
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361 | ! result = rtems_semaphore_obtain(state->sem, RTEMS_WAIT, 100); |
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362 | ! } while (result == RTEMS_SUCCESSFUL && state->len > 0); |
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363 | ! } |
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364 | ! |
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365 | ! return (result == RTEMS_SUCCESSFUL) ? len : -result; |
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366 | ! } |
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367 | ! |
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368 | ! |
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369 | ! rtems_status_code bfin_spi_init(rtems_libi2c_bus_t *bus) { |
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370 | ! rtems_status_code result; |
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371 | ! bfin_spi_state_t *state; |
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372 | ! |
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373 | ! state = &((bfin_spi_bus_t *) bus)->p; |
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374 | ! |
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375 | ! BFIN_REG16(state->base, SPI_CTL_OFFSET) = SPI_CTL_SPE | |
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376 | ! SPI_CTL_MSTR | |
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377 | ! SPI_CTL_CPHA | |
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378 | ! SPI_CTL_TIMOD_RDBR; |
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379 | |
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380 | ! result = rtems_semaphore_create(rtems_build_name('s','p','i','s'), |
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381 | 0, |
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382 | RTEMS_FIFO | RTEMS_SIMPLE_BINARY_SEMAPHORE, |
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383 | 0, |
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384 | ! &state->sem); |
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385 | ! if (result == RTEMS_SUCCESSFUL) |
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386 | ! bfin_spi = state; /* for isr */ |
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387 | |
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388 | ! return result; |
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389 | } |
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390 | |
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391 | ! rtems_status_code bfin_spi_send_start(rtems_libi2c_bus_t *bus) { |
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392 | |
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393 | ! return RTEMS_SUCCESSFUL; |
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394 | } |
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395 | |
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396 | ! int bfin_spi_read_bytes(rtems_libi2c_bus_t *bus, unsigned char *buf, int len) { |
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397 | |
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398 | ! return readWrite(bus, buf, NULL, len); |
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399 | } |
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400 | |
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401 | ! int bfin_spi_write_bytes(rtems_libi2c_bus_t *bus, unsigned char *buf, int len) { |
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402 | |
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403 | ! return readWrite(bus, NULL, buf, len); |
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404 | } |
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405 | |
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406 | ! int bfin_spi_ioctl(rtems_libi2c_bus_t *bus, int cmd, void *arg) { |
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407 | ! int result; |
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408 | |
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409 | ! result = -RTEMS_NOT_DEFINED; |
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410 | ! switch(cmd) { |
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411 | ! case RTEMS_LIBI2C_IOCTL_SET_TFRMODE: |
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412 | ! result = -setTFRMode(bus, (const rtems_libi2c_tfr_mode_t *) arg); |
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413 | ! break; |
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414 | ! case RTEMS_LIBI2C_IOCTL_READ_WRITE: |
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415 | ! result = readWrite(bus, |
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416 | ! ((rtems_libi2c_read_write_t *) arg)->rd_buf, |
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417 | ! ((rtems_libi2c_read_write_t *) arg)->wr_buf, |
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418 | ! ((rtems_libi2c_read_write_t *) arg)->byte_cnt); |
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419 | ! break; |
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420 | ! default: |
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421 | ! break; |
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422 | ! } |
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423 | |
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424 | ! return result; |
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425 | } |
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426 | |
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427 | Index: c/src/lib/libcpu/bfin/serial/spi.h |
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428 | =================================================================== |
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429 | RCS file: /usr1/CVS/rtems/c/src/lib/libcpu/bfin/serial/spi.h,v |
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430 | retrieving revision 1.3 |
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431 | diff -c -3 -p -r1.3 spi.h |
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432 | *** c/src/lib/libcpu/bfin/serial/spi.h 30 Nov 2009 05:03:49 -0000 1.3 |
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433 | --- c/src/lib/libcpu/bfin/serial/spi.h 10 Jan 2010 22:12:55 -0000 |
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434 | *************** |
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435 | *** 1,9 **** |
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436 | - /* placeholder (just a shell) */ |
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437 | - |
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438 | /* |
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439 | * RTEMS driver for Blackfin SPI |
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440 | * |
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441 | ! * COPYRIGHT (c) 2008 Kallisti Labs, Los Gatos, CA, USA |
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442 | * written by Allan Hessenflow <allanh@kallisti.com> |
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443 | * |
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444 | * The license and distribution terms for this file may be |
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445 | --- 1,7 ---- |
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446 | /* |
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447 | * RTEMS driver for Blackfin SPI |
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448 | * |
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449 | ! * COPYRIGHT (c) 2010 Kallisti Labs, Los Gatos, CA, USA |
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450 | * written by Allan Hessenflow <allanh@kallisti.com> |
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451 | * |
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452 | * The license and distribution terms for this file may be |
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453 | *************** |
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454 | *** 13,52 **** |
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455 | * $Id: spi.h,v 1.3 2009/11/30 05:03:49 ralf Exp $ |
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456 | */ |
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457 | |
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458 | ! |
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459 | ! #ifndef _spi_h_ |
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460 | ! #define _spi_h_ |
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461 | ! |
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462 | |
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463 | #ifdef __cplusplus |
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464 | extern "C" { |
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465 | #endif |
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466 | |
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467 | - |
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468 | typedef struct { |
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469 | ! /* parameters provided by bsp */ |
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470 | ! uint32_t freq; |
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471 | ! void *base; |
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472 | ! bool fast; |
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473 | ! /* internal use */ |
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474 | ! rtems_id irq_sema_id; |
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475 | ! } bfin_spi_softc_t; |
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476 | |
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477 | typedef struct { |
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478 | rtems_libi2c_bus_t bus; |
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479 | ! bfin_spi_softc_t softc; |
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480 | ! } bfin_spi_desc_t; |
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481 | |
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482 | |
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483 | ! extern rtems_libi2c_bus_ops_t bfin_spi_libi2c_bus_ops; |
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484 | |
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485 | |
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486 | ! void bfin_spi_isr(int source); |
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487 | |
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488 | |
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489 | #ifdef __cplusplus |
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490 | } |
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491 | #endif |
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492 | |
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493 | - #endif /* _spi_h_ */ |
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494 | |
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495 | --- 11,55 ---- |
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496 | * $Id: spi.h,v 1.3 2009/11/30 05:03:49 ralf Exp $ |
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497 | */ |
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498 | |
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499 | ! #ifndef _spi_h |
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500 | ! #define _spi_h |
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501 | |
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502 | #ifdef __cplusplus |
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503 | extern "C" { |
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504 | #endif |
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505 | |
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506 | typedef struct { |
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507 | ! void *base; |
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508 | ! /* remaining entries are for internal use */ |
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509 | ! rtems_id sem; |
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510 | ! int bytes_per_word; |
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511 | ! uint16_t idle_pattern; |
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512 | ! uint8_t *rd_ptr; |
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513 | ! const uint8_t *wr_ptr; |
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514 | ! int len; |
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515 | ! } bfin_spi_state_t; |
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516 | |
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517 | typedef struct { |
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518 | rtems_libi2c_bus_t bus; |
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519 | ! bfin_spi_state_t p; |
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520 | ! } bfin_spi_bus_t; |
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521 | ! |
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522 | ! |
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523 | ! void bfin_spi_isr(int v); |
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524 | |
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525 | + rtems_status_code bfin_spi_init(rtems_libi2c_bus_t *bus); |
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526 | |
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527 | ! rtems_status_code bfin_spi_send_start(rtems_libi2c_bus_t *bus); |
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528 | |
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529 | + int bfin_spi_read_bytes(rtems_libi2c_bus_t *bus, unsigned char *buf, int len); |
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530 | |
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531 | ! int bfin_spi_write_bytes(rtems_libi2c_bus_t *bus, unsigned char *buf, int len); |
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532 | |
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533 | + int bfin_spi_ioctl(rtems_libi2c_bus_t *bus, int cmd, void *arg); |
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534 | |
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535 | #ifdef __cplusplus |
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536 | } |
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537 | #endif |
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538 | |
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539 | |
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540 | + #endif /* _spi_h */ |
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