- Timestamp:
-
11/20/14 16:53:44 (9 years ago)
- Author:
-
Joel Sherrill
- Comment:
-
Fx formatting glitch
Legend:
- Unmodified
- Added
- Removed
- Modified
-
v19
|
v20
|
|
6 | 6 | The following table summarizes which CPU architectures are supported by recent RTEMS release branches and the CVS development head. The target CPU and branch number are used in constructing the target name for the GNU tools and RTEMS with the pattern CPU-rtemsBRANCH with the CVS head becoming the 4.9 branch. For example, for the Coldfire CPUs, the '''Target CPU''' is m68k yielding a target name of m68k-rtems4.10 for the target name using RTEMS 4.10 series releases. |
7 | 7 | |
8 | | {| border="1" style="margin: 1em auto 1em auto;text-align: center;" |
9 | | |+ |
10 | 8 | |- |
11 | 9 | |'''Architecture''' || '''Target CPU''' || '''4.6 Branch''' || '''4.7 Branch''' || '''4.8 Branch''' || '''4.9 Branch''' || '''4.10 Branch''' || '''Head''' |
… |
… |
|
59 | 57 | | Texas Instruments C3x/C4x || tic4x || Yes || No || No || No || Yes || No |
60 | 58 | |- |
61 | | |} |
| 59 | |
62 | 60 | |
63 | 61 | = Potential Ports = |
… |
… |
|
80 | 78 | * Hewlett-Packard PA-RISC |
81 | 79 | * Intel i960 |
82 | | * OpenCores OR32 |
| 80 | * OpenCores OR32 (revived) |
83 | 81 | * Texas Instruments C3x/C4x |
84 | 82 | |