- Timestamp:
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03/09/18 23:37:59 (6 years ago)
- Author:
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Amaan Cheval
- Comment:
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Update SMP support status based on docs (https://docs.rtems.org/branches/master/c-user/symmetric_multiprocessing_services.html) and master branch
Legend:
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v10
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v11
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8 | 8 | |
9 | 9 | || '''Architecture''' || '''Target CPU''' || '''RTEMS SMP''' || '''atomic-hardware''' || '''atomic-instruction''' || '''memory-ordering''' || |
10 | | || X86 || i386 || Yes || Yes || cmpxchg || Stronger || |
11 | | || PowerPC || powerpc || No || Yes || lwarx/stwcx || Weaker || |
12 | | || SPARC (V7-V8) || sparc || No || Yes || ldstub/swap/cas(optional) || Stronger (TSO-mode) || |
| 10 | || X86 || i386 || Unusable || Yes || cmpxchg || Stronger || |
| 11 | || PowerPC || powerpc || Yes || Yes || lwarx/stwcx || Weaker || |
| 12 | || SPARC (V7-V8) || sparc || Yes || Yes || ldstub/swap/cas(optional) || Stronger (TSO-mode) || |
13 | 13 | || SPARC V9 || sparc64 || No || Yes || ldstub/swap/cas || Stronger (TSO-mode) || |
14 | 14 | || MIPS || mips || No || Yes || ll/sc || Weaker || |
15 | | || ARM || arm || No || Yes (V6 above) || ldstub/swap (V6 above) || Weaker || |
| 15 | || ARM || arm || Yes || Yes (V6 above) || ldstub/swap (V6 above) || Weaker || |
16 | 16 | || M68K || m68k || No || Yes || cad/cas32/tas || || |
17 | 17 | || Blackfin || bfin || No || no || no || || |